./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash fba57fb9b90f358055e96a73f6fe2a6d58f10629 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash fba57fb9b90f358055e96a73f6fe2a6d58f10629 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 15:32:27,308 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 15:32:27,309 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 15:32:27,316 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 15:32:27,316 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 15:32:27,317 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 15:32:27,317 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 15:32:27,319 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 15:32:27,320 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 15:32:27,320 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 15:32:27,321 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 15:32:27,321 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 15:32:27,322 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 15:32:27,322 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 15:32:27,323 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 15:32:27,323 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 15:32:27,323 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 15:32:27,324 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 15:32:27,326 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 15:32:27,327 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 15:32:27,327 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 15:32:27,328 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 15:32:27,329 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 15:32:27,329 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 15:32:27,329 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 15:32:27,330 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 15:32:27,330 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 15:32:27,331 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 15:32:27,331 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 15:32:27,332 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 15:32:27,332 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 15:32:27,333 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 15:32:27,333 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 15:32:27,333 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 15:32:27,334 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 15:32:27,334 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 15:32:27,334 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Default.epf [2018-11-23 15:32:27,341 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 15:32:27,341 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 15:32:27,342 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 15:32:27,342 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 15:32:27,342 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 15:32:27,342 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 15:32:27,343 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 15:32:27,343 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 15:32:27,344 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 15:32:27,344 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:32:27,345 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 15:32:27,345 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 15:32:27,346 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fba57fb9b90f358055e96a73f6fe2a6d58f10629 [2018-11-23 15:32:27,369 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 15:32:27,378 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 15:32:27,381 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 15:32:27,382 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 15:32:27,382 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 15:32:27,383 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:32:27,426 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/7d13a8be5/7605e5406fae4f5caaf3eaa51951e37b/FLAG288ae2685 [2018-11-23 15:32:27,960 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 15:32:27,960 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:32:27,987 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/7d13a8be5/7605e5406fae4f5caaf3eaa51951e37b/FLAG288ae2685 [2018-11-23 15:32:28,188 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/7d13a8be5/7605e5406fae4f5caaf3eaa51951e37b [2018-11-23 15:32:28,190 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 15:32:28,191 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 15:32:28,192 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 15:32:28,192 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 15:32:28,195 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 15:32:28,195 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:32:28" (1/1) ... [2018-11-23 15:32:28,197 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a46475d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:28, skipping insertion in model container [2018-11-23 15:32:28,197 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:32:28" (1/1) ... [2018-11-23 15:32:28,203 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 15:32:28,284 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 15:32:29,898 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:32:29,961 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 15:32:30,173 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:32:30,626 INFO L195 MainTranslator]: Completed translation [2018-11-23 15:32:30,626 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30 WrapperNode [2018-11-23 15:32:30,627 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 15:32:30,628 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 15:32:30,628 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 15:32:30,628 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 15:32:30,634 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,680 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,699 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 15:32:30,699 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 15:32:30,699 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 15:32:30,699 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 15:32:30,709 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,709 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,726 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,727 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,801 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,814 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,837 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... [2018-11-23 15:32:30,856 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 15:32:30,856 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 15:32:30,856 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 15:32:30,856 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 15:32:30,857 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:32:30,901 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_sync_single_for_device [2018-11-23 15:32:30,901 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_invariants [2018-11-23 15:32:30,901 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_invariants [2018-11-23 15:32:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_flow_ctrl [2018-11-23 15:32:30,902 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_flow_ctrl [2018-11-23 15:32:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_set_drvdata [2018-11-23 15:32:30,902 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_set_drvdata [2018-11-23 15:32:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-23 15:32:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_wake_queue [2018-11-23 15:32:30,902 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_wake_queue [2018-11-23 15:32:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_rings [2018-11-23 15:32:30,903 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_rings [2018-11-23 15:32:30,903 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unregister_driver [2018-11-23 15:32:30,903 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_skb [2018-11-23 15:32:30,903 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_skb [2018-11-23 15:32:30,903 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable_pending [2018-11-23 15:32:30,903 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable_pending [2018-11-23 15:32:30,903 INFO L130 BoogieDeclarations]: Found specification of procedure __alloc_skb [2018-11-23 15:32:30,903 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb [2018-11-23 15:32:30,903 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb [2018-11-23 15:32:30,904 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2018-11-23 15:32:30,904 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2018-11-23 15:32:30,904 INFO L130 BoogieDeclarations]: Found specification of procedure b44_readphy [2018-11-23 15:32:30,904 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_readphy [2018-11-23 15:32:30,904 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_rx_mode [2018-11-23 15:32:30,904 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_rx_mode [2018-11-23 15:32:30,904 INFO L130 BoogieDeclarations]: Found specification of procedure b44_free_consistent [2018-11-23 15:32:30,904 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_free_consistent [2018-11-23 15:32:30,904 INFO L130 BoogieDeclarations]: Found specification of procedure b44_enable_ints [2018-11-23 15:32:30,904 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_enable_ints [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure request_irq [2018-11-23 15:32:30,905 INFO L138 BoogieDeclarations]: Found implementation of procedure request_irq [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_coherent_mask [2018-11-23 15:32:30,905 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_coherent_mask [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2018-11-23 15:32:30,905 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure b44_start_xmit [2018-11-23 15:32:30,905 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_start_xmit [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2018-11-23 15:32:30,905 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2018-11-23 15:32:30,905 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure dma_sync_single_for_device [2018-11-23 15:32:30,906 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_sync_single_for_device [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure b44_cleanup [2018-11-23 15:32:30,906 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_cleanup [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure disable_irq [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure kmemcheck_mark_initialized [2018-11-23 15:32:30,906 INFO L138 BoogieDeclarations]: Found implementation of procedure kmemcheck_mark_initialized [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_word [2018-11-23 15:32:30,906 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_word [2018-11-23 15:32:30,906 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_update_begin [2018-11-23 15:32:30,907 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_update_begin [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_mask [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_enable [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure b44_timer [2018-11-23 15:32:30,907 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_timer [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_get_drvdata [2018-11-23 15:32:30,907 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_get_drvdata [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 15:32:30,907 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 15:32:30,907 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_rx_mode [2018-11-23 15:32:30,908 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_rx_mode [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_drvinfo [2018-11-23 15:32:30,908 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_drvinfo [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_is_enabled [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2018-11-23 15:32:30,908 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed_set [2018-11-23 15:32:30,908 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed_set [2018-11-23 15:32:30,908 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2018-11-23 15:32:30,908 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2018-11-23 15:32:30,909 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-23 15:32:30,909 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_disable [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure bwfilter_table [2018-11-23 15:32:30,909 INFO L138 BoogieDeclarations]: Found implementation of procedure bwfilter_table [2018-11-23 15:32:30,909 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2018-11-23 15:32:30,909 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 15:32:30,910 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure pci_name [2018-11-23 15:32:30,910 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_name [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_bus_powerup [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure b44_sync_dma_desc_for_device [2018-11-23 15:32:30,910 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_sync_dma_desc_for_device [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_driver_unregister [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_schedule [2018-11-23 15:32:30,910 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2018-11-23 15:32:30,911 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure br32 [2018-11-23 15:32:30,911 INFO L138 BoogieDeclarations]: Found implementation of procedure br32 [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure b44_poll_controller [2018-11-23 15:32:30,911 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_poll_controller [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_alloc_coherent [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure dma_unmap_single_attrs [2018-11-23 15:32:30,911 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_unmap_single_attrs [2018-11-23 15:32:30,911 INFO L130 BoogieDeclarations]: Found specification of procedure register_netdev [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure round_jiffies [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2018-11-23 15:32:30,912 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID [2018-11-23 15:32:30,912 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~TO~int [2018-11-23 15:32:30,912 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~TO~int [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irq [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_dma_translation [2018-11-23 15:32:30,912 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2018-11-23 15:32:30,912 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value_probe [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure dma_supported [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2018-11-23 15:32:30,913 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_cam_write [2018-11-23 15:32:30,913 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_cam_write [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure arch_irqs_disabled_flags [2018-11-23 15:32:30,913 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_irqs_disabled_flags [2018-11-23 15:32:30,913 INFO L130 BoogieDeclarations]: Found specification of procedure b44_tx_timeout [2018-11-23 15:32:30,914 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_tx_timeout [2018-11-23 15:32:30,914 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-23 15:32:30,914 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-23 15:32:30,914 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2018-11-23 15:32:30,914 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_mapping_error [2018-11-23 15:32:30,915 INFO L130 BoogieDeclarations]: Found specification of procedure b44_wap54g10_workaround [2018-11-23 15:32:30,916 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_wap54g10_workaround [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irq_7 [2018-11-23 15:32:30,916 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irq_7 [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure is_zero_ether_addr [2018-11-23 15:32:30,916 INFO L138 BoogieDeclarations]: Found implementation of procedure is_zero_ether_addr [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_sset_count [2018-11-23 15:32:30,916 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_sset_count [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_attach [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 15:32:30,916 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure generic_mii_ioctl [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure b44_nway_reset [2018-11-23 15:32:30,917 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_nway_reset [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure b44_alloc_rx_skb [2018-11-23 15:32:30,917 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_alloc_rx_skb [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_strings [2018-11-23 15:32:30,917 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_strings [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2018-11-23 15:32:30,917 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2018-11-23 15:32:30,917 INFO L130 BoogieDeclarations]: Found specification of procedure b44_writephy [2018-11-23 15:32:30,917 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_writephy [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure b44_pci_exit [2018-11-23 15:32:30,918 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_pci_exit [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure b44_chip_reset [2018-11-23 15:32:30,918 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_chip_reset [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_hw [2018-11-23 15:32:30,918 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_hw [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2018-11-23 15:32:30,918 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_detach [2018-11-23 15:32:30,918 INFO L130 BoogieDeclarations]: Found specification of procedure dma_mapping_error [2018-11-23 15:32:30,919 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_mapping_error [2018-11-23 15:32:30,919 INFO L130 BoogieDeclarations]: Found specification of procedure if_mii [2018-11-23 15:32:30,919 INFO L138 BoogieDeclarations]: Found implementation of procedure if_mii [2018-11-23 15:32:30,919 INFO L130 BoogieDeclarations]: Found specification of procedure b44_halt [2018-11-23 15:32:30,919 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_halt [2018-11-23 15:32:30,919 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2018-11-23 15:32:30,919 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2018-11-23 15:32:30,919 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_etherdev_mqs [2018-11-23 15:32:30,919 INFO L130 BoogieDeclarations]: Found specification of procedure b44_alloc_consistent [2018-11-23 15:32:30,919 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_alloc_consistent [2018-11-23 15:32:30,920 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2018-11-23 15:32:30,920 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2018-11-23 15:32:30,920 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_mac_addr [2018-11-23 15:32:30,920 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_mac_addr [2018-11-23 15:32:30,920 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_set_power_state [2018-11-23 15:32:30,920 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_pcihost_set_power_state [2018-11-23 15:32:30,920 INFO L130 BoogieDeclarations]: Found specification of procedure __ssb_driver_register [2018-11-23 15:32:30,920 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2018-11-23 15:32:30,920 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_handler_precall [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_wol [2018-11-23 15:32:30,921 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_wol [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_free_coherent [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure netif_napi_add [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_coherent_gfp_flags [2018-11-23 15:32:30,921 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_coherent_gfp_flags [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_read32 [2018-11-23 15:32:30,921 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_read32 [2018-11-23 15:32:30,921 INFO L130 BoogieDeclarations]: Found specification of procedure is_device_dma_capable [2018-11-23 15:32:30,922 INFO L138 BoogieDeclarations]: Found implementation of procedure is_device_dma_capable [2018-11-23 15:32:30,922 INFO L130 BoogieDeclarations]: Found specification of procedure __napi_schedule [2018-11-23 15:32:30,922 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_writephy [2018-11-23 15:32:30,922 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_writephy [2018-11-23 15:32:30,922 INFO L130 BoogieDeclarations]: Found specification of procedure b44_pci_init [2018-11-23 15:32:30,922 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_pci_init [2018-11-23 15:32:30,922 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2018-11-23 15:32:30,922 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2018-11-23 15:32:30,922 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_irq_4 [2018-11-23 15:32:30,922 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_irq_4 [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_5 [2018-11-23 15:32:30,923 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_5 [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure skb_copy_from_linear_data [2018-11-23 15:32:30,923 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_copy_from_linear_data [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_wol [2018-11-23 15:32:30,923 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_wol [2018-11-23 15:32:30,923 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure dma_free_attrs [2018-11-23 15:32:30,924 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_free_attrs [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2018-11-23 15:32:30,924 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_skb_21 [2018-11-23 15:32:30,924 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_skb_21 [2018-11-23 15:32:30,924 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer_sync [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure b44_open [2018-11-23 15:32:30,925 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_open [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_word [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure b44_interrupt [2018-11-23 15:32:30,925 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_interrupt [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-23 15:32:30,925 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_wol [2018-11-23 15:32:30,925 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_wol [2018-11-23 15:32:30,925 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2018-11-23 15:32:30,925 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2018-11-23 15:32:30,926 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_clockspeed [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_one [2018-11-23 15:32:30,926 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_one [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure b44_magic_pattern [2018-11-23 15:32:30,926 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_magic_pattern [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 15:32:30,926 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_stats64 [2018-11-23 15:32:30,926 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_stats64 [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure __netdev_alloc_skb [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_write32 [2018-11-23 15:32:30,927 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_write32 [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_load_mcast [2018-11-23 15:32:30,927 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_load_mcast [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_unregister [2018-11-23 15:32:30,927 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_pcihost_unregister [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 15:32:30,927 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_settings [2018-11-23 15:32:30,927 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_settings [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure b44_clear_stats [2018-11-23 15:32:30,928 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_clear_stats [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure b44_disable_ints [2018-11-23 15:32:30,928 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_disable_ints [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_settings [2018-11-23 15:32:30,928 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_settings [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure net_ratelimit [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure bw32 [2018-11-23 15:32:30,928 INFO L138 BoogieDeclarations]: Found implementation of procedure bw32 [2018-11-23 15:32:30,928 INFO L130 BoogieDeclarations]: Found specification of procedure kobject_name [2018-11-23 15:32:30,929 INFO L138 BoogieDeclarations]: Found implementation of procedure kobject_name [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure netif_msg_init [2018-11-23 15:32:30,929 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_msg_init [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irq [2018-11-23 15:32:30,929 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irq [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure napi_enable [2018-11-23 15:32:30,929 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_enable [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-23 15:32:30,929 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_bus_may_powerdown [2018-11-23 15:32:30,929 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_coherent_mask [2018-11-23 15:32:30,930 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_set_coherent_mask [2018-11-23 15:32:30,930 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_msglevel [2018-11-23 15:32:30,930 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_msglevel [2018-11-23 15:32:30,930 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOID [2018-11-23 15:32:30,930 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOID [2018-11-23 15:32:30,930 INFO L130 BoogieDeclarations]: Found specification of procedure enable_irq [2018-11-23 15:32:30,930 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_wol_pci [2018-11-23 15:32:30,930 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_wol_pci [2018-11-23 15:32:30,930 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_fetch_retry_bh [2018-11-23 15:32:30,930 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_fetch_retry_bh [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2018-11-23 15:32:30,931 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcicore_dev_irqvecs_enable [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure dma_map_single_attrs [2018-11-23 15:32:30,931 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_map_single_attrs [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~u16~0~TO~~u32~0 [2018-11-23 15:32:30,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~u16~0~TO~~u32~0 [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_disable_ints [2018-11-23 15:32:30,931 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_disable_ints [2018-11-23 15:32:30,931 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_ringparam [2018-11-23 15:32:30,932 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_ringparam [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure is_valid_ether_addr [2018-11-23 15:32:30,932 INFO L138 BoogieDeclarations]: Found implementation of procedure is_valid_ether_addr [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure is_multicast_ether_addr [2018-11-23 15:32:30,932 INFO L138 BoogieDeclarations]: Found implementation of procedure is_multicast_ether_addr [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_ethtool_stats [2018-11-23 15:32:30,932 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_ethtool_stats [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 15:32:30,932 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-23 15:32:30,932 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_msglevel [2018-11-23 15:32:30,933 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_msglevel [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_pauseparam [2018-11-23 15:32:30,933 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_pauseparam [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure b44_check_phy [2018-11-23 15:32:30,933 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_check_phy [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_irq [2018-11-23 15:32:30,933 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_irq [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_ringparam [2018-11-23 15:32:30,933 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_ringparam [2018-11-23 15:32:30,933 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_stop_queue [2018-11-23 15:32:30,934 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_stop_queue [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irqrestore_8 [2018-11-23 15:32:30,934 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irqrestore_8 [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure dma_get_cache_alignment [2018-11-23 15:32:30,934 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_get_cache_alignment [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_register [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure mod_timer [2018-11-23 15:32:30,934 INFO L130 BoogieDeclarations]: Found specification of procedure b44_close [2018-11-23 15:32:30,934 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_close [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_readphy [2018-11-23 15:32:30,935 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_readphy [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2018-11-23 15:32:30,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure b44_phy_reset [2018-11-23 15:32:30,935 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_phy_reset [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure ldv___netdev_alloc_skb_28 [2018-11-23 15:32:30,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv___netdev_alloc_skb_28 [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2018-11-23 15:32:30,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2018-11-23 15:32:30,935 INFO L130 BoogieDeclarations]: Found specification of procedure init_timer_key [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_1 [2018-11-23 15:32:30,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_1 [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_power_state [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable [2018-11-23 15:32:30,936 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed [2018-11-23 15:32:30,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed [2018-11-23 15:32:30,936 INFO L130 BoogieDeclarations]: Found specification of procedure b44_link_report [2018-11-23 15:32:30,936 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_link_report [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_flow_ctrl [2018-11-23 15:32:30,937 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_flow_ctrl [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure b44_remove_one [2018-11-23 15:32:30,937 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_remove_one [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_mac_addr [2018-11-23 15:32:30,937 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_mac_addr [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init [2018-11-23 15:32:30,937 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init [2018-11-23 15:32:30,937 INFO L130 BoogieDeclarations]: Found specification of procedure b44_ioctl [2018-11-23 15:32:30,937 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_ioctl [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure b44_resume [2018-11-23 15:32:30,938 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_resume [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure b44_suspend [2018-11-23 15:32:30,938 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_suspend [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure b44_stats_update [2018-11-23 15:32:30,938 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_stats_update [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure b44_free_rings [2018-11-23 15:32:30,938 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_free_rings [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_fetch_begin_bh [2018-11-23 15:32:30,938 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_fetch_begin_bh [2018-11-23 15:32:30,938 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2018-11-23 15:32:30,939 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2018-11-23 15:32:30,939 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irq [2018-11-23 15:32:30,939 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_attrs [2018-11-23 15:32:30,939 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_attrs [2018-11-23 15:32:30,939 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2018-11-23 15:32:30,939 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2018-11-23 15:32:30,939 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2018-11-23 15:32:30,939 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2018-11-23 15:32:30,939 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_pseudo_magicp [2018-11-23 15:32:30,939 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_pseudo_magicp [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure b44_wait_bit [2018-11-23 15:32:30,940 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_wait_bit [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure napi_schedule_prep [2018-11-23 15:32:30,940 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_schedule_prep [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_word [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_clear_bit [2018-11-23 15:32:30,940 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_clear_bit [2018-11-23 15:32:30,940 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_save_flags [2018-11-23 15:32:30,941 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_save_flags [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdev [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure b44_change_mtu [2018-11-23 15:32:30,941 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_change_mtu [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure netpoll_trap [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 15:32:30,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_phy [2018-11-23 15:32:30,941 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_phy [2018-11-23 15:32:30,941 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ [2018-11-23 15:32:30,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ [2018-11-23 15:32:30,942 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_pauseparam [2018-11-23 15:32:30,942 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_pauseparam [2018-11-23 15:32:45,780 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 15:32:45,780 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-11-23 15:32:45,780 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:32:45 BoogieIcfgContainer [2018-11-23 15:32:45,780 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 15:32:45,781 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 15:32:45,781 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 15:32:45,783 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 15:32:45,783 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:32:28" (1/3) ... [2018-11-23 15:32:45,784 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d9ca832 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:32:45, skipping insertion in model container [2018-11-23 15:32:45,784 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:32:30" (2/3) ... [2018-11-23 15:32:45,784 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d9ca832 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:32:45, skipping insertion in model container [2018-11-23 15:32:45,784 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:32:45" (3/3) ... [2018-11-23 15:32:45,786 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:32:45,792 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 15:32:45,798 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 15:32:45,809 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 15:32:45,837 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 15:32:45,837 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 15:32:45,837 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 15:32:45,838 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 15:32:45,838 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 15:32:45,838 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 15:32:45,838 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 15:32:45,838 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 15:32:45,838 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 15:32:45,874 INFO L276 IsEmpty]: Start isEmpty. Operand 1728 states. [2018-11-23 15:32:45,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-23 15:32:45,886 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:32:45,886 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:32:45,888 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:32:45,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:32:45,892 INFO L82 PathProgramCache]: Analyzing trace with hash -993106610, now seen corresponding path program 1 times [2018-11-23 15:32:45,893 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:32:45,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:32:45,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:45,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:32:45,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:46,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:32:47,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:32:47,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:32:47,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 15:32:47,063 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 15:32:47,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 15:32:47,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:32:47,073 INFO L87 Difference]: Start difference. First operand 1728 states. Second operand 3 states. [2018-11-23 15:32:47,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:32:47,228 INFO L93 Difference]: Finished difference Result 4049 states and 5531 transitions. [2018-11-23 15:32:47,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 15:32:47,230 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2018-11-23 15:32:47,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:32:47,251 INFO L225 Difference]: With dead ends: 4049 [2018-11-23 15:32:47,251 INFO L226 Difference]: Without dead ends: 2330 [2018-11-23 15:32:47,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:32:47,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2330 states. [2018-11-23 15:32:47,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2330 to 2330. [2018-11-23 15:32:47,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2330 states. [2018-11-23 15:32:47,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2330 states to 2330 states and 3143 transitions. [2018-11-23 15:32:47,383 INFO L78 Accepts]: Start accepts. Automaton has 2330 states and 3143 transitions. Word has length 61 [2018-11-23 15:32:47,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:32:47,384 INFO L480 AbstractCegarLoop]: Abstraction has 2330 states and 3143 transitions. [2018-11-23 15:32:47,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 15:32:47,384 INFO L276 IsEmpty]: Start isEmpty. Operand 2330 states and 3143 transitions. [2018-11-23 15:32:47,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-11-23 15:32:47,393 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:32:47,394 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:32:47,394 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:32:47,394 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:32:47,394 INFO L82 PathProgramCache]: Analyzing trace with hash 1893524673, now seen corresponding path program 1 times [2018-11-23 15:32:47,394 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:32:47,394 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:32:47,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:47,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:32:47,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:47,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:32:48,132 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 15:32:48,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:32:48,133 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 15:32:48,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 15:32:48,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 15:32:48,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:32:48,134 INFO L87 Difference]: Start difference. First operand 2330 states and 3143 transitions. Second operand 3 states. [2018-11-23 15:32:48,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:32:48,227 INFO L93 Difference]: Finished difference Result 4650 states and 6305 transitions. [2018-11-23 15:32:48,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 15:32:48,228 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2018-11-23 15:32:48,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:32:48,238 INFO L225 Difference]: With dead ends: 4650 [2018-11-23 15:32:48,238 INFO L226 Difference]: Without dead ends: 2354 [2018-11-23 15:32:48,244 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:32:48,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2354 states. [2018-11-23 15:32:48,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2354 to 2334. [2018-11-23 15:32:48,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2334 states. [2018-11-23 15:32:48,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2334 states to 2334 states and 3147 transitions. [2018-11-23 15:32:48,299 INFO L78 Accepts]: Start accepts. Automaton has 2334 states and 3147 transitions. Word has length 134 [2018-11-23 15:32:48,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:32:48,299 INFO L480 AbstractCegarLoop]: Abstraction has 2334 states and 3147 transitions. [2018-11-23 15:32:48,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 15:32:48,300 INFO L276 IsEmpty]: Start isEmpty. Operand 2334 states and 3147 transitions. [2018-11-23 15:32:48,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-11-23 15:32:48,304 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:32:48,304 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:32:48,304 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:32:48,305 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:32:48,305 INFO L82 PathProgramCache]: Analyzing trace with hash 502443862, now seen corresponding path program 1 times [2018-11-23 15:32:48,305 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:32:48,305 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:32:48,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:48,309 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:32:48,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:49,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:32:49,477 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-11-23 15:32:49,477 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:32:49,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:32:49,477 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:32:49,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:32:49,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:32:49,479 INFO L87 Difference]: Start difference. First operand 2334 states and 3147 transitions. Second operand 5 states. [2018-11-23 15:32:49,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:32:49,599 INFO L93 Difference]: Finished difference Result 4638 states and 6261 transitions. [2018-11-23 15:32:49,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:32:49,600 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 147 [2018-11-23 15:32:49,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:32:49,611 INFO L225 Difference]: With dead ends: 4638 [2018-11-23 15:32:49,612 INFO L226 Difference]: Without dead ends: 2334 [2018-11-23 15:32:49,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:32:49,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2334 states. [2018-11-23 15:32:49,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2334 to 2334. [2018-11-23 15:32:49,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2334 states. [2018-11-23 15:32:49,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2334 states to 2334 states and 3146 transitions. [2018-11-23 15:32:49,696 INFO L78 Accepts]: Start accepts. Automaton has 2334 states and 3146 transitions. Word has length 147 [2018-11-23 15:32:49,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:32:49,696 INFO L480 AbstractCegarLoop]: Abstraction has 2334 states and 3146 transitions. [2018-11-23 15:32:49,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:32:49,696 INFO L276 IsEmpty]: Start isEmpty. Operand 2334 states and 3146 transitions. [2018-11-23 15:32:49,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-11-23 15:32:49,702 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:32:49,702 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:32:49,702 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:32:49,702 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:32:49,703 INFO L82 PathProgramCache]: Analyzing trace with hash -560706151, now seen corresponding path program 1 times [2018-11-23 15:32:49,703 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:32:49,703 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:32:49,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:49,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:32:49,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:32:51,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:32:52,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:32:53,190 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); VAL [|#NULL.base|=9223372036854775826, |#NULL.offset|=9223372036854776706, |#t~string1054.base|=9223372036854777109, |#t~string1054.offset|=9223372036854775930, |#t~string1059.base|=9223372036854776584, |#t~string1059.offset|=9223372036854775984, |#t~string1060.base|=9223372036854777304, |#t~string1060.offset|=9223372036854777281, |#t~string1061.base|=9223372036854776802, |#t~string1061.offset|=9223372036854776788, |#t~string1068.base|=9223372036854776534, |#t~string1068.offset|=9223372036854776243, |#t~string1074.base|=9223372036854776557, |#t~string1074.offset|=9223372036854777215, |#t~string1079.base|=9223372036854777228, |#t~string1079.offset|=9223372036854776343, |#t~string1084.base|=9223372036854776272, |#t~string1084.offset|=9223372036854776760, |#t~string1088.base|=9223372036854775844, |#t~string1088.offset|=9223372036854776259, |#t~string1095.base|=9223372036854777107, |#t~string1095.offset|=9223372036854777118, |#t~string1098.base|=9223372036854777266, |#t~string1098.offset|=9223372036854776839, |#t~string1099.base|=9223372036854775982, |#t~string1099.offset|=9223372036854776573, |#t~string1120.base|=9223372036854776278, |#t~string1120.offset|=9223372036854775830, |#t~string1125.base|=9223372036854777297, |#t~string1125.offset|=9223372036854775819, |#t~string1128.base|=9223372036854777078, |#t~string1128.offset|=9223372036854776767, |#t~string161.base|=9223372036854775917, |#t~string161.offset|=9223372036854776331, |#t~string223.base|=9223372036854777400, |#t~string223.offset|=9223372036854776204, |#t~string226.base|=9223372036854776816, |#t~string226.offset|=9223372036854776147, |#t~string332.base|=9223372036854776220, |#t~string332.offset|=9223372036854776973, |#t~string342.base|=9223372036854776713, |#t~string342.offset|=9223372036854776952, |#t~string343.base|=9223372036854776157, |#t~string343.offset|=9223372036854777257, |#t~string344.base|=9223372036854777249, |#t~string344.offset|=9223372036854776424, |#t~string375.base|=9223372036854776699, |#t~string375.offset|=9223372036854776749, |#t~string411.base|=9223372036854776003, |#t~string411.offset|=9223372036854776216, |#t~string414.base|=9223372036854776225, |#t~string414.offset|=9223372036854777040, |#t~string418.base|=9223372036854777289, |#t~string418.offset|=9223372036854777243, |#t~string419.base|=9223372036854777024, |#t~string419.offset|=9223372036854776547, |#t~string423.base|=9223372036854776294, |#t~string423.offset|=9223372036854776638, |#t~string425.base|=9223372036854776201, |#t~string425.offset|=9223372036854776495, |#t~string426.base|=9223372036854776305, |#t~string426.offset|=9223372036854777256, |#t~string429.base|=9223372036854776502, |#t~string429.offset|=9223372036854777155, |#t~string430.base|=9223372036854775836, |#t~string430.offset|=9223372036854775935, |#t~string468.base|=9223372036854776656, |#t~string468.offset|=9223372036854776593, |#t~string472.base|=9223372036854776369, |#t~string472.offset|=9223372036854775868, |#t~string598.base|=9223372036854777284, |#t~string598.offset|=9223372036854777028, |#t~string603.base|=9223372036854776722, |#t~string603.offset|=9223372036854776678, |#t~string617.base|=9223372036854776691, |#t~string617.offset|=9223372036854776754, |#t~string764.base|=9223372036854776959, |#t~string764.offset|=9223372036854776391, |#t~string776.base|=9223372036854775852, |#t~string776.offset|=9223372036854776224, |#t~string808.base|=9223372036854777180, |#t~string808.offset|=9223372036854777152, |#t~string916.base|=9223372036854777335, |#t~string916.offset|=9223372036854776560, |#t~string918.base|=9223372036854776362, |#t~string918.offset|=9223372036854776130, |#t~string927.base|=9223372036854776690, |#t~string927.offset|=9223372036854775869, |#t~string930.base|=9223372036854775884, |#t~string930.offset|=9223372036854776338, |old(#NULL.base)|=9223372036854775826, |old(#NULL.offset)|=9223372036854776706, |old(#t~string1054.base)|=9223372036854777109, |old(#t~string1054.offset)|=9223372036854775930, |old(#t~string1059.base)|=9223372036854776584, |old(#t~string1059.offset)|=9223372036854775984, |old(#t~string1060.base)|=9223372036854777304, |old(#t~string1060.offset)|=9223372036854777281, |old(#t~string1061.base)|=9223372036854776802, |old(#t~string1061.offset)|=9223372036854776788, |old(#t~string1068.base)|=9223372036854776534, |old(#t~string1068.offset)|=9223372036854776243, |old(#t~string1074.base)|=9223372036854776557, |old(#t~string1074.offset)|=9223372036854777215, |old(#t~string1079.base)|=9223372036854777228, |old(#t~string1079.offset)|=9223372036854776343, |old(#t~string1084.base)|=9223372036854776272, |old(#t~string1084.offset)|=9223372036854776760, |old(#t~string1088.base)|=9223372036854775844, |old(#t~string1088.offset)|=9223372036854776259, |old(#t~string1095.base)|=9223372036854777107, |old(#t~string1095.offset)|=9223372036854777118, |old(#t~string1098.base)|=9223372036854777266, |old(#t~string1098.offset)|=9223372036854776839, |old(#t~string1099.base)|=9223372036854775982, |old(#t~string1099.offset)|=9223372036854776573, |old(#t~string1120.base)|=9223372036854776278, |old(#t~string1120.offset)|=9223372036854775830, |old(#t~string1125.base)|=9223372036854777297, |old(#t~string1125.offset)|=9223372036854775819, |old(#t~string1128.base)|=9223372036854777078, |old(#t~string1128.offset)|=9223372036854776767, |old(#t~string161.base)|=9223372036854775917, |old(#t~string161.offset)|=9223372036854776331, |old(#t~string223.base)|=9223372036854777400, |old(#t~string223.offset)|=9223372036854776204, |old(#t~string226.base)|=9223372036854776816, |old(#t~string226.offset)|=9223372036854776147, |old(#t~string332.base)|=9223372036854776220, |old(#t~string332.offset)|=9223372036854776973, |old(#t~string342.base)|=9223372036854776713, |old(#t~string342.offset)|=9223372036854776952, |old(#t~string343.base)|=9223372036854776157, |old(#t~string343.offset)|=9223372036854777257, |old(#t~string344.base)|=9223372036854777249, |old(#t~string344.offset)|=9223372036854776424, |old(#t~string375.base)|=9223372036854776699, |old(#t~string375.offset)|=9223372036854776749, |old(#t~string411.base)|=9223372036854776003, |old(#t~string411.offset)|=9223372036854776216, |old(#t~string414.base)|=9223372036854776225, |old(#t~string414.offset)|=9223372036854777040, |old(#t~string418.base)|=9223372036854777289, |old(#t~string418.offset)|=9223372036854777243, |old(#t~string419.base)|=9223372036854777024, |old(#t~string419.offset)|=9223372036854776547, |old(#t~string423.base)|=9223372036854776294, |old(#t~string423.offset)|=9223372036854776638, |old(#t~string425.base)|=9223372036854776201, |old(#t~string425.offset)|=9223372036854776495, |old(#t~string426.base)|=9223372036854776305, |old(#t~string426.offset)|=9223372036854777256, |old(#t~string429.base)|=9223372036854776502, |old(#t~string429.offset)|=9223372036854777155, |old(#t~string430.base)|=9223372036854775836, |old(#t~string430.offset)|=9223372036854775935, |old(#t~string468.base)|=9223372036854776656, |old(#t~string468.offset)|=9223372036854776593, |old(#t~string472.base)|=9223372036854776369, |old(#t~string472.offset)|=9223372036854775868, |old(#t~string598.base)|=9223372036854777284, |old(#t~string598.offset)|=9223372036854777028, |old(#t~string603.base)|=9223372036854776722, |old(#t~string603.offset)|=9223372036854776678, |old(#t~string617.base)|=9223372036854776691, |old(#t~string617.offset)|=9223372036854776754, |old(#t~string764.base)|=9223372036854776959, |old(#t~string764.offset)|=9223372036854776391, |old(#t~string776.base)|=9223372036854775852, |old(#t~string776.offset)|=9223372036854776224, |old(#t~string808.base)|=9223372036854777180, |old(#t~string808.offset)|=9223372036854777152, |old(#t~string916.base)|=9223372036854777335, |old(#t~string916.offset)|=9223372036854776560, |old(#t~string918.base)|=9223372036854776362, |old(#t~string918.offset)|=9223372036854776130, |old(#t~string927.base)|=9223372036854776690, |old(#t~string927.offset)|=9223372036854775869, |old(#t~string930.base)|=9223372036854775884, |old(#t~string930.offset)|=9223372036854776338, |old(~#b44_ethtool_ops~0.base)|=9223372036854776898, |old(~#b44_ethtool_ops~0.offset)|=9223372036854777051, |old(~#b44_gstrings~0.base)|=9223372036854777102, |old(~#b44_gstrings~0.offset)|=9223372036854776408, |old(~#b44_netdev_ops~0.base)|=9223372036854777258, |old(~#b44_netdev_ops~0.offset)|=9223372036854776354, |old(~#b44_pci_driver~0.base)|=9223372036854776066, |old(~#b44_pci_driver~0.offset)|=9223372036854777017, |old(~#b44_pci_tbl~0.base)|=9223372036854776578, |old(~#b44_pci_tbl~0.offset)|=9223372036854776832, |old(~#b44_ssb_driver~0.base)|=9223372036854776530, |old(~#b44_ssb_driver~0.offset)|=9223372036854775993, |old(~#b44_ssb_tbl~0.base)|=9223372036854776525, |old(~#b44_ssb_tbl~0.offset)|=9223372036854775881, |old(~__mod_pci_device_table~0.class)|=9223372036854777386, |old(~__mod_pci_device_table~0.class_mask)|=9223372036854777010, |old(~__mod_pci_device_table~0.device)|=9223372036854777142, |old(~__mod_pci_device_table~0.driver_data)|=9223372036854776236, |old(~__mod_pci_device_table~0.subdevice)|=9223372036854776184, |old(~__mod_pci_device_table~0.subvendor)|=9223372036854776040, |old(~__mod_pci_device_table~0.vendor)|=9223372036854777261, |old(~__mod_ssb_device_table~0.coreid)|=9223372036854777361, |old(~__mod_ssb_device_table~0.revision)|=9223372036854776519, |old(~__mod_ssb_device_table~0.vendor)|=9223372036854776512, |old(~b44_debug~0)|=9223372036854776380, |old(~dma_desc_sync_size~0)|=9223372036854776521, |old(~instance~0)|=9223372036854776310, |old(~LDV_IN_INTERRUPT~0)|=9223372036854777231, |old(~ldv_spin~0)|=9223372036854776935, |~#b44_ethtool_ops~0.base|=9223372036854776898, |~#b44_ethtool_ops~0.offset|=9223372036854777051, |~#b44_gstrings~0.base|=9223372036854777102, |~#b44_gstrings~0.offset|=9223372036854776408, |~#b44_netdev_ops~0.base|=9223372036854777258, |~#b44_netdev_ops~0.offset|=9223372036854776354, |~#b44_pci_driver~0.base|=9223372036854776066, |~#b44_pci_driver~0.offset|=9223372036854777017, |~#b44_pci_tbl~0.base|=9223372036854776578, |~#b44_pci_tbl~0.offset|=9223372036854776832, |~#b44_ssb_driver~0.base|=9223372036854776530, |~#b44_ssb_driver~0.offset|=9223372036854775993, |~#b44_ssb_tbl~0.base|=9223372036854776525, |~#b44_ssb_tbl~0.offset|=9223372036854775881, ~__mod_pci_device_table~0.class=9223372036854777386, ~__mod_pci_device_table~0.class_mask=9223372036854777010, ~__mod_pci_device_table~0.device=9223372036854777142, ~__mod_pci_device_table~0.driver_data=9223372036854776236, ~__mod_pci_device_table~0.subdevice=9223372036854776184, ~__mod_pci_device_table~0.subvendor=9223372036854776040, ~__mod_pci_device_table~0.vendor=9223372036854777261, ~__mod_ssb_device_table~0.coreid=9223372036854777361, ~__mod_ssb_device_table~0.revision=9223372036854776519, ~__mod_ssb_device_table~0.vendor=9223372036854776512, ~b44_debug~0=9223372036854776380, ~dma_desc_sync_size~0=9223372036854776521, ~instance~0=9223372036854776310, ~LDV_IN_INTERRUPT~0=9223372036854777231, ~ldv_spin~0=9223372036854776935] [?] #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string161.base, #t~string161.offset := #Ultimate.alloc(137);call #t~string223.base, #t~string223.offset := #Ultimate.alloc(26);call #t~string226.base, #t~string226.offset := #Ultimate.alloc(68);call #t~string332.base, #t~string332.offset := #Ultimate.alloc(4);call write~init~int(98, #t~string332.base, #t~string332.offset, 1);call write~init~int(52, #t~string332.base, 1 + #t~string332.offset, 1);call write~init~int(52, #t~string332.base, 2 + #t~string332.offset, 1);call write~init~int(0, #t~string332.base, 3 + #t~string332.offset, 1);call #t~string342.base, #t~string342.offset := #Ultimate.alloc(58);call #t~string343.base, #t~string343.offset := #Ultimate.alloc(6);call write~init~int(99, #t~string343.base, #t~string343.offset, 1);call write~init~int(108, #t~string343.base, 1 + #t~string343.offset, 1);call write~init~int(101, #t~string343.base, 2 + #t~string343.offset, 1);call write~init~int(97, #t~string343.base, 3 + #t~string343.offset, 1);call write~init~int(114, #t~string343.base, 4 + #t~string343.offset, 1);call write~init~int(0, #t~string343.base, 5 + #t~string343.offset, 1);call #t~string344.base, #t~string344.offset := #Ultimate.alloc(4);call write~init~int(115, #t~string344.base, #t~string344.offset, 1);call write~init~int(101, #t~string344.base, 1 + #t~string344.offset, 1);call write~init~int(116, #t~string344.base, 2 + #t~string344.offset, 1);call write~init~int(0, #t~string344.base, 3 + #t~string344.offset, 1);call #t~string375.base, #t~string375.offset := #Ultimate.alloc(30);call #t~string411.base, #t~string411.offset := #Ultimate.alloc(14);call #t~string414.base, #t~string414.offset := #Ultimate.alloc(34);call #t~string418.base, #t~string418.offset := #Ultimate.alloc(5);call write~init~int(102, #t~string418.base, #t~string418.offset, 1);call write~init~int(117, #t~string418.base, 1 + #t~string418.offset, 1);call write~init~int(108, #t~string418.base, 2 + #t~string418.offset, 1);call write~init~int(108, #t~string418.base, 3 + #t~string418.offset, 1);call write~init~int(0, #t~string418.base, 4 + #t~string418.offset, 1);call #t~string419.base, #t~string419.offset := #Ultimate.alloc(5);call write~init~int(104, #t~string419.base, #t~string419.offset, 1);call write~init~int(97, #t~string419.base, 1 + #t~string419.offset, 1);call write~init~int(108, #t~string419.base, 2 + #t~string419.offset, 1);call write~init~int(102, #t~string419.base, 3 + #t~string419.offset, 1);call write~init~int(0, #t~string419.base, 4 + #t~string419.offset, 1);call #t~string423.base, #t~string423.offset := #Ultimate.alloc(41);call #t~string425.base, #t~string425.offset := #Ultimate.alloc(3);call write~init~int(111, #t~string425.base, #t~string425.offset, 1);call write~init~int(110, #t~string425.base, 1 + #t~string425.offset, 1);call write~init~int(0, #t~string425.base, 2 + #t~string425.offset, 1);call #t~string426.base, #t~string426.offset := #Ultimate.alloc(4);call write~init~int(111, #t~string426.base, #t~string426.offset, 1);call write~init~int(102, #t~string426.base, 1 + #t~string426.offset, 1);call write~init~int(102, #t~string426.base, 2 + #t~string426.offset, 1);call write~init~int(0, #t~string426.base, 3 + #t~string426.offset, 1);call #t~string429.base, #t~string429.offset := #Ultimate.alloc(3);call write~init~int(111, #t~string429.base, #t~string429.offset, 1);call write~init~int(110, #t~string429.base, 1 + #t~string429.offset, 1);call write~init~int(0, #t~string429.base, 2 + #t~string429.offset, 1);call #t~string430.base, #t~string430.offset := #Ultimate.alloc(4);call write~init~int(111, #t~string430.base, #t~string430.offset, 1);call write~init~int(102, #t~string430.base, 1 + #t~string430.offset, 1);call write~init~int(102, #t~string430.base, 2 + #t~string430.offset, 1);call write~init~int(0, #t~string430.base, 3 + #t~string430.offset, 1);call #t~string468.base, #t~string468.offset := #Ultimate.alloc(30);call #t~string472.base, #t~string472.offset := #Ultimate.alloc(24);call #t~string598.base, #t~string598.offset := #Ultimate.alloc(16);call #t~string603.base, #t~string603.offset := #Ultimate.alloc(31);call #t~string617.base, #t~string617.offset := #Ultimate.alloc(37);call #t~string764.base, #t~string764.offset := #Ultimate.alloc(235);call #t~string776.base, #t~string776.offset := #Ultimate.alloc(19);call #t~string808.base, #t~string808.offset := #Ultimate.alloc(13);call #t~string916.base, #t~string916.offset := #Ultimate.alloc(4);call write~init~int(98, #t~string916.base, #t~string916.offset, 1);call write~init~int(52, #t~string916.base, 1 + #t~string916.offset, 1);call write~init~int(52, #t~string916.base, 2 + #t~string916.offset, 1);call write~init~int(0, #t~string916.base, 3 + #t~string916.offset, 1);call #t~string918.base, #t~string918.offset := #Ultimate.alloc(4);call write~init~int(50, #t~string918.base, #t~string918.offset, 1);call write~init~int(46, #t~string918.base, 1 + #t~string918.offset, 1);call write~init~int(48, #t~string918.base, 2 + #t~string918.offset, 1);call write~init~int(0, #t~string918.base, 3 + #t~string918.offset, 1);call #t~string927.base, #t~string927.offset := #Ultimate.alloc(4);call write~init~int(83, #t~string927.base, #t~string927.offset, 1);call write~init~int(83, #t~string927.base, 1 + #t~string927.offset, 1);call write~init~int(66, #t~string927.base, 2 + #t~string927.offset, 1);call write~init~int(0, #t~string927.base, 3 + #t~string927.offset, 1);call #t~string930.base, #t~string930.offset := #Ultimate.alloc(235);call #t~string1054.base, #t~string1054.offset := #Ultimate.alloc(43);call #t~string1059.base, #t~string1059.offset := #Ultimate.alloc(21);call #t~string1060.base, #t~string1060.offset := #Ultimate.alloc(46);call #t~string1061.base, #t~string1061.offset := #Ultimate.alloc(4);call write~init~int(50, #t~string1061.base, #t~string1061.offset, 1);call write~init~int(46, #t~string1061.base, 1 + #t~string1061.offset, 1);call write~init~int(48, #t~string1061.base, 2 + #t~string1061.offset, 1);call write~init~int(0, #t~string1061.base, 3 + #t~string1061.offset, 1);call #t~string1068.base, #t~string1068.offset := #Ultimate.alloc(20);call #t~string1074.base, #t~string1074.offset := #Ultimate.alloc(27);call #t~string1079.base, #t~string1079.offset := #Ultimate.alloc(51);call #t~string1084.base, #t~string1084.offset := #Ultimate.alloc(51);call #t~string1088.base, #t~string1088.offset := #Ultimate.alloc(47);call #t~string1095.base, #t~string1095.offset := #Ultimate.alloc(38);call #t~string1098.base, #t~string1098.offset := #Ultimate.alloc(8);call #t~string1099.base, #t~string1099.offset := #Ultimate.alloc(46);call #t~string1120.base, #t~string1120.offset := #Ultimate.alloc(27);call #t~string1125.base, #t~string1125.offset := #Ultimate.alloc(20);call #t~string1128.base, #t~string1128.offset := #Ultimate.alloc(4);call write~init~int(98, #t~string1128.base, #t~string1128.offset, 1);call write~init~int(52, #t~string1128.base, 1 + #t~string1128.offset, 1);call write~init~int(52, #t~string1128.base, 2 + #t~string1128.offset, 1);call write~init~int(0, #t~string1128.base, 3 + #t~string1128.offset, 1);~b44_debug~0 := -1;~dma_desc_sync_size~0 := 0;~instance~0 := 0;call ~#b44_gstrings~0.base, ~#b44_gstrings~0.offset := #Ultimate.alloc(1504);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#b44_gstrings~0.base);call write~unchecked~int(116, ~#b44_gstrings~0.base, ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 2 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 3 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 4 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 5 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 6 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 7 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 8 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 9 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 10 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 11 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 12 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 13 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 14 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 32 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 33 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 34 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 35 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 36 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 37 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 38 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 39 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 40 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 41 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 42 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 43 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 44 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 64 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 65 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 66 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 67 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 68 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 69 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 70 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 71 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 72 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 73 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 96 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 97 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 98 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 99 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 100 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 101 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 102 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 103 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 128 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 129 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 130 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 131 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 132 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 133 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 134 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 135 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 136 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 137 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 138 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 139 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 140 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 141 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 142 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 143 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 144 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 145 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 160 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 161 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 162 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 163 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 164 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 165 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 166 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 167 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 168 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 169 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 170 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 171 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 172 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 173 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 174 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 175 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 176 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 177 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 192 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 193 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 194 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 195 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 196 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 197 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 198 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 199 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(52, ~#b44_gstrings~0.base, 200 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 201 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 224 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 225 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 226 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 227 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 228 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 229 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 230 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 231 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 232 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 233 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 234 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 235 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 236 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 237 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 238 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(55, ~#b44_gstrings~0.base, 239 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 240 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 256 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 257 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 258 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 259 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 260 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 261 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 262 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 263 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 264 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(56, ~#b44_gstrings~0.base, 265 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 266 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 267 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 268 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 269 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 270 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 271 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 272 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 273 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 288 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 289 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 290 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 291 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 292 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 293 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 294 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 295 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 296 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 297 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 298 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 299 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 300 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 301 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 302 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 303 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 304 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 305 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 320 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 321 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 322 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 323 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 324 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 325 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 326 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 327 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 328 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 329 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 330 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 331 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 332 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 333 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 334 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(48, ~#b44_gstrings~0.base, 335 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 336 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(51, ~#b44_gstrings~0.base, 337 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 338 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 352 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 353 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 354 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 355 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 356 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 357 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 358 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 359 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(48, ~#b44_gstrings~0.base, 360 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 361 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(52, ~#b44_gstrings~0.base, 362 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 363 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 364 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 365 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 366 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 367 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 368 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 369 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 370 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 384 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 385 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 386 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(106, ~#b44_gstrings~0.base, 387 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 388 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 389 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 390 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 391 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 392 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 393 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 394 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 395 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 396 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 397 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 398 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 416 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 417 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 418 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 419 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(118, ~#b44_gstrings~0.base, 420 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 421 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 422 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 423 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 424 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(122, ~#b44_gstrings~0.base, 425 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 426 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 427 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 428 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 429 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 430 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 431 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 432 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 448 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 449 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 450 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(102, ~#b44_gstrings~0.base, 451 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 452 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 453 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 454 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 455 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 456 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 457 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 458 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 459 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 460 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 461 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 462 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 463 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 464 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 480 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 481 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 482 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 483 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 484 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 485 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 486 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 487 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 488 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 489 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 490 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 491 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 492 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 512 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 513 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 514 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 515 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 516 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 517 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 518 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 519 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 520 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 521 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 522 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 523 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 524 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 525 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 544 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 545 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 546 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 547 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 548 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 549 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 550 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 551 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 552 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 553 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 554 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 555 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 556 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 557 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 558 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 576 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 577 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 578 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 579 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 580 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 581 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 582 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 583 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 584 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 585 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 586 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 587 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 588 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 589 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 590 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 591 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 592 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 608 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 609 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 610 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 611 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 612 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 613 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 614 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 615 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 616 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 617 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(118, ~#b44_gstrings~0.base, 618 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 619 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 620 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 621 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 622 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 623 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 624 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 625 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 640 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 641 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 642 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 643 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 644 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 645 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 646 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 647 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 648 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 649 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 650 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 651 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 652 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 672 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 673 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 674 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 675 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 676 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(102, ~#b44_gstrings~0.base, 677 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 678 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 679 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 680 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 681 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 682 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 704 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 705 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 706 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 707 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 708 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 709 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 710 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 711 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 712 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 713 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 714 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 715 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 716 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 717 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 718 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 719 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 736 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 737 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 738 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 739 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 740 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 741 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 742 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 743 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 744 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 745 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 746 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 747 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 748 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 749 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 768 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 769 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 770 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 771 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 772 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 773 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 774 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 775 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 776 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 777 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 778 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 779 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 780 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 781 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 782 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 800 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 801 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 802 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 803 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 804 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 805 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 806 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 807 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 808 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 809 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 810 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 811 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 812 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 832 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 833 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 834 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 835 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 836 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 837 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 838 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 839 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 840 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 841 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 864 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 865 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 866 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 867 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 868 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 869 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 870 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 871 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 896 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 897 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 898 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 899 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 900 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 901 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 902 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 903 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 904 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 905 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 906 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 907 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 908 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 909 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 910 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 911 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 912 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 913 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 928 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 929 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 930 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 931 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 932 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 933 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 934 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 935 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 936 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 937 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 938 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 939 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 940 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 941 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 942 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 943 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 944 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 945 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 960 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 961 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 962 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 963 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 964 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 965 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 966 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 967 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(52, ~#b44_gstrings~0.base, 968 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 969 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 992 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 993 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 994 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 995 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 996 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 997 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 998 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 999 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1000 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1001 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1002 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1003 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1004 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1005 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1006 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(55, ~#b44_gstrings~0.base, 1007 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1008 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1024 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1025 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1026 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1027 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1028 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1029 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1030 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1031 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1032 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(56, ~#b44_gstrings~0.base, 1033 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1034 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1035 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1036 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1037 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1038 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1039 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1040 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1041 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1056 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1057 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1058 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1059 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1060 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1061 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1062 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1063 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1064 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(54, ~#b44_gstrings~0.base, 1065 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1066 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1067 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1068 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1069 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1070 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1071 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1072 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1073 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1088 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1089 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1090 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1091 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1092 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1093 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1094 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(53, ~#b44_gstrings~0.base, 1095 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1096 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1097 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1098 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1099 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1100 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1101 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1102 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(48, ~#b44_gstrings~0.base, 1103 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1104 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(51, ~#b44_gstrings~0.base, 1105 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1106 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1120 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1121 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1122 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1123 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1124 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1125 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1126 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(49, ~#b44_gstrings~0.base, 1127 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(48, ~#b44_gstrings~0.base, 1128 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(50, ~#b44_gstrings~0.base, 1129 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(52, ~#b44_gstrings~0.base, 1130 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1131 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1132 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1133 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1134 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 1135 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1136 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1137 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1138 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1152 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1153 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1154 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(106, ~#b44_gstrings~0.base, 1155 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1156 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 1157 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 1158 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1159 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1160 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1161 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1162 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1163 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1164 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1165 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1166 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1184 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1185 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1186 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1187 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(118, ~#b44_gstrings~0.base, 1188 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1189 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1190 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1191 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 1192 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(122, ~#b44_gstrings~0.base, 1193 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1194 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1195 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1196 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1197 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1198 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1199 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1200 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1216 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1217 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1218 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(102, ~#b44_gstrings~0.base, 1219 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1220 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1221 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 1222 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 1223 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1224 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1225 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1226 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1227 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1228 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1229 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1230 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1231 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1232 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1248 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1249 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1250 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 1251 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 1252 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1253 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1254 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1255 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 1256 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1257 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1258 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1259 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1260 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1261 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1262 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1280 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1281 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1282 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 1283 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1284 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 1285 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1286 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1287 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1288 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 1289 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 1290 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1291 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1292 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1293 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1294 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1295 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1296 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1297 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1312 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1313 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1314 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 1315 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1316 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(100, ~#b44_gstrings~0.base, 1317 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1318 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1319 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1320 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 1321 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(122, ~#b44_gstrings~0.base, 1322 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1323 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1324 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1344 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1345 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1346 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 1347 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1348 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(99, ~#b44_gstrings~0.base, 1349 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1350 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1351 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1352 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1353 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1354 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1355 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1376 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1377 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1378 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1379 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1380 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(105, ~#b44_gstrings~0.base, 1381 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(103, ~#b44_gstrings~0.base, 1382 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1383 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1384 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1385 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1386 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1387 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1388 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1389 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1408 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1409 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1410 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1411 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(121, ~#b44_gstrings~0.base, 1412 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(109, ~#b44_gstrings~0.base, 1413 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(98, ~#b44_gstrings~0.base, 1414 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1415 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(108, ~#b44_gstrings~0.base, 1416 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1417 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1418 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1419 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1420 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1421 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1422 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1440 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1441 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1442 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1443 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1444 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 1445 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1446 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1447 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1448 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1449 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1450 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1451 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1452 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1453 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(114, ~#b44_gstrings~0.base, 1472 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(120, ~#b44_gstrings~0.base, 1473 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1474 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1475 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(111, ~#b44_gstrings~0.base, 1476 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(110, ~#b44_gstrings~0.base, 1477 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1478 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(97, ~#b44_gstrings~0.base, 1479 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(117, ~#b44_gstrings~0.base, 1480 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1481 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(101, ~#b44_gstrings~0.base, 1482 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(95, ~#b44_gstrings~0.base, 1483 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(112, ~#b44_gstrings~0.base, 1484 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(107, ~#b44_gstrings~0.base, 1485 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(116, ~#b44_gstrings~0.base, 1486 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(115, ~#b44_gstrings~0.base, 1487 + ~#b44_gstrings~0.offset, 1);call write~unchecked~int(0, ~#b44_gstrings~0.base, 1488 + ~#b44_gstrings~0.offset, 1);~LDV_IN_INTERRUPT~0 := 0;~ldv_spin~0 := 0;call ~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset := #Ultimate.alloc(128);call write~init~int(5348, ~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset, 4);call write~init~int(17409, ~#b44_pci_tbl~0.base, 4 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 8 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 12 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 16 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 20 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 24 + ~#b44_pci_tbl~0.offset, 8);call write~init~int(5348, ~#b44_pci_tbl~0.base, 32 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(17410, ~#b44_pci_tbl~0.base, 36 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 40 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 44 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 48 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 52 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 56 + ~#b44_pci_tbl~0.offset, 8);call write~init~int(5348, ~#b44_pci_tbl~0.base, 64 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(5900, ~#b44_pci_tbl~0.base, 68 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 72 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 76 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 80 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 84 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 88 + ~#b44_pci_tbl~0.offset, 8);call write~init~int(0, ~#b44_pci_tbl~0.base, 96 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 100 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 104 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 108 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 112 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 116 + ~#b44_pci_tbl~0.offset, 4);call write~init~int(0, ~#b44_pci_tbl~0.base, 120 + ~#b44_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;call ~#b44_pci_driver~0.base, ~#b44_pci_driver~0.offset := #Ultimate.alloc(301);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 8 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(#t~string332.base, #t~string332.offset, ~#b44_pci_driver~0.base, 16 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset, ~#b44_pci_driver~0.base, 24 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 32 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 40 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 48 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 56 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 64 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 72 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 80 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 88 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 96 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 104 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 112 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 120 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 128 + ~#b44_pci_driver~0.offset, 8);call write~init~int(0, ~#b44_pci_driver~0.base, 136 + ~#b44_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 137 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 145 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 153 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 161 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 169 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 177 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 185 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 193 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 201 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 209 + ~#b44_pci_driver~0.offset, 8);call write~init~int(0, ~#b44_pci_driver~0.base, 217 + ~#b44_pci_driver~0.offset, 4);call write~init~int(0, ~#b44_pci_driver~0.base, 221 + ~#b44_pci_driver~0.offset, 4);call write~init~int(0, ~#b44_pci_driver~0.base, 225 + ~#b44_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 229 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 237 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 245 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 253 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 261 + ~#b44_pci_driver~0.offset, 8);call write~init~int(0, ~#b44_pci_driver~0.base, 269 + ~#b44_pci_driver~0.offset, 4);call write~init~int(0, ~#b44_pci_driver~0.base, 273 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 285 + ~#b44_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 293 + ~#b44_pci_driver~0.offset, 8);call ~#b44_ssb_tbl~0.base, ~#b44_ssb_tbl~0.offset := #Ultimate.alloc(10);call write~init~int(16963, ~#b44_ssb_tbl~0.base, ~#b44_ssb_tbl~0.offset, 2);call write~init~int(2054, ~#b44_ssb_tbl~0.base, 2 + ~#b44_ssb_tbl~0.offset, 2);call write~init~int(255, ~#b44_ssb_tbl~0.base, 4 + ~#b44_ssb_tbl~0.offset, 1);call write~init~int(0, ~#b44_ssb_tbl~0.base, 5 + ~#b44_ssb_tbl~0.offset, 2);call write~init~int(0, ~#b44_ssb_tbl~0.base, 7 + ~#b44_ssb_tbl~0.offset, 2);call write~init~int(0, ~#b44_ssb_tbl~0.base, 9 + ~#b44_ssb_tbl~0.offset, 1);~__mod_ssb_device_table~0.vendor := 0;~__mod_ssb_device_table~0.coreid := 0;~__mod_ssb_device_table~0.revision := 0;call ~#b44_ethtool_ops~0.base, ~#b44_ethtool_ops~0.offset := #Ultimate.alloc(368);call write~init~$Pointer$(#funAddr~b44_get_settings.base, #funAddr~b44_get_settings.offset, ~#b44_ethtool_ops~0.base, ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_settings.base, #funAddr~b44_set_settings.offset, ~#b44_ethtool_ops~0.base, 8 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_drvinfo.base, #funAddr~b44_get_drvinfo.offset, ~#b44_ethtool_ops~0.base, 16 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 24 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 32 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_wol.base, #funAddr~b44_get_wol.offset, ~#b44_ethtool_ops~0.base, 40 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_wol.base, #funAddr~b44_set_wol.offset, ~#b44_ethtool_ops~0.base, 48 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_msglevel.base, #funAddr~b44_get_msglevel.offset, ~#b44_ethtool_ops~0.base, 56 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_msglevel.base, #funAddr~b44_set_msglevel.offset, ~#b44_ethtool_ops~0.base, 64 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_nway_reset.base, #funAddr~b44_nway_reset.offset, ~#b44_ethtool_ops~0.base, 72 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#b44_ethtool_ops~0.base, 80 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 88 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 96 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 104 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 112 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 120 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_ringparam.base, #funAddr~b44_get_ringparam.offset, ~#b44_ethtool_ops~0.base, 128 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_ringparam.base, #funAddr~b44_set_ringparam.offset, ~#b44_ethtool_ops~0.base, 136 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_pauseparam.base, #funAddr~b44_get_pauseparam.offset, ~#b44_ethtool_ops~0.base, 144 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_pauseparam.base, #funAddr~b44_set_pauseparam.offset, ~#b44_ethtool_ops~0.base, 152 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 160 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_strings.base, #funAddr~b44_get_strings.offset, ~#b44_ethtool_ops~0.base, 168 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 176 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_ethtool_stats.base, #funAddr~b44_get_ethtool_stats.offset, ~#b44_ethtool_ops~0.base, 184 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 192 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 200 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 208 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 216 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_sset_count.base, #funAddr~b44_get_sset_count.offset, ~#b44_ethtool_ops~0.base, 224 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 232 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 240 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 248 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 256 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 264 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 272 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 280 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 288 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 296 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 304 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 312 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 320 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 328 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 336 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 344 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 352 + ~#b44_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 360 + ~#b44_ethtool_ops~0.offset, 8);call ~#b44_netdev_ops~0.base, ~#b44_netdev_ops~0.offset := #Ultimate.alloc(408);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 8 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_open.base, #funAddr~b44_open.offset, ~#b44_netdev_ops~0.base, 16 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_close.base, #funAddr~b44_close.offset, ~#b44_netdev_ops~0.base, 24 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_start_xmit.base, #funAddr~b44_start_xmit.offset, ~#b44_netdev_ops~0.base, 32 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 40 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 48 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_rx_mode.base, #funAddr~b44_set_rx_mode.offset, ~#b44_netdev_ops~0.base, 56 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_set_mac_addr.base, #funAddr~b44_set_mac_addr.offset, ~#b44_netdev_ops~0.base, 64 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#b44_netdev_ops~0.base, 72 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_ioctl.base, #funAddr~b44_ioctl.offset, ~#b44_netdev_ops~0.base, 80 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 88 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_change_mtu.base, #funAddr~b44_change_mtu.offset, ~#b44_netdev_ops~0.base, 96 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 104 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_tx_timeout.base, #funAddr~b44_tx_timeout.offset, ~#b44_netdev_ops~0.base, 112 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_get_stats64.base, #funAddr~b44_get_stats64.offset, ~#b44_netdev_ops~0.base, 120 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 128 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 136 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 144 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_poll_controller.base, #funAddr~b44_poll_controller.offset, ~#b44_netdev_ops~0.base, 152 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 160 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 168 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 176 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 184 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 192 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 200 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 208 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 216 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 224 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 232 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 240 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 248 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 256 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 264 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 272 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 280 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 288 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 296 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 304 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 312 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 320 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 328 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 336 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 344 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 352 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 360 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 368 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 376 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 384 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 392 + ~#b44_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_netdev_ops~0.base, 400 + ~#b44_netdev_ops~0.offset, 8);call ~#b44_ssb_driver~0.base, ~#b44_ssb_driver~0.offset := #Ultimate.alloc(169);call write~init~$Pointer$(#t~string1128.base, #t~string1128.offset, ~#b44_ssb_driver~0.base, ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(~#b44_ssb_tbl~0.base, ~#b44_ssb_tbl~0.offset, ~#b44_ssb_driver~0.base, 8 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_init_one.base, #funAddr~b44_init_one.offset, ~#b44_ssb_driver~0.base, 16 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_remove_one.base, #funAddr~b44_remove_one.offset, ~#b44_ssb_driver~0.base, 24 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_suspend.base, #funAddr~b44_suspend.offset, ~#b44_ssb_driver~0.base, 32 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~b44_resume.base, #funAddr~b44_resume.offset, ~#b44_ssb_driver~0.base, 40 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 48 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 56 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 64 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 72 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 80 + ~#b44_ssb_driver~0.offset, 8);call write~init~int(0, ~#b44_ssb_driver~0.base, 88 + ~#b44_ssb_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 89 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 97 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 105 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 113 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 121 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 129 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 137 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 145 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 153 + ~#b44_ssb_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#b44_ssb_driver~0.base, 161 + ~#b44_ssb_driver~0.offset, 8); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(#NULL.base)|=9223372036854775826, |old(#NULL.offset)|=9223372036854776706, |old(#t~string1054.base)|=9223372036854777109, |old(#t~string1054.offset)|=9223372036854775930, |old(#t~string1059.base)|=9223372036854776584, |old(#t~string1059.offset)|=9223372036854775984, |old(#t~string1060.base)|=9223372036854777304, |old(#t~string1060.offset)|=9223372036854777281, |old(#t~string1061.base)|=9223372036854776802, |old(#t~string1061.offset)|=9223372036854776788, |old(#t~string1068.base)|=9223372036854776534, |old(#t~string1068.offset)|=9223372036854776243, |old(#t~string1074.base)|=9223372036854776557, |old(#t~string1074.offset)|=9223372036854777215, |old(#t~string1079.base)|=9223372036854777228, |old(#t~string1079.offset)|=9223372036854776343, |old(#t~string1084.base)|=9223372036854776272, |old(#t~string1084.offset)|=9223372036854776760, |old(#t~string1088.base)|=9223372036854775844, |old(#t~string1088.offset)|=9223372036854776259, |old(#t~string1095.base)|=9223372036854777107, |old(#t~string1095.offset)|=9223372036854777118, |old(#t~string1098.base)|=9223372036854777266, |old(#t~string1098.offset)|=9223372036854776839, |old(#t~string1099.base)|=9223372036854775982, |old(#t~string1099.offset)|=9223372036854776573, |old(#t~string1120.base)|=9223372036854776278, |old(#t~string1120.offset)|=9223372036854775830, |old(#t~string1125.base)|=9223372036854777297, |old(#t~string1125.offset)|=9223372036854775819, |old(#t~string1128.base)|=9223372036854777078, |old(#t~string1128.offset)|=9223372036854776767, |old(#t~string161.base)|=9223372036854775917, |old(#t~string161.offset)|=9223372036854776331, |old(#t~string223.base)|=9223372036854777400, |old(#t~string223.offset)|=9223372036854776204, |old(#t~string226.base)|=9223372036854776816, |old(#t~string226.offset)|=9223372036854776147, |old(#t~string332.base)|=9223372036854776220, |old(#t~string332.offset)|=9223372036854776973, |old(#t~string342.base)|=9223372036854776713, |old(#t~string342.offset)|=9223372036854776952, |old(#t~string343.base)|=9223372036854776157, |old(#t~string343.offset)|=9223372036854777257, |old(#t~string344.base)|=9223372036854777249, |old(#t~string344.offset)|=9223372036854776424, |old(#t~string375.base)|=9223372036854776699, |old(#t~string375.offset)|=9223372036854776749, |old(#t~string411.base)|=9223372036854776003, |old(#t~string411.offset)|=9223372036854776216, |old(#t~string414.base)|=9223372036854776225, |old(#t~string414.offset)|=9223372036854777040, |old(#t~string418.base)|=9223372036854777289, |old(#t~string418.offset)|=9223372036854777243, |old(#t~string419.base)|=9223372036854777024, |old(#t~string419.offset)|=9223372036854776547, |old(#t~string423.base)|=9223372036854776294, |old(#t~string423.offset)|=9223372036854776638, |old(#t~string425.base)|=9223372036854776201, |old(#t~string425.offset)|=9223372036854776495, |old(#t~string426.base)|=9223372036854776305, |old(#t~string426.offset)|=9223372036854777256, |old(#t~string429.base)|=9223372036854776502, |old(#t~string429.offset)|=9223372036854777155, |old(#t~string430.base)|=9223372036854775836, |old(#t~string430.offset)|=9223372036854775935, |old(#t~string468.base)|=9223372036854776656, |old(#t~string468.offset)|=9223372036854776593, |old(#t~string472.base)|=9223372036854776369, |old(#t~string472.offset)|=9223372036854775868, |old(#t~string598.base)|=9223372036854777284, |old(#t~string598.offset)|=9223372036854777028, |old(#t~string603.base)|=9223372036854776722, |old(#t~string603.offset)|=9223372036854776678, |old(#t~string617.base)|=9223372036854776691, |old(#t~string617.offset)|=9223372036854776754, |old(#t~string764.base)|=9223372036854776959, |old(#t~string764.offset)|=9223372036854776391, |old(#t~string776.base)|=9223372036854775852, |old(#t~string776.offset)|=9223372036854776224, |old(#t~string808.base)|=9223372036854777180, |old(#t~string808.offset)|=9223372036854777152, |old(#t~string916.base)|=9223372036854777335, |old(#t~string916.offset)|=9223372036854776560, |old(#t~string918.base)|=9223372036854776362, |old(#t~string918.offset)|=9223372036854776130, |old(#t~string927.base)|=9223372036854776690, |old(#t~string927.offset)|=9223372036854775869, |old(#t~string930.base)|=9223372036854775884, |old(#t~string930.offset)|=9223372036854776338, |old(~#b44_ethtool_ops~0.base)|=9223372036854776898, |old(~#b44_ethtool_ops~0.offset)|=9223372036854777051, |old(~#b44_gstrings~0.base)|=9223372036854777102, |old(~#b44_gstrings~0.offset)|=9223372036854776408, |old(~#b44_netdev_ops~0.base)|=9223372036854777258, |old(~#b44_netdev_ops~0.offset)|=9223372036854776354, |old(~#b44_pci_driver~0.base)|=9223372036854776066, |old(~#b44_pci_driver~0.offset)|=9223372036854777017, |old(~#b44_pci_tbl~0.base)|=9223372036854776578, |old(~#b44_pci_tbl~0.offset)|=9223372036854776832, |old(~#b44_ssb_driver~0.base)|=9223372036854776530, |old(~#b44_ssb_driver~0.offset)|=9223372036854775993, |old(~#b44_ssb_tbl~0.base)|=9223372036854776525, |old(~#b44_ssb_tbl~0.offset)|=9223372036854775881, |old(~__mod_pci_device_table~0.class)|=9223372036854777386, |old(~__mod_pci_device_table~0.class_mask)|=9223372036854777010, |old(~__mod_pci_device_table~0.device)|=9223372036854777142, |old(~__mod_pci_device_table~0.driver_data)|=9223372036854776236, |old(~__mod_pci_device_table~0.subdevice)|=9223372036854776184, |old(~__mod_pci_device_table~0.subvendor)|=9223372036854776040, |old(~__mod_pci_device_table~0.vendor)|=9223372036854777261, |old(~__mod_ssb_device_table~0.coreid)|=9223372036854777361, |old(~__mod_ssb_device_table~0.revision)|=9223372036854776519, |old(~__mod_ssb_device_table~0.vendor)|=9223372036854776512, |old(~b44_debug~0)|=9223372036854776380, |old(~dma_desc_sync_size~0)|=9223372036854776521, |old(~instance~0)|=9223372036854776310, |old(~LDV_IN_INTERRUPT~0)|=9223372036854777231, |old(~ldv_spin~0)|=9223372036854776935, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=0, ~ldv_spin~0=0] [?] assume true; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(#NULL.base)|=9223372036854775826, |old(#NULL.offset)|=9223372036854776706, |old(#t~string1054.base)|=9223372036854777109, |old(#t~string1054.offset)|=9223372036854775930, |old(#t~string1059.base)|=9223372036854776584, |old(#t~string1059.offset)|=9223372036854775984, |old(#t~string1060.base)|=9223372036854777304, |old(#t~string1060.offset)|=9223372036854777281, |old(#t~string1061.base)|=9223372036854776802, |old(#t~string1061.offset)|=9223372036854776788, |old(#t~string1068.base)|=9223372036854776534, |old(#t~string1068.offset)|=9223372036854776243, |old(#t~string1074.base)|=9223372036854776557, |old(#t~string1074.offset)|=9223372036854777215, |old(#t~string1079.base)|=9223372036854777228, |old(#t~string1079.offset)|=9223372036854776343, |old(#t~string1084.base)|=9223372036854776272, |old(#t~string1084.offset)|=9223372036854776760, |old(#t~string1088.base)|=9223372036854775844, |old(#t~string1088.offset)|=9223372036854776259, |old(#t~string1095.base)|=9223372036854777107, |old(#t~string1095.offset)|=9223372036854777118, |old(#t~string1098.base)|=9223372036854777266, |old(#t~string1098.offset)|=9223372036854776839, |old(#t~string1099.base)|=9223372036854775982, |old(#t~string1099.offset)|=9223372036854776573, |old(#t~string1120.base)|=9223372036854776278, |old(#t~string1120.offset)|=9223372036854775830, |old(#t~string1125.base)|=9223372036854777297, |old(#t~string1125.offset)|=9223372036854775819, |old(#t~string1128.base)|=9223372036854777078, |old(#t~string1128.offset)|=9223372036854776767, |old(#t~string161.base)|=9223372036854775917, |old(#t~string161.offset)|=9223372036854776331, |old(#t~string223.base)|=9223372036854777400, |old(#t~string223.offset)|=9223372036854776204, |old(#t~string226.base)|=9223372036854776816, |old(#t~string226.offset)|=9223372036854776147, |old(#t~string332.base)|=9223372036854776220, |old(#t~string332.offset)|=9223372036854776973, |old(#t~string342.base)|=9223372036854776713, |old(#t~string342.offset)|=9223372036854776952, |old(#t~string343.base)|=9223372036854776157, |old(#t~string343.offset)|=9223372036854777257, |old(#t~string344.base)|=9223372036854777249, |old(#t~string344.offset)|=9223372036854776424, |old(#t~string375.base)|=9223372036854776699, |old(#t~string375.offset)|=9223372036854776749, |old(#t~string411.base)|=9223372036854776003, |old(#t~string411.offset)|=9223372036854776216, |old(#t~string414.base)|=9223372036854776225, |old(#t~string414.offset)|=9223372036854777040, |old(#t~string418.base)|=9223372036854777289, |old(#t~string418.offset)|=9223372036854777243, |old(#t~string419.base)|=9223372036854777024, |old(#t~string419.offset)|=9223372036854776547, |old(#t~string423.base)|=9223372036854776294, |old(#t~string423.offset)|=9223372036854776638, |old(#t~string425.base)|=9223372036854776201, |old(#t~string425.offset)|=9223372036854776495, |old(#t~string426.base)|=9223372036854776305, |old(#t~string426.offset)|=9223372036854777256, |old(#t~string429.base)|=9223372036854776502, |old(#t~string429.offset)|=9223372036854777155, |old(#t~string430.base)|=9223372036854775836, |old(#t~string430.offset)|=9223372036854775935, |old(#t~string468.base)|=9223372036854776656, |old(#t~string468.offset)|=9223372036854776593, |old(#t~string472.base)|=9223372036854776369, |old(#t~string472.offset)|=9223372036854775868, |old(#t~string598.base)|=9223372036854777284, |old(#t~string598.offset)|=9223372036854777028, |old(#t~string603.base)|=9223372036854776722, |old(#t~string603.offset)|=9223372036854776678, |old(#t~string617.base)|=9223372036854776691, |old(#t~string617.offset)|=9223372036854776754, |old(#t~string764.base)|=9223372036854776959, |old(#t~string764.offset)|=9223372036854776391, |old(#t~string776.base)|=9223372036854775852, |old(#t~string776.offset)|=9223372036854776224, |old(#t~string808.base)|=9223372036854777180, |old(#t~string808.offset)|=9223372036854777152, |old(#t~string916.base)|=9223372036854777335, |old(#t~string916.offset)|=9223372036854776560, |old(#t~string918.base)|=9223372036854776362, |old(#t~string918.offset)|=9223372036854776130, |old(#t~string927.base)|=9223372036854776690, |old(#t~string927.offset)|=9223372036854775869, |old(#t~string930.base)|=9223372036854775884, |old(#t~string930.offset)|=9223372036854776338, |old(~#b44_ethtool_ops~0.base)|=9223372036854776898, |old(~#b44_ethtool_ops~0.offset)|=9223372036854777051, |old(~#b44_gstrings~0.base)|=9223372036854777102, |old(~#b44_gstrings~0.offset)|=9223372036854776408, |old(~#b44_netdev_ops~0.base)|=9223372036854777258, |old(~#b44_netdev_ops~0.offset)|=9223372036854776354, |old(~#b44_pci_driver~0.base)|=9223372036854776066, |old(~#b44_pci_driver~0.offset)|=9223372036854777017, |old(~#b44_pci_tbl~0.base)|=9223372036854776578, |old(~#b44_pci_tbl~0.offset)|=9223372036854776832, |old(~#b44_ssb_driver~0.base)|=9223372036854776530, |old(~#b44_ssb_driver~0.offset)|=9223372036854775993, |old(~#b44_ssb_tbl~0.base)|=9223372036854776525, |old(~#b44_ssb_tbl~0.offset)|=9223372036854775881, |old(~__mod_pci_device_table~0.class)|=9223372036854777386, |old(~__mod_pci_device_table~0.class_mask)|=9223372036854777010, |old(~__mod_pci_device_table~0.device)|=9223372036854777142, |old(~__mod_pci_device_table~0.driver_data)|=9223372036854776236, |old(~__mod_pci_device_table~0.subdevice)|=9223372036854776184, |old(~__mod_pci_device_table~0.subvendor)|=9223372036854776040, |old(~__mod_pci_device_table~0.vendor)|=9223372036854777261, |old(~__mod_ssb_device_table~0.coreid)|=9223372036854777361, |old(~__mod_ssb_device_table~0.revision)|=9223372036854776519, |old(~__mod_ssb_device_table~0.vendor)|=9223372036854776512, |old(~b44_debug~0)|=9223372036854776380, |old(~dma_desc_sync_size~0)|=9223372036854776521, |old(~instance~0)|=9223372036854776310, |old(~LDV_IN_INTERRUPT~0)|=9223372036854777231, |old(~ldv_spin~0)|=9223372036854776935, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=0, ~ldv_spin~0=0] [?] RET #3875#return; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=0, ~ldv_spin~0=0] [?] CALL call #t~ret1172 := main(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=0, ~ldv_spin~0=0] [?] havoc ~var_group1~0.base, ~var_group1~0.offset;havoc ~var_group2~0.base, ~var_group2~0.offset;havoc ~var_group3~0.base, ~var_group3~0.offset;havoc ~var_group4~0.base, ~var_group4~0.offset;havoc ~var_group5~0.base, ~var_group5~0.offset;havoc ~var_group6~0.base, ~var_group6~0.offset;havoc ~var_b44_set_msglevel_59_p1~0;havoc ~var_b44_get_strings_68_p1~0;havoc ~var_b44_get_strings_68_p2~0.base, ~var_b44_get_strings_68_p2~0.offset;havoc ~var_b44_get_sset_count_69_p1~0;havoc ~var_group7~0.base, ~var_group7~0.offset;havoc ~var_b44_get_ethtool_stats_70_p2~0.base, ~var_b44_get_ethtool_stats_70_p2~0.offset;havoc ~res_b44_open_45~0;havoc ~res_b44_close_53~0;havoc ~var_group8~0.base, ~var_group8~0.offset;havoc ~var_group9~0.base, ~var_group9~0.offset;havoc ~var_b44_set_mac_addr_43_p1~0.base, ~var_b44_set_mac_addr_43_p1~0.offset;havoc ~var_group10~0.base, ~var_group10~0.offset;havoc ~var_b44_ioctl_73_p2~0;havoc ~var_b44_change_mtu_34_p1~0;havoc ~var_group11~0.base, ~var_group11~0.offset;havoc ~var_b44_init_one_75_p1~0.base, ~var_b44_init_one_75_p1~0.offset;havoc ~res_b44_init_one_75~0;call ~#var_b44_suspend_77_p1~0.base, ~#var_b44_suspend_77_p1~0.offset := #Ultimate.alloc(4);havoc ~var_b44_interrupt_31_p0~0;havoc ~var_b44_interrupt_31_p1~0.base, ~var_b44_interrupt_31_p1~0.offset;havoc ~var_b44_timer_25_p0~0;havoc ~ldv_s_b44_netdev_ops_net_device_ops~0;havoc ~ldv_s_b44_ssb_driver_ssb_driver~0;havoc ~tmp~92;havoc ~tmp___0~42;havoc ~tmp___1~27;~ldv_s_b44_netdev_ops_net_device_ops~0 := 0;~ldv_s_b44_ssb_driver_ssb_driver~0 := 0;~LDV_IN_INTERRUPT~0 := 1;call ldv_initialize();call ldv_handler_precall(); VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call #t~ret1136 := b44_init(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] havoc ~dma_desc_align_size~0;havoc ~tmp~91;havoc ~err~8;havoc ~__max1~0;havoc ~__max2~0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call #t~ret1130 := dma_get_cache_alignment(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] #res := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_get_cache_alignment_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume true; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_get_cache_alignment_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] RET #3725#return; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_init_#t~ret1130|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume -2147483648 <= #t~ret1130 && #t~ret1130 <= 2147483647;~tmp~91 := #t~ret1130;havoc #t~ret1130;~dma_desc_align_size~0 := ~tmp~91;~__max1~0 := ~dma_desc_align_size~0;~__max2~0 := 8; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !(~__max1~0 % 4294967296 > ~__max2~0 % 4294967296);#t~ite1131 := ~__max2~0; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_init_#t~ite1131|=8, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] ~dma_desc_sync_size~0 := (if #t~ite1131 % 4294967296 % 4294967296 <= 2147483647 then #t~ite1131 % 4294967296 % 4294967296 else #t~ite1131 % 4294967296 % 4294967296 - 4294967296);havoc #t~ite1131; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call #t~ret1132 := b44_pci_init(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] havoc ~err~7;~err~7 := 0;call #t~ret1129 := ssb_pcihost_register(~#b44_pci_driver~0.base, ~#b44_pci_driver~0.offset);assume -2147483648 <= #t~ret1129 && #t~ret1129 <= 2147483647;~err~7 := #t~ret1129;havoc #t~ret1129;#res := ~err~7; VAL [b44_pci_init_~err~7=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_pci_init_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume true; VAL [b44_pci_init_~err~7=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_pci_init_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] RET #3727#return; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_init_#t~ret1132|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume -2147483648 <= #t~ret1132 && #t~ret1132 <= 2147483647;~err~8 := #t~ret1132;havoc #t~ret1132; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~err~8=0, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !(0 != ~err~8);call #t~ret1133 := __ssb_driver_register(~#b44_ssb_driver~0.base, ~#b44_ssb_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset);assume -2147483648 <= #t~ret1133 && #t~ret1133 <= 2147483647;~err~8 := #t~ret1133;havoc #t~ret1133; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~err~8=0, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !(0 != ~err~8); VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~err~8=0, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] #res := ~err~8; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~err~8=0, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_init_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume true; VAL [b44_init_~__max1~0=1, b44_init_~__max2~0=8, b44_init_~dma_desc_align_size~0=1, b44_init_~err~8=0, b44_init_~tmp~91=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_init_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] RET #3541#return; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~ret1136|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume -2147483648 <= #t~ret1136 && #t~ret1136 <= 2147483647;~tmp~92 := #t~ret1136;havoc #t~ret1136; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !(0 != ~tmp~92); VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume -2147483648 <= #t~nondet1159 && #t~nondet1159 <= 2147483647;~tmp___1~27 := #t~nondet1159;havoc #t~nondet1159; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume (0 != ~tmp___1~27 || 0 != ~ldv_s_b44_netdev_ops_net_device_ops~0) || 0 != ~ldv_s_b44_ssb_driver_ssb_driver~0; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume -2147483648 <= #t~nondet1137 && #t~nondet1137 <= 2147483647;~tmp___0~42 := #t~nondet1137;havoc #t~nondet1137;#t~switch1138 := 0 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 1 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 2 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 3 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 4 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 5 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 6 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 7 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 8 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 9 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 10 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 11 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 12 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 13 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 14 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 15 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 16 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=false, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume !#t~switch1138;#t~switch1138 := #t~switch1138 || 17 == ~tmp___0~42; VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=true, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume #t~switch1138;call ldv_handler_precall(); VAL [main_~ldv_s_b44_netdev_ops_net_device_ops~0=0, main_~ldv_s_b44_ssb_driver_ssb_driver~0=0, main_~tmp___0~42=17, main_~tmp___1~27=1, main_~tmp~92=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |main_#t~switch1138|=true, |main_~#var_b44_suspend_77_p1~0.base|=9223372036854776649, |main_~#var_b44_suspend_77_p1~0.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call #t~ret1149 := b44_start_xmit(~var_group8~0.base, ~var_group8~0.offset, ~var_group1~0.base, ~var_group1~0.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] ~skb.base, ~skb.offset := #in~skb.base, #in~skb.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~bp~6.base, ~bp~6.offset;havoc ~tmp~54.base, ~tmp~54.offset;havoc ~rc~1;havoc ~mapping~1;havoc ~len~1;havoc ~entry~0;havoc ~ctrl~2;havoc ~flags~1;havoc ~tmp___0~23;havoc ~bounce_skb~0.base, ~bounce_skb~0.offset;havoc ~tmp___1~13;havoc ~tmp___2~7;havoc ~tmp___3~5;havoc ~tmp___4~3.base, ~tmp___4~3.offset;havoc ~tmp___5~2; VAL [b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call #t~ret604.base, #t~ret604.offset := netdev_priv(~dev.base, ~dev.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |netdev_priv_#in~dev.base|=9223372036854776780, |netdev_priv_#in~dev.offset|=(- 2816), |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 2816 + ~dev.offset; VAL [netdev_priv_~dev.base=9223372036854776780, netdev_priv_~dev.offset=(- 2816), |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |netdev_priv_#in~dev.base|=9223372036854776780, |netdev_priv_#in~dev.offset|=(- 2816), |netdev_priv_#res.base|=9223372036854776780, |netdev_priv_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] assume true; VAL [netdev_priv_~dev.base=9223372036854776780, netdev_priv_~dev.offset=(- 2816), |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |netdev_priv_#in~dev.base|=9223372036854776780, |netdev_priv_#in~dev.offset|=(- 2816), |netdev_priv_#res.base|=9223372036854776780, |netdev_priv_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] RET #3015#return; VAL [b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~ret604.base|=9223372036854776780, |b44_start_xmit_#t~ret604.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] ~tmp~54.base, ~tmp~54.offset := #t~ret604.base, #t~ret604.offset;havoc #t~ret604.base, #t~ret604.offset;~bp~6.base, ~bp~6.offset := ~tmp~54.base, ~tmp~54.offset;~rc~1 := 0;call #t~mem605 := read~int(~skb.base, 104 + ~skb.offset, 4);~len~1 := #t~mem605;havoc #t~mem605; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] CALL call ldv_spin_lock(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0] [?] ~ldv_spin~0 := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3017#return; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] call #t~mem606 := read~int(~bp~6.base, 96 + ~bp~6.offset, 4);call #t~mem607 := read~int(~bp~6.base, 92 + ~bp~6.offset, 4); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem606|=29, |b44_start_xmit_#t~mem607|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(#t~mem606 % 4294967296 <= #t~mem607 % 4294967296);call #t~mem611 := read~int(~bp~6.base, 96 + ~bp~6.offset, 4);call #t~mem612 := read~int(~bp~6.base, 92 + ~bp~6.offset, 4);call #t~mem613 := read~int(~bp~6.base, 824 + ~bp~6.offset, 4);#t~ite614 := (if 512 == (#t~mem611 - #t~mem612 + #t~mem613) % 4294967296 then 1 else 0); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~ite614|=0, |b44_start_xmit_#t~mem606|=29, |b44_start_xmit_#t~mem607|=0, |b44_start_xmit_#t~mem611|=29, |b44_start_xmit_#t~mem612|=0, |b44_start_xmit_#t~mem613|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret615 := ldv__builtin_expect(#t~ite614, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~exp := #in~exp;~c := #in~c;#res := ~exp; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |ldv__builtin_expect_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |ldv__builtin_expect_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3019#return; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~ite614|=0, |b44_start_xmit_#t~mem606|=29, |b44_start_xmit_#t~mem607|=0, |b44_start_xmit_#t~mem611|=29, |b44_start_xmit_#t~mem612|=0, |b44_start_xmit_#t~mem613|=0, |b44_start_xmit_#t~ret615|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -9223372036854775808 <= #t~ret615 && #t~ret615 <= 9223372036854775807;~tmp___0~23 := #t~ret615;havoc #t~mem612;havoc #t~mem608;havoc #t~mem613;havoc #t~mem611;havoc #t~ret615;havoc #t~ite614;havoc #t~mem607;havoc #t~mem606;havoc #t~mem609;havoc #t~mem610; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 != ~tmp___0~23);call #t~mem618.base, #t~mem618.offset := read~$Pointer$(~bp~6.base, 788 + ~bp~6.offset, 8);call #t~mem619.base, #t~mem619.offset := read~$Pointer$(#t~mem618.base, 16 + #t~mem618.offset, 8);call #t~mem620.base, #t~mem620.offset := read~$Pointer$(~skb.base, 247 + ~skb.offset, 8); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem618.base|=9223372036854776944, |b44_start_xmit_#t~mem618.offset|=0, |b44_start_xmit_#t~mem619.base|=0, |b44_start_xmit_#t~mem619.offset|=0, |b44_start_xmit_#t~mem620.base|=9223372036854775853, |b44_start_xmit_#t~mem620.offset|=9223372036854777190, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret621 := dma_map_single_attrs(#t~mem619.base, #t~mem619.offset, #t~mem620.base, #t~mem620.offset, ~len~1, 1, 0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;~size := #in~size;~dir := #in~dir;~attrs.base, ~attrs.offset := #in~attrs.base, #in~attrs.offset;havoc ~ops~0.base, ~ops~0.offset;havoc ~tmp~3.base, ~tmp~3.offset;havoc ~addr~0;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret85.base, #t~ret85.offset := get_dma_ops(~dev.base, ~dev.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~exp := #in~exp;~c := #in~c;#res := ~exp; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3347#return; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~ret81|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807;~tmp~2 := #t~ret81;havoc #t~ret81;#t~short83 := 0 != ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83;havoc #t~mem82.base, #t~mem82.offset;havoc #t~short83;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3511#return; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#t~ret85.base|=9223372036854776459, |dma_map_single_attrs_#t~ret85.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~tmp~3.base, ~tmp~3.offset := #t~ret85.base, #t~ret85.offset;havoc #t~ret85.base, #t~ret85.offset;~ops~0.base, ~ops~0.offset := ~tmp~3.base, ~tmp~3.offset; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call kmemcheck_mark_initialized(~ptr.base, ~ptr.offset, ~size); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |kmemcheck_mark_initialized_#in~address.base|=9223372036854775853, |kmemcheck_mark_initialized_#in~address.offset|=9223372036854777190, |kmemcheck_mark_initialized_#in~n|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~address.base, ~address.offset := #in~address.base, #in~address.offset;~n := #in~n; VAL [kmemcheck_mark_initialized_~address.base=9223372036854775853, kmemcheck_mark_initialized_~address.offset=9223372036854777190, kmemcheck_mark_initialized_~n=1073741824, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |kmemcheck_mark_initialized_#in~address.base|=9223372036854775853, |kmemcheck_mark_initialized_#in~address.offset|=9223372036854777190, |kmemcheck_mark_initialized_#in~n|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [kmemcheck_mark_initialized_~address.base=9223372036854775853, kmemcheck_mark_initialized_~address.offset=9223372036854777190, kmemcheck_mark_initialized_~n=1073741824, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |kmemcheck_mark_initialized_#in~address.base|=9223372036854775853, |kmemcheck_mark_initialized_#in~address.offset|=9223372036854777190, |kmemcheck_mark_initialized_#in~n|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3513#return; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret86 := valid_dma_direction(~dir); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |valid_dma_direction_#in~dma_direction|=1, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dma_direction := #in~dma_direction;#res := (if (0 == ~dma_direction || 1 == ~dma_direction) || 2 == ~dma_direction then 1 else 0); VAL [valid_dma_direction_~dma_direction=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |valid_dma_direction_#in~dma_direction|=1, |valid_dma_direction_#res|=1, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [valid_dma_direction_~dma_direction=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |valid_dma_direction_#in~dma_direction|=1, |valid_dma_direction_#res|=1, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3515#return; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#t~ret86|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -2147483648 <= #t~ret86 && #t~ret86 <= 2147483647;~tmp___0~0 := #t~ret86;havoc #t~ret86; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret87 := ldv__builtin_expect((if 0 == ~tmp___0~0 then 1 else 0), 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~exp := #in~exp;~c := #in~c;#res := ~exp; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |ldv__builtin_expect_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=0, |ldv__builtin_expect_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3517#return; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#t~ret87|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -9223372036854775808 <= #t~ret87 && #t~ret87 <= 9223372036854775807;~tmp___1~0 := #t~ret87;havoc #t~ret87; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp___1~0=0, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 != ~tmp___1~0);call #t~ret88 := __phys_addr(~ptr.base + ~ptr.offset);~tmp___2~0 := #t~ret88;havoc #t~ret88;call #t~mem96.base, #t~mem96.offset := read~$Pointer$(~ops~0.base, 32 + ~ops~0.offset, 8); VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp___1~0=0, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#t~mem96.base|=9223372036854777085, |dma_map_single_attrs_#t~mem96.offset|=9223372036854776705, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret97 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0(~dev.base, ~dev.offset, 0, (if (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 else (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~bitwiseAnd(~ptr.base + ~ptr.offset, 4095), ~size, ~dir, ~attrs.base, ~attrs.offset, #t~mem96.base, #t~mem96.offset); VAL [|##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.base|=9223372036854777085, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.offset|=9223372036854776705, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.offset|=9223372036854775807, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~93|=1073741824, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~94|=1, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.offset|=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] #~90.base, #~90.offset := #in~90.base, #in~90.offset;#~91.base, #~91.offset := #in~91.base, #in~91.offset;#~92 := #in~92;#~93 := #in~93;#~94 := #in~94;#~95.base, #~95.offset := #in~95.base, #in~95.offset; VAL [|##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.base|=9223372036854777085, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.offset|=9223372036854776705, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.offset|=9223372036854775807, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~92|=9223372036854777240, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~93|=1073741824, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~94|=1, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~90.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~90.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~91.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~91.offset|=9223372036854775807, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~92|=9223372036854777240, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~93|=1073741824, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~94|=1, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~95.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~95.offset|=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [|##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.base|=9223372036854777085, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp.offset|=9223372036854776705, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~90.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~91.offset|=9223372036854775807, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~92|=9223372036854777240, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~93|=1073741824, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~94|=1, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~95.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~90.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~90.offset|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~91.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~91.offset|=9223372036854775807, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~92|=9223372036854777240, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~93|=1073741824, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~94|=1, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~95.base|=0, |##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~95.offset|=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3519#return; VAL [dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp___1~0=0, dma_map_single_attrs_~tmp___2~0=37779030942148963860479, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#t~mem96.base|=9223372036854777085, |dma_map_single_attrs_#t~mem96.offset|=9223372036854776705, |dma_map_single_attrs_#t~ret97|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~addr~0 := #t~ret97;havoc #t~mem96.base, #t~mem96.offset;havoc #t~ret97;call #t~ret98 := __phys_addr(~ptr.base + ~ptr.offset);~tmp___3~0 := #t~ret98;havoc #t~ret98;call debug_dma_map_page(~dev.base, ~dev.offset, 0, (if (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 else (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~bitwiseAnd(~ptr.base + ~ptr.offset, 4095), ~size, ~dir, ~addr~0, 1);#res := ~addr~0; VAL [dma_map_single_attrs_~addr~0=0, dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp___1~0=0, dma_map_single_attrs_~tmp___2~0=37779030942148963860479, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [dma_map_single_attrs_~addr~0=0, dma_map_single_attrs_~attrs.base=0, dma_map_single_attrs_~attrs.offset=0, dma_map_single_attrs_~dev.base=0, dma_map_single_attrs_~dev.offset=0, dma_map_single_attrs_~dir=1, dma_map_single_attrs_~ops~0.base=9223372036854776459, dma_map_single_attrs_~ops~0.offset=0, dma_map_single_attrs_~ptr.base=9223372036854775853, dma_map_single_attrs_~ptr.offset=9223372036854777190, dma_map_single_attrs_~size=1073741824, dma_map_single_attrs_~tmp___0~0=1, dma_map_single_attrs_~tmp___1~0=0, dma_map_single_attrs_~tmp___2~0=37779030942148963860479, dma_map_single_attrs_~tmp~3.base=9223372036854776459, dma_map_single_attrs_~tmp~3.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_map_single_attrs_#in~attrs.base|=0, |dma_map_single_attrs_#in~attrs.offset|=0, |dma_map_single_attrs_#in~dev.base|=0, |dma_map_single_attrs_#in~dev.offset|=0, |dma_map_single_attrs_#in~dir|=1, |dma_map_single_attrs_#in~ptr.base|=9223372036854775853, |dma_map_single_attrs_#in~ptr.offset|=9223372036854777190, |dma_map_single_attrs_#in~size|=1073741824, |dma_map_single_attrs_#res|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3023#return; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem618.base|=9223372036854776944, |b44_start_xmit_#t~mem618.offset|=0, |b44_start_xmit_#t~mem619.base|=0, |b44_start_xmit_#t~mem619.offset|=0, |b44_start_xmit_#t~mem620.base|=9223372036854775853, |b44_start_xmit_#t~mem620.offset|=9223372036854777190, |b44_start_xmit_#t~ret621|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~mapping~1 := #t~ret621;havoc #t~mem620.base, #t~mem620.offset;havoc #t~ret621;havoc #t~mem618.base, #t~mem618.offset;havoc #t~mem619.base, #t~mem619.offset;call #t~mem622.base, #t~mem622.offset := read~$Pointer$(~bp~6.base, 788 + ~bp~6.offset, 8);call #t~mem623.base, #t~mem623.offset := read~$Pointer$(#t~mem622.base, 16 + #t~mem622.offset, 8); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem622.base|=9223372036854776944, |b44_start_xmit_#t~mem622.offset|=0, |b44_start_xmit_#t~mem623.base|=0, |b44_start_xmit_#t~mem623.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret624 := dma_mapping_error(#t~mem623.base, #t~mem623.offset, ~mapping~1); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~dma_addr := #in~dma_addr;havoc ~ops~4.base, ~ops~4.offset;havoc ~tmp~7.base, ~tmp~7.offset;havoc ~tmp___0~4; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret130.base, #t~ret130.offset := get_dma_ops(~dev.base, ~dev.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~exp := #in~exp;~c := #in~c;#res := ~exp; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3347#return; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~ret81|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807;~tmp~2 := #t~ret81;havoc #t~ret81;#t~short83 := 0 != ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83;havoc #t~mem82.base, #t~mem82.offset;havoc #t~short83;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3267#return; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#t~ret130.base|=9223372036854776459, |dma_mapping_error_#t~ret130.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~tmp~7.base, ~tmp~7.offset := #t~ret130.base, #t~ret130.offset;havoc #t~ret130.base, #t~ret130.offset;~ops~4.base, ~ops~4.offset := ~tmp~7.base, ~tmp~7.offset;call debug_dma_mapping_error(~dev.base, ~dev.offset, ~dma_addr);call #t~mem131.base, #t~mem131.offset := read~$Pointer$(~ops~4.base, 96 + ~ops~4.offset, 8); VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#t~mem131.base|=0, |dma_mapping_error_#t~mem131.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 != (#t~mem131.base + #t~mem131.offset) % 18446744073709551616);havoc #t~mem131.base, #t~mem131.offset;#res := (if 0 == ~dma_addr % 18446744073709551616 then 1 else 0); VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3025#return; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem622.base|=9223372036854776944, |b44_start_xmit_#t~mem622.offset|=0, |b44_start_xmit_#t~mem623.base|=0, |b44_start_xmit_#t~mem623.offset|=0, |b44_start_xmit_#t~ret624|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -2147483648 <= #t~ret624 && #t~ret624 <= 2147483647;~tmp___5~2 := #t~ret624;havoc #t~mem622.base, #t~mem622.offset;havoc #t~ret624;havoc #t~mem623.base, #t~mem623.offset; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp___5~2=1, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume 0 != ~tmp___5~2 || (~len~1 % 4294967296 + ~mapping~1) % 18446744073709551616 > 1073741823;call #t~mem625.base, #t~mem625.offset := read~$Pointer$(~bp~6.base, 788 + ~bp~6.offset, 8);call #t~mem626.base, #t~mem626.offset := read~$Pointer$(#t~mem625.base, 16 + #t~mem625.offset, 8); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp___5~2=1, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem625.base|=9223372036854776944, |b44_start_xmit_#t~mem625.offset|=0, |b44_start_xmit_#t~mem626.base|=0, |b44_start_xmit_#t~mem626.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret627 := dma_mapping_error(#t~mem626.base, #t~mem626.offset, ~mapping~1); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~dma_addr := #in~dma_addr;havoc ~ops~4.base, ~ops~4.offset;havoc ~tmp~7.base, ~tmp~7.offset;havoc ~tmp___0~4; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret130.base, #t~ret130.offset := get_dma_ops(~dev.base, ~dev.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~exp := #in~exp;~c := #in~c;#res := ~exp; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [ldv__builtin_expect_~c=0, ldv__builtin_expect_~exp=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv__builtin_expect_#in~c|=0, |ldv__builtin_expect_#in~exp|=1, |ldv__builtin_expect_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3347#return; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~ret81|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807;~tmp~2 := #t~ret81;havoc #t~ret81;#t~short83 := 0 != ~tmp~2; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#t~short83|=true, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume #t~short83;havoc #t~mem82.base, #t~mem82.offset;havoc #t~short83;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [get_dma_ops_~dev.base=0, get_dma_ops_~dev.offset=0, get_dma_ops_~tmp~2=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |get_dma_ops_#in~dev.base|=0, |get_dma_ops_#in~dev.offset|=0, |get_dma_ops_#res.base|=9223372036854776459, |get_dma_ops_#res.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3267#return; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#t~ret130.base|=9223372036854776459, |dma_mapping_error_#t~ret130.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~tmp~7.base, ~tmp~7.offset := #t~ret130.base, #t~ret130.offset;havoc #t~ret130.base, #t~ret130.offset;~ops~4.base, ~ops~4.offset := ~tmp~7.base, ~tmp~7.offset;call debug_dma_mapping_error(~dev.base, ~dev.offset, ~dma_addr);call #t~mem131.base, #t~mem131.offset := read~$Pointer$(~ops~4.base, 96 + ~ops~4.offset, 8); VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#t~mem131.base|=0, |dma_mapping_error_#t~mem131.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 != (#t~mem131.base + #t~mem131.offset) % 18446744073709551616);havoc #t~mem131.base, #t~mem131.offset;#res := (if 0 == ~dma_addr % 18446744073709551616 then 1 else 0); VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume true; VAL [dma_mapping_error_~dev.base=0, dma_mapping_error_~dev.offset=0, dma_mapping_error_~dma_addr=0, dma_mapping_error_~ops~4.base=9223372036854776459, dma_mapping_error_~ops~4.offset=0, dma_mapping_error_~tmp~7.base=9223372036854776459, dma_mapping_error_~tmp~7.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |dma_mapping_error_#in~dev.base|=0, |dma_mapping_error_#in~dev.offset|=0, |dma_mapping_error_#in~dma_addr|=0, |dma_mapping_error_#res|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] RET #3027#return; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp___5~2=1, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |b44_start_xmit_#t~mem625.base|=9223372036854776944, |b44_start_xmit_#t~mem625.offset|=0, |b44_start_xmit_#t~mem626.base|=0, |b44_start_xmit_#t~mem626.offset|=0, |b44_start_xmit_#t~ret627|=1, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume -2147483648 <= #t~ret627 && #t~ret627 <= 2147483647;~tmp___1~13 := #t~ret627;havoc #t~mem626.base, #t~mem626.offset;havoc #t~ret627;havoc #t~mem625.base, #t~mem625.offset; VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp___1~13=1, b44_start_xmit_~tmp___5~2=1, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 == ~tmp___1~13); VAL [b44_start_xmit_~bp~6.base=9223372036854776780, b44_start_xmit_~bp~6.offset=0, b44_start_xmit_~dev.base=9223372036854776780, b44_start_xmit_~dev.offset=(- 2816), b44_start_xmit_~len~1=1073741824, b44_start_xmit_~mapping~1=0, b44_start_xmit_~rc~1=0, b44_start_xmit_~skb.base=9223372036854777391, b44_start_xmit_~skb.offset=0, b44_start_xmit_~tmp___0~23=0, b44_start_xmit_~tmp___1~13=1, b44_start_xmit_~tmp___5~2=1, b44_start_xmit_~tmp~54.base=9223372036854776780, b44_start_xmit_~tmp~54.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |b44_start_xmit_#in~dev.base|=9223372036854776780, |b44_start_xmit_#in~dev.offset|=(- 2816), |b44_start_xmit_#in~skb.base|=9223372036854777391, |b44_start_xmit_#in~skb.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call #t~ret630.base, #t~ret630.offset := alloc_skb(~len~1, 33); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |alloc_skb_#in~flags|=33, |alloc_skb_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~size := #in~size;~flags := #in~flags;havoc ~tmp~94.base, ~tmp~94.offset; VAL [alloc_skb_~flags=33, alloc_skb_~size=1073741824, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |alloc_skb_#in~flags|=33, |alloc_skb_#in~size|=1073741824, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call ldv_check_alloc_flags(~flags); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] ~flags := #in~flags; VAL [ldv_check_alloc_flags_~flags=33, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296); VAL [ldv_check_alloc_flags_~flags=33, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call ldv_error(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] assume !false; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1054.base|=9223372036854777110, |#t~string1054.offset|=0, |#t~string1059.base|=9223372036854776582, |#t~string1059.offset|=0, |#t~string1060.base|=9223372036854777301, |#t~string1060.offset|=0, |#t~string1061.base|=9223372036854776801, |#t~string1061.offset|=0, |#t~string1068.base|=9223372036854776533, |#t~string1068.offset|=0, |#t~string1074.base|=9223372036854776556, |#t~string1074.offset|=0, |#t~string1079.base|=9223372036854777229, |#t~string1079.offset|=0, |#t~string1084.base|=9223372036854776279, |#t~string1084.offset|=0, |#t~string1088.base|=9223372036854775845, |#t~string1088.offset|=0, |#t~string1095.base|=9223372036854777103, |#t~string1095.offset|=0, |#t~string1098.base|=9223372036854777267, |#t~string1098.offset|=0, |#t~string1099.base|=9223372036854775978, |#t~string1099.offset|=0, |#t~string1120.base|=9223372036854776276, |#t~string1120.offset|=0, |#t~string1125.base|=9223372036854777286, |#t~string1125.offset|=0, |#t~string1128.base|=9223372036854777077, |#t~string1128.offset|=0, |#t~string161.base|=9223372036854775919, |#t~string161.offset|=0, |#t~string223.base|=9223372036854777397, |#t~string223.offset|=0, |#t~string226.base|=9223372036854776815, |#t~string226.offset|=0, |#t~string332.base|=9223372036854776548, |#t~string332.offset|=0, |#t~string342.base|=9223372036854776711, |#t~string342.offset|=0, |#t~string343.base|=9223372036854776158, |#t~string343.offset|=0, |#t~string344.base|=9223372036854777251, |#t~string344.offset|=0, |#t~string375.base|=9223372036854776700, |#t~string375.offset|=0, |#t~string411.base|=9223372036854776004, |#t~string411.offset|=0, |#t~string414.base|=9223372036854776230, |#t~string414.offset|=0, |#t~string418.base|=9223372036854777290, |#t~string418.offset|=0, |#t~string419.base|=9223372036854777023, |#t~string419.offset|=0, |#t~string423.base|=9223372036854776297, |#t~string423.offset|=0, |#t~string425.base|=9223372036854776195, |#t~string425.offset|=0, |#t~string426.base|=9223372036854776307, |#t~string426.offset|=0, |#t~string429.base|=9223372036854776505, |#t~string429.offset|=0, |#t~string430.base|=9223372036854775835, |#t~string430.offset|=0, |#t~string468.base|=9223372036854776657, |#t~string468.offset|=0, |#t~string472.base|=9223372036854776382, |#t~string472.offset|=0, |#t~string598.base|=9223372036854777283, |#t~string598.offset|=0, |#t~string603.base|=9223372036854776721, |#t~string603.offset|=0, |#t~string617.base|=9223372036854776693, |#t~string617.offset|=0, |#t~string764.base|=9223372036854776963, |#t~string764.offset|=0, |#t~string776.base|=9223372036854775850, |#t~string776.offset|=0, |#t~string808.base|=9223372036854777178, |#t~string808.offset|=0, |#t~string916.base|=9223372036854777333, |#t~string916.offset|=0, |#t~string918.base|=9223372036854776361, |#t~string918.offset|=0, |#t~string927.base|=9223372036854776688, |#t~string927.offset|=0, |#t~string930.base|=9223372036854775883, |#t~string930.offset|=0, |old(~dma_desc_sync_size~0)|=0, |old(~instance~0)|=0, |old(~LDV_IN_INTERRUPT~0)|=0, |old(~ldv_spin~0)|=0, |~#b44_ethtool_ops~0.base|=9223372036854776897, |~#b44_ethtool_ops~0.offset|=0, |~#b44_gstrings~0.base|=9223372036854777100, |~#b44_gstrings~0.offset|=0, |~#b44_netdev_ops~0.base|=9223372036854777254, |~#b44_netdev_ops~0.offset|=0, |~#b44_pci_driver~0.base|=9223372036854776071, |~#b44_pci_driver~0.offset|=0, |~#b44_pci_tbl~0.base|=9223372036854776577, |~#b44_pci_tbl~0.offset|=0, |~#b44_ssb_driver~0.base|=9223372036854776532, |~#b44_ssb_driver~0.offset|=0, |~#b44_ssb_tbl~0.base|=9223372036854776971, |~#b44_ssb_tbl~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~__mod_ssb_device_table~0.coreid=0, ~__mod_ssb_device_table~0.revision=0, ~__mod_ssb_device_table~0.vendor=0, ~b44_debug~0=(- 1), ~dma_desc_sync_size~0=8, ~dma_ops~0.base=9223372036854776459, ~dma_ops~0.offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] CALL call ULTIMATE.init(); VAL [#NULL.base=9223372036854775826, #NULL.offset=9223372036854776706, #t~string1054.base=9223372036854777109, #t~string1054.offset=9223372036854775930, #t~string1059.base=9223372036854776584, #t~string1059.offset=9223372036854775984, #t~string1060.base=9223372036854777304, #t~string1060.offset=9223372036854777281, #t~string1061.base=9223372036854776802, #t~string1061.offset=9223372036854776788, #t~string1068.base=9223372036854776534, #t~string1068.offset=9223372036854776243, #t~string1074.base=9223372036854776557, #t~string1074.offset=9223372036854777215, #t~string1079.base=9223372036854777228, #t~string1079.offset=9223372036854776343, #t~string1084.base=9223372036854776272, #t~string1084.offset=9223372036854776760, #t~string1088.base=9223372036854775844, #t~string1088.offset=9223372036854776259, #t~string1095.base=9223372036854777107, #t~string1095.offset=9223372036854777118, #t~string1098.base=9223372036854777266, #t~string1098.offset=9223372036854776839, #t~string1099.base=9223372036854775982, #t~string1099.offset=9223372036854776573, #t~string1120.base=9223372036854776278, #t~string1120.offset=9223372036854775830, #t~string1125.base=9223372036854777297, #t~string1125.offset=9223372036854775819, #t~string1128.base=9223372036854777078, #t~string1128.offset=9223372036854776767, #t~string161.base=9223372036854775917, #t~string161.offset=9223372036854776331, #t~string223.base=9223372036854777400, #t~string223.offset=9223372036854776204, #t~string226.base=9223372036854776816, #t~string226.offset=9223372036854776147, #t~string332.base=9223372036854776220, #t~string332.offset=9223372036854776973, #t~string342.base=9223372036854776713, #t~string342.offset=9223372036854776952, #t~string343.base=9223372036854776157, #t~string343.offset=9223372036854777257, #t~string344.base=9223372036854777249, #t~string344.offset=9223372036854776424, #t~string375.base=9223372036854776699, #t~string375.offset=9223372036854776749, #t~string411.base=9223372036854776003, #t~string411.offset=9223372036854776216, #t~string414.base=9223372036854776225, #t~string414.offset=9223372036854777040, #t~string418.base=9223372036854777289, #t~string418.offset=9223372036854777243, #t~string419.base=9223372036854777024, #t~string419.offset=9223372036854776547, #t~string423.base=9223372036854776294, #t~string423.offset=9223372036854776638, #t~string425.base=9223372036854776201, #t~string425.offset=9223372036854776495, #t~string426.base=9223372036854776305, #t~string426.offset=9223372036854777256, #t~string429.base=9223372036854776502, #t~string429.offset=9223372036854777155, #t~string430.base=9223372036854775836, #t~string430.offset=9223372036854775935, #t~string468.base=9223372036854776656, #t~string468.offset=9223372036854776593, #t~string472.base=9223372036854776369, #t~string472.offset=9223372036854775868, #t~string598.base=9223372036854777284, #t~string598.offset=9223372036854777028, #t~string603.base=9223372036854776722, #t~string603.offset=9223372036854776678, #t~string617.base=9223372036854776691, #t~string617.offset=9223372036854776754, #t~string764.base=9223372036854776959, #t~string764.offset=9223372036854776391, #t~string776.base=9223372036854775852, #t~string776.offset=9223372036854776224, #t~string808.base=9223372036854777180, #t~string808.offset=9223372036854777152, #t~string916.base=9223372036854777335, #t~string916.offset=9223372036854776560, #t~string918.base=9223372036854776362, #t~string918.offset=9223372036854776130, #t~string927.base=9223372036854776690, #t~string927.offset=9223372036854775869, #t~string930.base=9223372036854775884, #t~string930.offset=9223372036854776338, old(#NULL.base)=9223372036854775826, old(#NULL.offset)=9223372036854776706, old(#t~string1054.base)=9223372036854777109, old(#t~string1054.offset)=9223372036854775930, old(#t~string1059.base)=9223372036854776584, old(#t~string1059.offset)=9223372036854775984, old(#t~string1060.base)=9223372036854777304, old(#t~string1060.offset)=9223372036854777281, old(#t~string1061.base)=9223372036854776802, old(#t~string1061.offset)=9223372036854776788, old(#t~string1068.base)=9223372036854776534, old(#t~string1068.offset)=9223372036854776243, old(#t~string1074.base)=9223372036854776557, old(#t~string1074.offset)=9223372036854777215, old(#t~string1079.base)=9223372036854777228, old(#t~string1079.offset)=9223372036854776343, old(#t~string1084.base)=9223372036854776272, old(#t~string1084.offset)=9223372036854776760, old(#t~string1088.base)=9223372036854775844, old(#t~string1088.offset)=9223372036854776259, old(#t~string1095.base)=9223372036854777107, old(#t~string1095.offset)=9223372036854777118, old(#t~string1098.base)=9223372036854777266, old(#t~string1098.offset)=9223372036854776839, old(#t~string1099.base)=9223372036854775982, old(#t~string1099.offset)=9223372036854776573, old(#t~string1120.base)=9223372036854776278, old(#t~string1120.offset)=9223372036854775830, old(#t~string1125.base)=9223372036854777297, old(#t~string1125.offset)=9223372036854775819, old(#t~string1128.base)=9223372036854777078, old(#t~string1128.offset)=9223372036854776767, old(#t~string161.base)=9223372036854775917, old(#t~string161.offset)=9223372036854776331, old(#t~string223.base)=9223372036854777400, old(#t~string223.offset)=9223372036854776204, old(#t~string226.base)=9223372036854776816, old(#t~string226.offset)=9223372036854776147, old(#t~string332.base)=9223372036854776220, old(#t~string332.offset)=9223372036854776973, old(#t~string342.base)=9223372036854776713, old(#t~string342.offset)=9223372036854776952, old(#t~string343.base)=9223372036854776157, old(#t~string343.offset)=9223372036854777257, old(#t~string344.base)=9223372036854777249, old(#t~string344.offset)=9223372036854776424, old(#t~string375.base)=9223372036854776699, old(#t~string375.offset)=9223372036854776749, old(#t~string411.base)=9223372036854776003, old(#t~string411.offset)=9223372036854776216, old(#t~string414.base)=9223372036854776225, old(#t~string414.offset)=9223372036854777040, old(#t~string418.base)=9223372036854777289, old(#t~string418.offset)=9223372036854777243, old(#t~string419.base)=9223372036854777024, old(#t~string419.offset)=9223372036854776547, old(#t~string423.base)=9223372036854776294, old(#t~string423.offset)=9223372036854776638, old(#t~string425.base)=9223372036854776201, old(#t~string425.offset)=9223372036854776495, old(#t~string426.base)=9223372036854776305, old(#t~string426.offset)=9223372036854777256, old(#t~string429.base)=9223372036854776502, old(#t~string429.offset)=9223372036854777155, old(#t~string430.base)=9223372036854775836, old(#t~string430.offset)=9223372036854775935, old(#t~string468.base)=9223372036854776656, old(#t~string468.offset)=9223372036854776593, old(#t~string472.base)=9223372036854776369, old(#t~string472.offset)=9223372036854775868, old(#t~string598.base)=9223372036854777284, old(#t~string598.offset)=9223372036854777028, old(#t~string603.base)=9223372036854776722, old(#t~string603.offset)=9223372036854776678, old(#t~string617.base)=9223372036854776691, old(#t~string617.offset)=9223372036854776754, old(#t~string764.base)=9223372036854776959, old(#t~string764.offset)=9223372036854776391, old(#t~string776.base)=9223372036854775852, old(#t~string776.offset)=9223372036854776224, old(#t~string808.base)=9223372036854777180, old(#t~string808.offset)=9223372036854777152, old(#t~string916.base)=9223372036854777335, old(#t~string916.offset)=9223372036854776560, old(#t~string918.base)=9223372036854776362, old(#t~string918.offset)=9223372036854776130, old(#t~string927.base)=9223372036854776690, old(#t~string927.offset)=9223372036854775869, old(#t~string930.base)=9223372036854775884, old(#t~string930.offset)=9223372036854776338, old(~#b44_ethtool_ops~0.base)=9223372036854776898, old(~#b44_ethtool_ops~0.offset)=9223372036854777051, old(~#b44_gstrings~0.base)=9223372036854777102, old(~#b44_gstrings~0.offset)=9223372036854776408, old(~#b44_netdev_ops~0.base)=9223372036854777258, old(~#b44_netdev_ops~0.offset)=9223372036854776354, old(~#b44_pci_driver~0.base)=9223372036854776066, old(~#b44_pci_driver~0.offset)=9223372036854777017, old(~#b44_pci_tbl~0.base)=9223372036854776578, old(~#b44_pci_tbl~0.offset)=9223372036854776832, old(~#b44_ssb_driver~0.base)=9223372036854776530, old(~#b44_ssb_driver~0.offset)=9223372036854775993, old(~#b44_ssb_tbl~0.base)=9223372036854776525, old(~#b44_ssb_tbl~0.offset)=9223372036854775881, old(~__mod_pci_device_table~0.class)=9223372036854777386, old(~__mod_pci_device_table~0.class_mask)=9223372036854777010, old(~__mod_pci_device_table~0.device)=9223372036854777142, old(~__mod_pci_device_table~0.driver_data)=9223372036854776236, old(~__mod_pci_device_table~0.subdevice)=9223372036854776184, old(~__mod_pci_device_table~0.subvendor)=9223372036854776040, old(~__mod_pci_device_table~0.vendor)=9223372036854777261, old(~__mod_ssb_device_table~0.coreid)=9223372036854777361, old(~__mod_ssb_device_table~0.revision)=9223372036854776519, old(~__mod_ssb_device_table~0.vendor)=9223372036854776512, old(~b44_debug~0)=9223372036854776380, old(~dma_desc_sync_size~0)=9223372036854776521, old(~instance~0)=9223372036854776310, old(~LDV_IN_INTERRUPT~0)=9223372036854777231, old(~ldv_spin~0)=9223372036854776935, ~#b44_ethtool_ops~0.base=9223372036854776898, ~#b44_ethtool_ops~0.offset=9223372036854777051, ~#b44_gstrings~0.base=9223372036854777102, ~#b44_gstrings~0.offset=9223372036854776408, ~#b44_netdev_ops~0.base=9223372036854777258, ~#b44_netdev_ops~0.offset=9223372036854776354, ~#b44_pci_driver~0.base=9223372036854776066, ~#b44_pci_driver~0.offset=9223372036854777017, ~#b44_pci_tbl~0.base=9223372036854776578, ~#b44_pci_tbl~0.offset=9223372036854776832, ~#b44_ssb_driver~0.base=9223372036854776530, ~#b44_ssb_driver~0.offset=9223372036854775993, ~#b44_ssb_tbl~0.base=9223372036854776525, ~#b44_ssb_tbl~0.offset=9223372036854775881, ~__mod_pci_device_table~0.class=9223372036854777386, ~__mod_pci_device_table~0.class_mask=9223372036854777010, ~__mod_pci_device_table~0.device=9223372036854777142, ~__mod_pci_device_table~0.driver_data=9223372036854776236, ~__mod_pci_device_table~0.subdevice=9223372036854776184, ~__mod_pci_device_table~0.subvendor=9223372036854776040, ~__mod_pci_device_table~0.vendor=9223372036854777261, ~__mod_ssb_device_table~0.coreid=9223372036854777361, ~__mod_ssb_device_table~0.revision=9223372036854776519, ~__mod_ssb_device_table~0.vendor=9223372036854776512, ~b44_debug~0=9223372036854776380, ~dma_desc_sync_size~0=9223372036854776521, ~instance~0=9223372036854776310, ~LDV_IN_INTERRUPT~0=9223372036854777231, ~ldv_spin~0=9223372036854776935] [?] #NULL.base, #NULL.offset := 0, 0; [?] #valid := #valid[0 := 0]; [L5625] call #t~string161.base, #t~string161.offset := #Ultimate.alloc(137); [L5967] call #t~string223.base, #t~string223.offset := #Ultimate.alloc(26); [L5973] call #t~string226.base, #t~string226.offset := #Ultimate.alloc(68); [L6246] call #t~string332.base, #t~string332.offset := #Ultimate.alloc(4); [L6246] call write~init~int(98, #t~string332.base, #t~string332.offset, 1); [L6246] call write~init~int(52, #t~string332.base, 1 + #t~string332.offset, 1); [L6246] call write~init~int(52, #t~string332.base, 2 + #t~string332.offset, 1); [L6246] call write~init~int(0, #t~string332.base, 3 + #t~string332.offset, 1); [L6539] call #t~string342.base, #t~string342.offset := #Ultimate.alloc(58); [L6540] call #t~string343.base, #t~string343.offset := #Ultimate.alloc(6); [L6540] call write~init~int(99, #t~string343.base, #t~string343.offset, 1); [L6540] call write~init~int(108, #t~string343.base, 1 + #t~string343.offset, 1); [L6540] call write~init~int(101, #t~string343.base, 2 + #t~string343.offset, 1); [L6540] call write~init~int(97, #t~string343.base, 3 + #t~string343.offset, 1); [L6540] call write~init~int(114, #t~string343.base, 4 + #t~string343.offset, 1); [L6540] call write~init~int(0, #t~string343.base, 5 + #t~string343.offset, 1); [L6540] call #t~string344.base, #t~string344.offset := #Ultimate.alloc(4); [L6540] call write~init~int(115, #t~string344.base, #t~string344.offset, 1); [L6540] call write~init~int(101, #t~string344.base, 1 + #t~string344.offset, 1); [L6540] call write~init~int(116, #t~string344.base, 2 + #t~string344.offset, 1); [L6540] call write~init~int(0, #t~string344.base, 3 + #t~string344.offset, 1); [L6703] call #t~string375.base, #t~string375.offset := #Ultimate.alloc(30); [L6940] call #t~string411.base, #t~string411.offset := #Ultimate.alloc(14); [L6942] call #t~string414.base, #t~string414.offset := #Ultimate.alloc(34); [L6943] call #t~string418.base, #t~string418.offset := #Ultimate.alloc(5); [L6943] call write~init~int(102, #t~string418.base, #t~string418.offset, 1); [L6943] call write~init~int(117, #t~string418.base, 1 + #t~string418.offset, 1); [L6943] call write~init~int(108, #t~string418.base, 2 + #t~string418.offset, 1); [L6943] call write~init~int(108, #t~string418.base, 3 + #t~string418.offset, 1); [L6943] call write~init~int(0, #t~string418.base, 4 + #t~string418.offset, 1); [L6943] call #t~string419.base, #t~string419.offset := #Ultimate.alloc(5); [L6943] call write~init~int(104, #t~string419.base, #t~string419.offset, 1); [L6943] call write~init~int(97, #t~string419.base, 1 + #t~string419.offset, 1); [L6943] call write~init~int(108, #t~string419.base, 2 + #t~string419.offset, 1); [L6943] call write~init~int(102, #t~string419.base, 3 + #t~string419.offset, 1); [L6943] call write~init~int(0, #t~string419.base, 4 + #t~string419.offset, 1); [L6944] call #t~string423.base, #t~string423.offset := #Ultimate.alloc(41); [L6945] call #t~string425.base, #t~string425.offset := #Ultimate.alloc(3); [L6945] call write~init~int(111, #t~string425.base, #t~string425.offset, 1); [L6945] call write~init~int(110, #t~string425.base, 1 + #t~string425.offset, 1); [L6945] call write~init~int(0, #t~string425.base, 2 + #t~string425.offset, 1); [L6945] call #t~string426.base, #t~string426.offset := #Ultimate.alloc(4); [L6945] call write~init~int(111, #t~string426.base, #t~string426.offset, 1); [L6945] call write~init~int(102, #t~string426.base, 1 + #t~string426.offset, 1); [L6945] call write~init~int(102, #t~string426.base, 2 + #t~string426.offset, 1); [L6945] call write~init~int(0, #t~string426.base, 3 + #t~string426.offset, 1); [L6945] call #t~string429.base, #t~string429.offset := #Ultimate.alloc(3); [L6945] call write~init~int(111, #t~string429.base, #t~string429.offset, 1); [L6945] call write~init~int(110, #t~string429.base, 1 + #t~string429.offset, 1); [L6945] call write~init~int(0, #t~string429.base, 2 + #t~string429.offset, 1); [L6945] call #t~string430.base, #t~string430.offset := #Ultimate.alloc(4); [L6945] call write~init~int(111, #t~string430.base, #t~string430.offset, 1); [L6945] call write~init~int(102, #t~string430.base, 1 + #t~string430.offset, 1); [L6945] call write~init~int(102, #t~string430.base, 2 + #t~string430.offset, 1); [L6945] call write~init~int(0, #t~string430.base, 3 + #t~string430.offset, 1); [L7051] call #t~string468.base, #t~string468.offset := #Ultimate.alloc(30); [L7056] call #t~string472.base, #t~string472.offset := #Ultimate.alloc(24); [L7477] call #t~string598.base, #t~string598.offset := #Ultimate.alloc(16); [L7508] call #t~string603.base, #t~string603.offset := #Ultimate.alloc(31); [L7547] call #t~string617.base, #t~string617.offset := #Ultimate.alloc(37); [L7989] call #t~string764.base, #t~string764.offset := #Ultimate.alloc(235); [L8026] call #t~string776.base, #t~string776.offset := #Ultimate.alloc(19); [L8169] call #t~string808.base, #t~string808.offset := #Ultimate.alloc(13); [L8573] call #t~string916.base, #t~string916.offset := #Ultimate.alloc(4); [L8573] call write~init~int(98, #t~string916.base, #t~string916.offset, 1); [L8573] call write~init~int(52, #t~string916.base, 1 + #t~string916.offset, 1); [L8573] call write~init~int(52, #t~string916.base, 2 + #t~string916.offset, 1); [L8573] call write~init~int(0, #t~string916.base, 3 + #t~string916.offset, 1); [L8574] call #t~string918.base, #t~string918.offset := #Ultimate.alloc(4); [L8574] call write~init~int(50, #t~string918.base, #t~string918.offset, 1); [L8574] call write~init~int(46, #t~string918.base, 1 + #t~string918.offset, 1); [L8574] call write~init~int(48, #t~string918.base, 2 + #t~string918.offset, 1); [L8574] call write~init~int(0, #t~string918.base, 3 + #t~string918.offset, 1); [L8581] call #t~string927.base, #t~string927.offset := #Ultimate.alloc(4); [L8581] call write~init~int(83, #t~string927.base, #t~string927.offset, 1); [L8581] call write~init~int(83, #t~string927.base, 1 + #t~string927.offset, 1); [L8581] call write~init~int(66, #t~string927.base, 2 + #t~string927.offset, 1); [L8581] call write~init~int(0, #t~string927.base, 3 + #t~string927.offset, 1); [L8588] call #t~string930.base, #t~string930.offset := #Ultimate.alloc(235); [L9045] call #t~string1054.base, #t~string1054.offset := #Ultimate.alloc(43); [L9080] call #t~string1059.base, #t~string1059.offset := #Ultimate.alloc(21); [L9080] call #t~string1060.base, #t~string1060.offset := #Ultimate.alloc(46); [L9081] call #t~string1061.base, #t~string1061.offset := #Ultimate.alloc(4); [L9081] call write~init~int(50, #t~string1061.base, #t~string1061.offset, 1); [L9081] call write~init~int(46, #t~string1061.base, 1 + #t~string1061.offset, 1); [L9081] call write~init~int(48, #t~string1061.base, 2 + #t~string1061.offset, 1); [L9081] call write~init~int(0, #t~string1061.base, 3 + #t~string1061.offset, 1); [L9101] call #t~string1068.base, #t~string1068.offset := #Ultimate.alloc(20); [L9111] call #t~string1074.base, #t~string1074.offset := #Ultimate.alloc(27); [L9118] call #t~string1079.base, #t~string1079.offset := #Ultimate.alloc(51); [L9123] call #t~string1084.base, #t~string1084.offset := #Ultimate.alloc(51); [L9131] call #t~string1088.base, #t~string1088.offset := #Ultimate.alloc(47); [L9146] call #t~string1095.base, #t~string1095.offset := #Ultimate.alloc(38); [L9160] call #t~string1098.base, #t~string1098.offset := #Ultimate.alloc(8); [L9160] call #t~string1099.base, #t~string1099.offset := #Ultimate.alloc(46); [L9249] call #t~string1120.base, #t~string1120.offset := #Ultimate.alloc(27); [L9272] call #t~string1125.base, #t~string1125.offset := #Ultimate.alloc(20); [L9289] call #t~string1128.base, #t~string1128.offset := #Ultimate.alloc(4); [L9289] call write~init~int(98, #t~string1128.base, #t~string1128.offset, 1); [L9289] call write~init~int(52, #t~string1128.base, 1 + #t~string1128.offset, 1); [L9289] call write~init~int(52, #t~string1128.base, 2 + #t~string1128.offset, 1); [L9289] call write~init~int(0, #t~string1128.base, 3 + #t~string1128.offset, 1); [L6239] ~b44_debug~0 := -1; [L6260] ~dma_desc_sync_size~0 := 0; [L6261] ~instance~0 := 0; [L6262-L6462] call ~#b44_gstrings~0.base, ~#b44_gstrings~0.offset := #Ultimate.alloc(1504); [L6262-L6462] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#b44_gstrings~0.base); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 2 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 3 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 4 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 5 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 6 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 7 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 8 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 9 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 10 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 11 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 12 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 13 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 14 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 32 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 33 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 34 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 35 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 36 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 37 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 38 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 39 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 40 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 41 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 42 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 43 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 44 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 64 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 65 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 66 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 67 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 68 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 69 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 70 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 71 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 72 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 73 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 96 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 97 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 98 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 99 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 100 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 101 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 102 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 103 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 128 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 129 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 130 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 131 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 132 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 133 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 134 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 135 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 136 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 137 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 138 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 139 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 140 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 141 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 142 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 143 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 144 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 145 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 160 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 161 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 162 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 163 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 164 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 165 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 166 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 167 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 168 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 169 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 170 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 171 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 172 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 173 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 174 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 175 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 176 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 177 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 192 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 193 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 194 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 195 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 196 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 197 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 198 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 199 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(52, ~#b44_gstrings~0.base, 200 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 201 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 224 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 225 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 226 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 227 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 228 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 229 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 230 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 231 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 232 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 233 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 234 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 235 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 236 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 237 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 238 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(55, ~#b44_gstrings~0.base, 239 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 240 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 256 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 257 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 258 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 259 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 260 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 261 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 262 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 263 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 264 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(56, ~#b44_gstrings~0.base, 265 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 266 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 267 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 268 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 269 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 270 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 271 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 272 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 273 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 288 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 289 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 290 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 291 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 292 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 293 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 294 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 295 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 296 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 297 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 298 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 299 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 300 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 301 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 302 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 303 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 304 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 305 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 320 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 321 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 322 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 323 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 324 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 325 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 326 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 327 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 328 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 329 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 330 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 331 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 332 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 333 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 334 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(48, ~#b44_gstrings~0.base, 335 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 336 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(51, ~#b44_gstrings~0.base, 337 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 338 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 352 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 353 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 354 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 355 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 356 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 357 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 358 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 359 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(48, ~#b44_gstrings~0.base, 360 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 361 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(52, ~#b44_gstrings~0.base, 362 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 363 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 364 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 365 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 366 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 367 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 368 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 369 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 370 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 384 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 385 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 386 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(106, ~#b44_gstrings~0.base, 387 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 388 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 389 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 390 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 391 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 392 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 393 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 394 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 395 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 396 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 397 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 398 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 416 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 417 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 418 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 419 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(118, ~#b44_gstrings~0.base, 420 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 421 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 422 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 423 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 424 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(122, ~#b44_gstrings~0.base, 425 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 426 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 427 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 428 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 429 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 430 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 431 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 432 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 448 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 449 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 450 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(102, ~#b44_gstrings~0.base, 451 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 452 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 453 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 454 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 455 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 456 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 457 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 458 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 459 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 460 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 461 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 462 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 463 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 464 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 480 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 481 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 482 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 483 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 484 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 485 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 486 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 487 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 488 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 489 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 490 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 491 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 492 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 512 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 513 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 514 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 515 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 516 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 517 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 518 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 519 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 520 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 521 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 522 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 523 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 524 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 525 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 544 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 545 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 546 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 547 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 548 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 549 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 550 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 551 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 552 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 553 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 554 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 555 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 556 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 557 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 558 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 576 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 577 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 578 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 579 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 580 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 581 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 582 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 583 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 584 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 585 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 586 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 587 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 588 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 589 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 590 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 591 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 592 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 608 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 609 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 610 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 611 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 612 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 613 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 614 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 615 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 616 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 617 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(118, ~#b44_gstrings~0.base, 618 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 619 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 620 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 621 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 622 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 623 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 624 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 625 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 640 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 641 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 642 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 643 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 644 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 645 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 646 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 647 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 648 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 649 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 650 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 651 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 652 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 672 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 673 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 674 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 675 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 676 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(102, ~#b44_gstrings~0.base, 677 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 678 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 679 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 680 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 681 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 682 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 704 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 705 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 706 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 707 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 708 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 709 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 710 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 711 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 712 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 713 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 714 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 715 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 716 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 717 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 718 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 719 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 736 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 737 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 738 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 739 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 740 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 741 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 742 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 743 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 744 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 745 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 746 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 747 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 748 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 749 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 768 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 769 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 770 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 771 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 772 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 773 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 774 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 775 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 776 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 777 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 778 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 779 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 780 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 781 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 782 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 800 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 801 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 802 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 803 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 804 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 805 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 806 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 807 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 808 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 809 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 810 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 811 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 812 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 832 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 833 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 834 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 835 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 836 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 837 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 838 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 839 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 840 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 841 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 864 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 865 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 866 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 867 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 868 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 869 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 870 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 871 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 896 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 897 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 898 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 899 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 900 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 901 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 902 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 903 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 904 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 905 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 906 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 907 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 908 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 909 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 910 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 911 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 912 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 913 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 928 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 929 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 930 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 931 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 932 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 933 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 934 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 935 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 936 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 937 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 938 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 939 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 940 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 941 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 942 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 943 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 944 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 945 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 960 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 961 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 962 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 963 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 964 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 965 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 966 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 967 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(52, ~#b44_gstrings~0.base, 968 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 969 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 992 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 993 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 994 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 995 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 996 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 997 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 998 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 999 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1000 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1001 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1002 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1003 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1004 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1005 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1006 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(55, ~#b44_gstrings~0.base, 1007 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1008 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1024 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1025 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1026 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1027 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1028 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1029 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1030 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1031 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1032 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(56, ~#b44_gstrings~0.base, 1033 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1034 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1035 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1036 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1037 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1038 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1039 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1040 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1041 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1056 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1057 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1058 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1059 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1060 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1061 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1062 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1063 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1064 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(54, ~#b44_gstrings~0.base, 1065 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1066 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1067 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1068 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1069 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1070 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1071 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1072 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1073 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1088 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1089 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1090 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1091 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1092 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1093 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1094 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(53, ~#b44_gstrings~0.base, 1095 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1096 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1097 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1098 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1099 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1100 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1101 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1102 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(48, ~#b44_gstrings~0.base, 1103 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1104 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(51, ~#b44_gstrings~0.base, 1105 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1106 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1120 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1121 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1122 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1123 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1124 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1125 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1126 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(49, ~#b44_gstrings~0.base, 1127 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(48, ~#b44_gstrings~0.base, 1128 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(50, ~#b44_gstrings~0.base, 1129 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(52, ~#b44_gstrings~0.base, 1130 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1131 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1132 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1133 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1134 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 1135 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1136 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1137 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1138 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1152 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1153 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1154 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(106, ~#b44_gstrings~0.base, 1155 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1156 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 1157 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 1158 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1159 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1160 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1161 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1162 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1163 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1164 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1165 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1166 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1184 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1185 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1186 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1187 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(118, ~#b44_gstrings~0.base, 1188 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1189 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1190 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1191 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 1192 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(122, ~#b44_gstrings~0.base, 1193 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1194 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1195 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1196 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1197 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1198 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1199 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1200 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1216 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1217 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1218 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(102, ~#b44_gstrings~0.base, 1219 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1220 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1221 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 1222 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 1223 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1224 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1225 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1226 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1227 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1228 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1229 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1230 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1231 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1232 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1248 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1249 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1250 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 1251 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 1252 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1253 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1254 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1255 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 1256 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1257 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1258 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1259 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1260 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1261 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1262 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1280 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1281 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1282 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 1283 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1284 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 1285 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1286 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1287 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1288 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 1289 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 1290 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1291 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1292 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1293 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1294 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1295 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1296 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1297 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1312 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1313 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1314 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 1315 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1316 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(100, ~#b44_gstrings~0.base, 1317 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1318 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1319 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1320 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 1321 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(122, ~#b44_gstrings~0.base, 1322 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1323 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1324 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1344 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1345 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1346 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 1347 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1348 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(99, ~#b44_gstrings~0.base, 1349 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1350 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1351 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1352 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1353 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1354 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1355 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1376 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1377 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1378 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1379 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1380 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(105, ~#b44_gstrings~0.base, 1381 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(103, ~#b44_gstrings~0.base, 1382 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1383 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1384 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1385 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1386 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1387 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1388 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1389 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1408 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1409 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1410 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1411 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(121, ~#b44_gstrings~0.base, 1412 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(109, ~#b44_gstrings~0.base, 1413 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(98, ~#b44_gstrings~0.base, 1414 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1415 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(108, ~#b44_gstrings~0.base, 1416 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1417 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1418 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1419 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1420 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1421 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1422 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1440 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1441 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1442 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1443 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1444 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 1445 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1446 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1447 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1448 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1449 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1450 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1451 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1452 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1453 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(114, ~#b44_gstrings~0.base, 1472 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(120, ~#b44_gstrings~0.base, 1473 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1474 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1475 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(111, ~#b44_gstrings~0.base, 1476 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(110, ~#b44_gstrings~0.base, 1477 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1478 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(97, ~#b44_gstrings~0.base, 1479 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(117, ~#b44_gstrings~0.base, 1480 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1481 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(101, ~#b44_gstrings~0.base, 1482 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(95, ~#b44_gstrings~0.base, 1483 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(112, ~#b44_gstrings~0.base, 1484 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(107, ~#b44_gstrings~0.base, 1485 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(116, ~#b44_gstrings~0.base, 1486 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(115, ~#b44_gstrings~0.base, 1487 + ~#b44_gstrings~0.offset, 1); [L6262-L6462] call write~unchecked~int(0, ~#b44_gstrings~0.base, 1488 + ~#b44_gstrings~0.offset, 1); [L9356] ~LDV_IN_INTERRUPT~0 := 0; [L9774] ~ldv_spin~0 := 0; [L6240-L6243] call ~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset := #Ultimate.alloc(128); [L6240-L6243] call write~init~int(5348, ~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(17409, ~#b44_pci_tbl~0.base, 4 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 8 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 12 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 16 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 20 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 24 + ~#b44_pci_tbl~0.offset, 8); [L6240-L6243] call write~init~int(5348, ~#b44_pci_tbl~0.base, 32 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(17410, ~#b44_pci_tbl~0.base, 36 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 40 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 44 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 48 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 52 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 56 + ~#b44_pci_tbl~0.offset, 8); [L6240-L6243] call write~init~int(5348, ~#b44_pci_tbl~0.base, 64 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(5900, ~#b44_pci_tbl~0.base, 68 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 72 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(4294967295, ~#b44_pci_tbl~0.base, 76 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 80 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 84 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 88 + ~#b44_pci_tbl~0.offset, 8); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 96 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 100 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 104 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 108 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 112 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 116 + ~#b44_pci_tbl~0.offset, 4); [L6240-L6243] call write~init~int(0, ~#b44_pci_tbl~0.base, 120 + ~#b44_pci_tbl~0.offset, 8); [L6244] ~__mod_pci_device_table~0.vendor := 0; [L6244] ~__mod_pci_device_table~0.device := 0; [L6244] ~__mod_pci_device_table~0.subvendor := 0; [L6244] ~__mod_pci_device_table~0.subdevice := 0; [L6244] ~__mod_pci_device_table~0.class := 0; [L6244] ~__mod_pci_device_table~0.class_mask := 0; [L6244] ~__mod_pci_device_table~0.driver_data := 0; [L6245-L6253] call ~#b44_pci_driver~0.base, ~#b44_pci_driver~0.offset := #Ultimate.alloc(301); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 8 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(#t~string332.base, #t~string332.offset, ~#b44_pci_driver~0.base, 16 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(~#b44_pci_tbl~0.base, ~#b44_pci_tbl~0.offset, ~#b44_pci_driver~0.base, 24 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 32 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 40 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 48 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 56 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 64 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 72 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 80 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 88 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 96 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 104 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 112 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 120 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 128 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 136 + ~#b44_pci_driver~0.offset, 1); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 137 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 145 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 153 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 161 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 169 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 177 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 185 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 193 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 201 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 209 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 217 + ~#b44_pci_driver~0.offset, 4); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 221 + ~#b44_pci_driver~0.offset, 4); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 225 + ~#b44_pci_driver~0.offset, 4); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 229 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 237 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 245 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 253 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 261 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 269 + ~#b44_pci_driver~0.offset, 4); [L6245-L6253] call write~init~int(0, ~#b44_pci_driver~0.base, 273 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 285 + ~#b44_pci_driver~0.offset, 8); [L6245-L6253] call write~init~$Pointer$(0, 0, ~#b44_pci_driver~0.base, 293 + ~#b44_pci_driver~0.offset, 8); [L6254-L6255] call ~#b44_ssb_tbl~0.base, ~#b44_ssb_tbl~0.offset := #Ultimate.alloc(10); [L6254-L6255] call write~init~int(16963, ~#b44_ssb_tbl~0.base, ~#b44_ssb_tbl~0.offset, 2); [L6254-L6255] call write~init~int(2054, ~#b44_ssb_tbl~0.base, 2 + ~#b44_ssb_tbl~0.offset, 2); [L6254-L6255] call write~init~int(255, ~#b44_ssb_tbl~0.base, 4 + ~#b44_ssb_tbl~0.offset, 1); [L6254-L6255] call write~init~int(0, ~#b44_ssb_tbl~0.base, 5 + ~#b44_ssb_tbl~0.offset, 2); [L6254-L6255] call write~init~int(0, ~#b44_ssb_tbl~0.base, 7 + ~#b44_ssb_tbl~0.offset, 2); [L6254-L6255] call write~init~int(0, ~#b44_ssb_tbl~0.base, 9 + ~#b44_ssb_tbl~0.offset, 1); [L6256] ~__mod_ssb_device_table~0.vendor := 0; [L6256] ~__mod_ssb_device_table~0.coreid := 0; [L6256] ~__mod_ssb_device_table~0.revision := 0; [L8970-L8975] call ~#b44_ethtool_ops~0.base, ~#b44_ethtool_ops~0.offset := #Ultimate.alloc(368); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_settings.base, #funAddr~b44_get_settings.offset, ~#b44_ethtool_ops~0.base, ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_set_settings.base, #funAddr~b44_set_settings.offset, ~#b44_ethtool_ops~0.base, 8 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_drvinfo.base, #funAddr~b44_get_drvinfo.offset, ~#b44_ethtool_ops~0.base, 16 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 24 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 32 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_wol.base, #funAddr~b44_get_wol.offset, ~#b44_ethtool_ops~0.base, 40 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_set_wol.base, #funAddr~b44_set_wol.offset, ~#b44_ethtool_ops~0.base, 48 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_msglevel.base, #funAddr~b44_get_msglevel.offset, ~#b44_ethtool_ops~0.base, 56 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_set_msglevel.base, #funAddr~b44_set_msglevel.offset, ~#b44_ethtool_ops~0.base, 64 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_nway_reset.base, #funAddr~b44_nway_reset.offset, ~#b44_ethtool_ops~0.base, 72 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#b44_ethtool_ops~0.base, 80 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 88 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 96 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 104 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 112 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 120 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_ringparam.base, #funAddr~b44_get_ringparam.offset, ~#b44_ethtool_ops~0.base, 128 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_set_ringparam.base, #funAddr~b44_set_ringparam.offset, ~#b44_ethtool_ops~0.base, 136 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_pauseparam.base, #funAddr~b44_get_pauseparam.offset, ~#b44_ethtool_ops~0.base, 144 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_set_pauseparam.base, #funAddr~b44_set_pauseparam.offset, ~#b44_ethtool_ops~0.base, 152 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 160 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_strings.base, #funAddr~b44_get_strings.offset, ~#b44_ethtool_ops~0.base, 168 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 176 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_ethtool_stats.base, #funAddr~b44_get_ethtool_stats.offset, ~#b44_ethtool_ops~0.base, 184 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 192 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 200 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 208 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 216 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(#funAddr~b44_get_sset_count.base, #funAddr~b44_get_sset_count.offset, ~#b44_ethtool_ops~0.base, 224 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 232 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 240 + ~#b44_ethtool_ops~0.offset, 8); [L8970-L8975] call write~init~$Pointer$(0, 0, ~#b44_ethtool_ops~0.base, 248 + ~#b44_ethtool_ops~0.offset, 8); WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L7545] COND FALSE !(0 != ~tmp___0~23) [L7552] FCALL call #t~mem618 := read~$Pointer$({ base: ~bp~6!base, offset: 788 + ~bp~6!offset }, 8); [L7552] FCALL call #t~mem619 := read~$Pointer$({ base: #t~mem618!base, offset: 16 + #t~mem618!offset }, 8); [L7552] FCALL call #t~mem620 := read~$Pointer$({ base: ~skb!base, offset: 247 + ~skb!offset }, 8); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem618!base=9223372036854776944, #t~mem618!offset=0, #t~mem619!base=0, #t~mem619!offset=0, #t~mem620!base=9223372036854775853, #t~mem620!offset=9223372036854777190, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7552-L7553] CALL call #t~ret621 := dma_map_single_attrs(#t~mem619, #t~mem620, ~len~1, 1, { base: 0, offset: 0 }); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5378-L5411] ~dev := #in~dev; [L5378-L5411] ~ptr := #in~ptr; [L5378-L5411] ~size := #in~size; [L5378-L5411] ~dir := #in~dir; [L5378-L5411] ~attrs := #in~attrs; [L5381] havoc ~ops~0; [L5382] havoc ~tmp~3; [L5383] havoc ~addr~0; [L5384] havoc ~tmp___0~0; [L5385] havoc ~tmp___1~0; [L5386] havoc ~tmp___2~0; [L5387] havoc ~tmp___3~0; VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824] [L5390] CALL call #t~ret85 := get_dma_ops(~dev); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5364-L5377] ~dev := #in~dev; [L5366] havoc ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9766-L9773] ~exp := #in~exp; [L9766-L9773] ~c := #in~c; [L9771] #res := ~exp; VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~c=0, ~dma_desc_sync_size~0=8, ~exp=1, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] RET call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~ret81=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807; [L5369-L5370] ~tmp~2 := #t~ret81; [L5369-L5370] havoc #t~ret81; [L5371] #t~short83 := 0 != ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 [L5371] havoc #t~mem82; [L5371] havoc #t~short83; [L5372] #res := ~dma_ops~0; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=9223372036854776459, #res!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5390] RET call #t~ret85 := get_dma_ops(~dev); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~ret85!base=9223372036854776459, #t~ret85!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824] [L5390] ~tmp~3 := #t~ret85; [L5390] havoc #t~ret85; [L5391] ~ops~0 := ~tmp~3; VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5392] CALL call kmemcheck_mark_initialized(~ptr, ~size); VAL [#in~address!base=9223372036854775853, #in~address!offset=9223372036854777190, #in~n=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5326-L5333] ~address := #in~address; [L5326-L5333] ~n := #in~n; VAL [#in~address!base=9223372036854775853, #in~address!offset=9223372036854777190, #in~n=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~address!base=9223372036854775853, ~address!offset=9223372036854777190, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~n=1073741824] [L5392] RET call kmemcheck_mark_initialized(~ptr, ~size); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5393] CALL call #t~ret86 := valid_dma_direction(~dir); VAL [#in~dma_direction=1, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5335-L5342] ~dma_direction := #in~dma_direction; [L5340] #res := (if (0 == ~dma_direction || 1 == ~dma_direction) || 2 == ~dma_direction then 1 else 0); VAL [#in~dma_direction=1, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_direction=1, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5393] RET call #t~ret86 := valid_dma_direction(~dir); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~ret86=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5393] assume -2147483648 <= #t~ret86 && #t~ret86 <= 2147483647; [L5393] ~tmp___0~0 := #t~ret86; [L5393] havoc #t~ret86; VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5394] CALL call #t~ret87 := ldv__builtin_expect((if 0 == ~tmp___0~0 then 1 else 0), 0); VAL [#in~c=0, #in~exp=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9766-L9773] ~exp := #in~exp; [L9766-L9773] ~c := #in~c; [L9771] #res := ~exp; VAL [#in~c=0, #in~exp=0, #NULL!base=0, #NULL!offset=0, #res=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~c=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~exp=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5394] RET call #t~ret87 := ldv__builtin_expect((if 0 == ~tmp___0~0 then 1 else 0), 0); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~ret87=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5394] assume -9223372036854775808 <= #t~ret87 && #t~ret87 <= 9223372036854775807; [L5394] ~tmp___1~0 := #t~ret87; [L5394] havoc #t~ret87; VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5395] COND FALSE !(0 != ~tmp___1~0) [L5403] FCALL call #t~ret88 := __phys_addr(~ptr!base + ~ptr!offset); [L5403] ~tmp___2~0 := #t~ret88; [L5403] havoc #t~ret88; [L5404] FCALL call #t~mem96 := read~$Pointer$({ base: ~ops~0!base, offset: 32 + ~ops~0!offset }, 8); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~mem96!base=9223372036854777085, #t~mem96!offset=9223372036854776705, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5404-L5405] CALL call #t~ret97 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0(~dev, { base: 0, offset: (if (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 else (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }, ~bitwiseAnd(~ptr!base + ~ptr!offset, 4095), ~size, ~dir, ~attrs, #t~mem96); VAL [#in~#fp!base=9223372036854777085, #in~#fp!offset=9223372036854776705, #in~90!base=0, #in~90!offset=0, #in~91!base=0, #in~91!offset=9223372036854775807, #in~93=1073741824, #in~94=1, #in~95!base=0, #in~95!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [?] #~90 := #in~90; [?] #~91 := #in~91; [?] #~92 := #in~92; [?] #~93 := #in~93; [?] #~94 := #in~94; [?] #~95 := #in~95; VAL [#in~#fp!base=9223372036854777085, #in~#fp!offset=9223372036854776705, #in~90!base=0, #in~90!offset=0, #in~91!base=0, #in~91!offset=9223372036854775807, #in~92=9223372036854777240, #in~93=1073741824, #in~94=1, #in~95!base=0, #in~95!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, #~90!base=0, #~90!offset=0, #~91!base=0, #~91!offset=9223372036854775807, #~92=9223372036854777240, #~93=1073741824, #~94=1, #~95!base=0, #~95!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5404-L5405] RET call #t~ret97 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0(~dev, { base: 0, offset: (if (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 else (18446719884453740544 + ~tmp___2~0 / 4096) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }, ~bitwiseAnd(~ptr!base + ~ptr!offset, 4095), ~size, ~dir, ~attrs, #t~mem96); VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~mem96!base=9223372036854777085, #t~mem96!offset=9223372036854776705, #t~ret97=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=37779030942148963860479, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L5404-L5405] ~addr~0 := #t~ret97; [L5404] havoc #t~mem96; [L5404-L5405] havoc #t~ret97; [L5406] FCALL call #t~ret98 := __phys_addr(~ptr!base + ~ptr!offset); [L5406] ~tmp___3~0 := #t~ret98; [L5406] havoc #t~ret98; [L5407-L5408] FCALL call debug_dma_map_page(~dev, { base: 0, offset: (if (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 else (18446719884453740544 + ~tmp___3~0 / 4096) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }, ~bitwiseAnd(~ptr!base + ~ptr!offset, 4095), ~size, ~dir, ~addr~0, 1); [L5409] #res := ~addr~0; VAL [#in~attrs!base=0, #in~attrs!offset=0, #in~dev!base=0, #in~dev!offset=0, #in~dir=1, #in~ptr!base=9223372036854775853, #in~ptr!offset=9223372036854777190, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #res=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~addr~0=0, ~attrs!base=0, ~attrs!offset=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dir=1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~0!base=9223372036854776459, ~ops~0!offset=0, ~ptr!base=9223372036854775853, ~ptr!offset=9223372036854777190, ~size=1073741824, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=37779030942148963860479, ~tmp~3!base=9223372036854776459, ~tmp~3!offset=0] [L7552-L7553] RET call #t~ret621 := dma_map_single_attrs(#t~mem619, #t~mem620, ~len~1, 1, { base: 0, offset: 0 }); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem618!base=9223372036854776944, #t~mem618!offset=0, #t~mem619!base=0, #t~mem619!offset=0, #t~mem620!base=9223372036854775853, #t~mem620!offset=9223372036854777190, #t~ret621=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7552-L7553] ~mapping~1 := #t~ret621; [L7552] havoc #t~mem620; [L7552-L7553] havoc #t~ret621; [L7552] havoc #t~mem618; [L7552] havoc #t~mem619; [L7554] FCALL call #t~mem622 := read~$Pointer$({ base: ~bp~6!base, offset: 788 + ~bp~6!offset }, 8); [L7554] FCALL call #t~mem623 := read~$Pointer$({ base: #t~mem622!base, offset: 16 + #t~mem622!offset }, 8); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem622!base=9223372036854776944, #t~mem622!offset=0, #t~mem623!base=0, #t~mem623!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7554] CALL call #t~ret624 := dma_mapping_error(#t~mem623, ~mapping~1); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5512-L5531] ~dev := #in~dev; [L5512-L5531] ~dma_addr := #in~dma_addr; [L5514] havoc ~ops~4; [L5515] havoc ~tmp~7; [L5516] havoc ~tmp___0~4; VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5519] CALL call #t~ret130 := get_dma_ops(~dev); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5364-L5377] ~dev := #in~dev; [L5366] havoc ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9766-L9773] ~exp := #in~exp; [L9766-L9773] ~c := #in~c; [L9771] #res := ~exp; VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~c=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~exp=1, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] RET call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~ret81=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807; [L5369-L5370] ~tmp~2 := #t~ret81; [L5369-L5370] havoc #t~ret81; [L5371] #t~short83 := 0 != ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 [L5371] havoc #t~mem82; [L5371] havoc #t~short83; [L5372] #res := ~dma_ops~0; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=9223372036854776459, #res!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5519] RET call #t~ret130 := get_dma_ops(~dev); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~ret130!base=9223372036854776459, #t~ret130!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5519] ~tmp~7 := #t~ret130; [L5519] havoc #t~ret130; [L5520] ~ops~4 := ~tmp~7; [L5521] FCALL call debug_dma_mapping_error(~dev, ~dma_addr); [L5522] FCALL call #t~mem131 := read~$Pointer$({ base: ~ops~4!base, offset: 96 + ~ops~4!offset }, 8); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~mem131!base=0, #t~mem131!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~4!base=9223372036854776459, ~ops~4!offset=0, ~tmp~7!base=9223372036854776459, ~tmp~7!offset=0] [L5522-L5523] COND FALSE !(0 != (#t~mem131!base + #t~mem131!offset) % 18446744073709551616) [L5522] havoc #t~mem131; [L5529] #res := (if 0 == ~dma_addr % 18446744073709551616 then 1 else 0); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~4!base=9223372036854776459, ~ops~4!offset=0, ~tmp~7!base=9223372036854776459, ~tmp~7!offset=0] [L7554] RET call #t~ret624 := dma_mapping_error(#t~mem623, ~mapping~1); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem622!base=9223372036854776944, #t~mem622!offset=0, #t~mem623!base=0, #t~mem623!offset=0, #t~ret624=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7554] assume -2147483648 <= #t~ret624 && #t~ret624 <= 2147483647; [L7554] ~tmp___5~2 := #t~ret624; [L7554] havoc #t~mem622; [L7554] havoc #t~ret624; [L7554] havoc #t~mem623; VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp___5~2=1, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7555] COND TRUE 0 != ~tmp___5~2 || (~len~1 % 4294967296 + ~mapping~1) % 18446744073709551616 > 1073741823 [L7556] FCALL call #t~mem625 := read~$Pointer$({ base: ~bp~6!base, offset: 788 + ~bp~6!offset }, 8); [L7556] FCALL call #t~mem626 := read~$Pointer$({ base: #t~mem625!base, offset: 16 + #t~mem625!offset }, 8); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem625!base=9223372036854776944, #t~mem625!offset=0, #t~mem626!base=0, #t~mem626!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp___5~2=1, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7556] CALL call #t~ret627 := dma_mapping_error(#t~mem626, ~mapping~1); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5512-L5531] ~dev := #in~dev; [L5512-L5531] ~dma_addr := #in~dma_addr; [L5514] havoc ~ops~4; [L5515] havoc ~tmp~7; [L5516] havoc ~tmp___0~4; VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5519] CALL call #t~ret130 := get_dma_ops(~dev); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5364-L5377] ~dev := #in~dev; [L5366] havoc ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] CALL call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9766-L9773] ~exp := #in~exp; [L9766-L9773] ~c := #in~c; [L9771] #res := ~exp; VAL [#in~c=0, #in~exp=1, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~c=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~exp=1, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] RET call #t~ret81 := ldv__builtin_expect((if 0 == (~dev!base + ~dev!offset) % 18446744073709551616 then 1 else 0), 0); VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~ret81=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5369-L5370] assume -9223372036854775808 <= #t~ret81 && #t~ret81 <= 9223372036854775807; [L5369-L5370] ~tmp~2 := #t~ret81; [L5369-L5370] havoc #t~ret81; [L5371] #t~short83 := 0 != ~tmp~2; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #t~short83=true, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5371] COND TRUE #t~short83 [L5371] havoc #t~mem82; [L5371] havoc #t~short83; [L5372] #res := ~dma_ops~0; VAL [#in~dev!base=0, #in~dev!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=9223372036854776459, #res!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~tmp~2=1] [L5519] RET call #t~ret130 := get_dma_ops(~dev); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~ret130!base=9223372036854776459, #t~ret130!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L5519] ~tmp~7 := #t~ret130; [L5519] havoc #t~ret130; [L5520] ~ops~4 := ~tmp~7; [L5521] FCALL call debug_dma_mapping_error(~dev, ~dma_addr); [L5522] FCALL call #t~mem131 := read~$Pointer$({ base: ~ops~4!base, offset: 96 + ~ops~4!offset }, 8); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #t~mem131!base=0, #t~mem131!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~4!base=9223372036854776459, ~ops~4!offset=0, ~tmp~7!base=9223372036854776459, ~tmp~7!offset=0] [L5522-L5523] COND FALSE !(0 != (#t~mem131!base + #t~mem131!offset) % 18446744073709551616) [L5522] havoc #t~mem131; [L5529] #res := (if 0 == ~dma_addr % 18446744073709551616 then 1 else 0); VAL [#in~dev!base=0, #in~dev!offset=0, #in~dma_addr=0, #NULL!base=0, #NULL!offset=0, #res=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dev!base=0, ~dev!offset=0, ~dma_addr=0, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~ops~4!base=9223372036854776459, ~ops~4!offset=0, ~tmp~7!base=9223372036854776459, ~tmp~7!offset=0] [L7556] RET call #t~ret627 := dma_mapping_error(#t~mem626, ~mapping~1); VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~mem625!base=9223372036854776944, #t~mem625!offset=0, #t~mem626!base=0, #t~mem626!offset=0, #t~ret627=1, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp___5~2=1, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7556] assume -2147483648 <= #t~ret627 && #t~ret627 <= 2147483647; [L7556] ~tmp___1~13 := #t~ret627; [L7556] havoc #t~mem626; [L7556] havoc #t~ret627; [L7556] havoc #t~mem625; VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp___1~13=1, ~tmp___5~2=1, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7557] COND FALSE !(0 == ~tmp___1~13) VAL [#in~dev!base=9223372036854776780, #in~dev!offset=-2816, #in~skb!base=9223372036854777391, #in~skb!offset=0, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~bp~6!base=9223372036854776780, ~bp~6!offset=0, ~dev!base=9223372036854776780, ~dev!offset=-2816, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~len~1=1073741824, ~mapping~1=0, ~rc~1=0, ~skb!base=9223372036854777391, ~skb!offset=0, ~tmp___0~23=0, ~tmp___1~13=1, ~tmp___5~2=1, ~tmp~54!base=9223372036854776780, ~tmp~54!offset=0] [L7562] CALL call #t~ret630 := alloc_skb(~len~1, 33); VAL [#in~flags=33, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9671-L9680] ~size := #in~size; [L9671-L9680] ~flags := #in~flags; [L9673] havoc ~tmp~94; VAL [#in~flags=33, #in~size=1073741824, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~flags=33, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~size=1073741824] [L9676] CALL call ldv_check_alloc_flags(~flags); VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9775-L9787] ~flags := #in~flags; VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~flags=33, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9780] COND FALSE !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296) VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~flags=33, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9783] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L9762] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string1054!base=9223372036854777110, #t~string1054!offset=0, #t~string1059!base=9223372036854776582, #t~string1059!offset=0, #t~string1060!base=9223372036854777301, #t~string1060!offset=0, #t~string1061!base=9223372036854776801, #t~string1061!offset=0, #t~string1068!base=9223372036854776533, #t~string1068!offset=0, #t~string1074!base=9223372036854776556, #t~string1074!offset=0, #t~string1079!base=9223372036854777229, #t~string1079!offset=0, #t~string1084!base=9223372036854776279, #t~string1084!offset=0, #t~string1088!base=9223372036854775845, #t~string1088!offset=0, #t~string1095!base=9223372036854777103, #t~string1095!offset=0, #t~string1098!base=9223372036854777267, #t~string1098!offset=0, #t~string1099!base=9223372036854775978, #t~string1099!offset=0, #t~string1120!base=9223372036854776276, #t~string1120!offset=0, #t~string1125!base=9223372036854777286, #t~string1125!offset=0, #t~string1128!base=9223372036854777077, #t~string1128!offset=0, #t~string161!base=9223372036854775919, #t~string161!offset=0, #t~string223!base=9223372036854777397, #t~string223!offset=0, #t~string226!base=9223372036854776815, #t~string226!offset=0, #t~string332!base=9223372036854776548, #t~string332!offset=0, #t~string342!base=9223372036854776711, #t~string342!offset=0, #t~string343!base=9223372036854776158, #t~string343!offset=0, #t~string344!base=9223372036854777251, #t~string344!offset=0, #t~string375!base=9223372036854776700, #t~string375!offset=0, #t~string411!base=9223372036854776004, #t~string411!offset=0, #t~string414!base=9223372036854776230, #t~string414!offset=0, #t~string418!base=9223372036854777290, #t~string418!offset=0, #t~string419!base=9223372036854777023, #t~string419!offset=0, #t~string423!base=9223372036854776297, #t~string423!offset=0, #t~string425!base=9223372036854776195, #t~string425!offset=0, #t~string426!base=9223372036854776307, #t~string426!offset=0, #t~string429!base=9223372036854776505, #t~string429!offset=0, #t~string430!base=9223372036854775835, #t~string430!offset=0, #t~string468!base=9223372036854776657, #t~string468!offset=0, #t~string472!base=9223372036854776382, #t~string472!offset=0, #t~string598!base=9223372036854777283, #t~string598!offset=0, #t~string603!base=9223372036854776721, #t~string603!offset=0, #t~string617!base=9223372036854776693, #t~string617!offset=0, #t~string764!base=9223372036854776963, #t~string764!offset=0, #t~string776!base=9223372036854775850, #t~string776!offset=0, #t~string808!base=9223372036854777178, #t~string808!offset=0, #t~string916!base=9223372036854777333, #t~string916!offset=0, #t~string918!base=9223372036854776361, #t~string918!offset=0, #t~string927!base=9223372036854776688, #t~string927!offset=0, #t~string930!base=9223372036854775883, #t~string930!offset=0, old(~dma_desc_sync_size~0)=0, old(~instance~0)=0, old(~LDV_IN_INTERRUPT~0)=0, old(~ldv_spin~0)=0, ~#b44_ethtool_ops~0!base=9223372036854776897, ~#b44_ethtool_ops~0!offset=0, ~#b44_gstrings~0!base=9223372036854777100, ~#b44_gstrings~0!offset=0, ~#b44_netdev_ops~0!base=9223372036854777254, ~#b44_netdev_ops~0!offset=0, ~#b44_pci_driver~0!base=9223372036854776071, ~#b44_pci_driver~0!offset=0, ~#b44_pci_tbl~0!base=9223372036854776577, ~#b44_pci_tbl~0!offset=0, ~#b44_ssb_driver~0!base=9223372036854776532, ~#b44_ssb_driver~0!offset=0, ~#b44_ssb_tbl~0!base=9223372036854776971, ~#b44_ssb_tbl~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_ssb_device_table~0!coreid=0, ~__mod_ssb_device_table~0!revision=0, ~__mod_ssb_device_table~0!vendor=0, ~b44_debug~0=-1, ~dma_desc_sync_size~0=8, ~dma_ops~0!base=9223372036854776459, ~dma_ops~0!offset=0, ~instance~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1] [L6239] static int b44_debug = -1; [L6260] static int dma_desc_sync_size ; [L6261] static int instance ; [L6262-L6462] static char const b44_gstrings[47U][32U] = { { 't', 'x', '_', 'g', 'o', 'o', 'd', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 't', 'x', '_', 'g', 'o', 'o', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 't', 'x', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'm', 'u', 'l', 't', 'i', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '6', '4', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '6', '5', '_', 't', 'o', '_', '1', '2', '7', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '1', '2', '8', '_', 't', 'o', '_', '2', '5', '5', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '2', '5', '6', '_', 't', 'o', '_', '5', '1', '1', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '5', '1', '2', '_', 't', 'o', '_', '1', '0', '2', '3', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '1', '0', '2', '4', '_', 't', 'o', '_', 'm', 'a', 'x', '\000'}, { 't', 'x', '_', 'j', 'a', 'b', 'b', 'e', 'r', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'o', 'v', 'e', 'r', 's', 'i', 'z', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'f', 'r', 'a', 'g', 'm', 'e', 'n', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'u', 'n', 'd', 'e', 'r', 'r', 'u', 'n', 's', '\000'}, { 't', 'x', '_', 't', 'o', 't', 'a', 'l', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 's', 'i', 'n', 'g', 'l', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'm', 'u', 'l', 't', 'i', 'p', 'l', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'e', 'x', 'c', 'e', 's', 's', 'i', 'v', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'l', 'a', 't', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'd', 'e', 'f', 'e', 'r', 'e', 'd', '\000'}, { 't', 'x', '_', 'c', 'a', 'r', 'r', 'i', 'e', 'r', '_', 'l', 'o', 's', 't', '\000'}, { 't', 'x', '_', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'g', 'o', 'o', 'd', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 'r', 'x', '_', 'g', 'o', 'o', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 'r', 'x', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'm', 'u', 'l', 't', 'i', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '6', '4', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '6', '5', '_', 't', 'o', '_', '1', '2', '7', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '1', '2', '8', '_', 't', 'o', '_', '2', '5', '5', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '2', '5', '6', '_', 't', 'o', '_', '5', '1', '1', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '5', '1', '2', '_', 't', 'o', '_', '1', '0', '2', '3', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '1', '0', '2', '4', '_', 't', 'o', '_', 'm', 'a', 'x', '\000'}, { 'r', 'x', '_', 'j', 'a', 'b', 'b', 'e', 'r', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'o', 'v', 'e', 'r', 's', 'i', 'z', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'f', 'r', 'a', 'g', 'm', 'e', 'n', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'm', 'i', 's', 's', 'e', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'c', 'r', 'c', '_', 'a', 'l', 'i', 'g', 'n', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'u', 'n', 'd', 'e', 'r', 's', 'i', 'z', 'e', '\000'}, { 'r', 'x', '_', 'c', 'r', 'c', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'a', 'l', 'i', 'g', 'n', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 's', 'y', 'm', 'b', 'o', 'l', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'n', 'o', 'n', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}}; [L9356] int LDV_IN_INTERRUPT ; [L9774] int ldv_spin = 0; [L6240-L6243] static struct pci_device_id const b44_pci_tbl[4U] = { {5348U, 17409U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {5348U, 17410U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {5348U, 5900U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L6244] struct pci_device_id const __mod_pci_device_table ; [L6245-L6253] static struct pci_driver b44_pci_driver = {{0, 0}, "b44", (struct pci_device_id const *)(& b44_pci_tbl), 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{{{{{0U}}, 0U, 0U, 0, {0, {0, 0}, 0, 0, 0UL}}}}, {0, 0}}}; [L6254-L6255] static struct ssb_device_id const b44_ssb_tbl[2U] = { {16963U, 2054U, 255U}, {0U, (unsigned short)0, (unsigned char)0}}; [L6256] struct ssb_device_id const __mod_ssb_device_table ; [L8970-L8975] static struct ethtool_ops const b44_ethtool_ops = {& b44_get_settings, & b44_set_settings, & b44_get_drvinfo, 0, 0, & b44_get_wol, & b44_set_wol, & b44_get_msglevel, & b44_set_msglevel, & b44_nway_reset, & ethtool_op_get_link, 0, 0, 0, 0, 0, & b44_get_ringparam, & b44_set_ringparam, & b44_get_pauseparam, & b44_set_pauseparam, 0, & b44_get_strings, 0, & b44_get_ethtool_stats, 0, 0, 0, 0, & b44_get_sset_count, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L9059-L9063] static struct net_device_ops const b44_netdev_ops = {0, 0, & b44_open, & b44_close, & b44_start_xmit, 0, 0, & b44_set_rx_mode, & b44_set_mac_addr, & eth_validate_addr, & b44_ioctl, 0, & b44_change_mtu, 0, & b44_tx_timeout, & b44_get_stats64, 0, 0, 0, & b44_poll_controller, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L9288-L9291] static struct ssb_driver b44_ssb_driver = {"b44", (struct ssb_device_id const *)(& b44_ssb_tbl), & b44_init_one, & b44_remove_one, & b44_suspend, & b44_resume, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}; VAL [\old(__mod_pci_device_table)=9223372036854777261, \old(__mod_pci_device_table)=9223372036854777386, \old(__mod_pci_device_table)=9223372036854776040, \old(__mod_pci_device_table)=9223372036854777142, \old(__mod_pci_device_table)=9223372036854777010, \old(__mod_pci_device_table)=9223372036854776236, \old(__mod_pci_device_table)=9223372036854776184, \old(__mod_ssb_device_table)=9223372036854777361, \old(__mod_ssb_device_table)=9223372036854776512, \old(__mod_ssb_device_table)=9223372036854776519, \old(b44_debug)=9223372036854776380, \old(b44_ethtool_ops)=null, \old(b44_ethtool_ops)=null, \old(b44_gstrings)=null, \old(b44_gstrings)=null, \old(b44_netdev_ops)=null, \old(b44_netdev_ops)=null, \old(b44_pci_driver)=null, \old(b44_pci_driver)=null, \old(b44_pci_tbl)=null, \old(b44_pci_tbl)=null, \old(b44_ssb_driver)=null, \old(b44_ssb_driver)=null, \old(b44_ssb_tbl)=null, \old(b44_ssb_tbl)=null, \old(dma_desc_sync_size)=9223372036854776521, \old(instance)=9223372036854776310, \old(LDV_IN_INTERRUPT)=9223372036854777231, \old(ldv_spin)=9223372036854776935, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=0, ldv_spin=0] [L9359] struct net_device *var_group1 ; [L9360] struct ethtool_drvinfo *var_group2 ; [L9361] struct ethtool_cmd *var_group3 ; [L9362] struct ethtool_wolinfo *var_group4 ; [L9363] struct ethtool_ringparam *var_group5 ; [L9364] struct ethtool_pauseparam *var_group6 ; [L9365] u32 var_b44_set_msglevel_59_p1 ; [L9366] u32 var_b44_get_strings_68_p1 ; [L9367] u8 *var_b44_get_strings_68_p2 ; [L9368] int var_b44_get_sset_count_69_p1 ; [L9369] struct ethtool_stats *var_group7 ; [L9370] u64 *var_b44_get_ethtool_stats_70_p2 ; [L9371] int res_b44_open_45 ; [L9372] int res_b44_close_53 ; [L9373] struct sk_buff *var_group8 ; [L9374] struct rtnl_link_stats64 *var_group9 ; [L9375] void *var_b44_set_mac_addr_43_p1 ; [L9376] struct ifreq *var_group10 ; [L9377] int var_b44_ioctl_73_p2 ; [L9378] int var_b44_change_mtu_34_p1 ; [L9379] struct ssb_device *var_group11 ; [L9380] struct ssb_device_id const *var_b44_init_one_75_p1 ; [L9381] int res_b44_init_one_75 ; [L9382] pm_message_t var_b44_suspend_77_p1 ; [L9383] int var_b44_interrupt_31_p0 ; [L9384] void *var_b44_interrupt_31_p1 ; [L9385] unsigned long var_b44_timer_25_p0 ; [L9386] int ldv_s_b44_netdev_ops_net_device_ops ; [L9387] int ldv_s_b44_ssb_driver_ssb_driver ; [L9388] int tmp ; [L9389] int tmp___0 ; [L9390] int tmp___1 ; [L9393] ldv_s_b44_netdev_ops_net_device_ops = 0 [L9394] ldv_s_b44_ssb_driver_ssb_driver = 0 [L9395] LDV_IN_INTERRUPT = 1 [L9398] CALL, EXPR b44_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9313] unsigned int dma_desc_align_size ; [L9314] int tmp ; [L9315] int err ; [L9316] unsigned int __max1 ; [L9317] unsigned int __max2 ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] CALL, EXPR dma_get_cache_alignment() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L5662] return (1); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] RET, EXPR dma_get_cache_alignment() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, dma_get_cache_alignment()=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] tmp = dma_get_cache_alignment() [L9321] dma_desc_align_size = (unsigned int )tmp [L9322] __max1 = dma_desc_align_size [L9323] __max2 = 8U VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9324] EXPR __max1 > __max2 ? __max1 : __max2 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max1 > __max2 ? __max1 : __max2=8, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9324] dma_desc_sync_size = (int )(__max1 > __max2 ? __max1 : __max2) [L9325] CALL, EXPR b44_pci_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9294] int err ; [L9297] err = 0 [L9298] err = ssb_pcihost_register(& b44_pci_driver) [L9299] return (err); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9325] RET, EXPR b44_pci_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_init()=0, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9325] err = b44_pci_init() [L9326] COND FALSE !(err != 0) [L9331] err = __ssb_driver_register(& b44_ssb_driver, & __this_module) [L9332] COND FALSE !(err != 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9337] return (err); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9398] RET, EXPR b44_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_init()=0, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, var_b44_suspend_77_p1={9223372036854776649:0}] [L9398] tmp = b44_init() [L9399] COND FALSE !(tmp != 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, tmp=0, var_b44_suspend_77_p1={9223372036854776649:0}] [L9577] tmp___1 = __VERIFIER_nondet_int() [L9578] COND TRUE (tmp___1 != 0 || ldv_s_b44_netdev_ops_net_device_ops != 0) || ldv_s_b44_ssb_driver_ssb_driver != 0 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, tmp=0, tmp___1=1, var_b44_suspend_77_p1={9223372036854776649:0}] [L9406] tmp___0 = __VERIFIER_nondet_int() [L9408] case 0: [L9412] case 1: [L9416] case 2: [L9420] case 3: [L9424] case 4: [L9428] case 5: [L9432] case 6: [L9436] case 7: [L9440] case 8: [L9444] case 9: [L9448] case 10: [L9452] case 11: [L9456] case 12: [L9460] case 13: [L9464] case 14: [L9468] case 15: [L9483] case 16: [L9498] case 17: [L9500] CALL b44_start_xmit(var_group8, var_group1) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, skb={9223372036854777391:0}] [L7521] struct b44 *bp ; [L7522] void *tmp ; [L7523] int rc ; [L7524] dma_addr_t mapping ; [L7525] u32 len ; [L7526] u32 entry ; [L7527] u32 ctrl ; [L7528] unsigned long flags ; [L7529] long tmp___0 ; [L7530] struct sk_buff *bounce_skb ; [L7531] int tmp___1 ; [L7532] int tmp___2 ; [L7533] int tmp___3 ; [L7534] unsigned char *tmp___4 ; [L7535] int tmp___5 ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}] [L7538] CALL, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L5897] return ((void *)dev + 2816U); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776780:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L7538] RET, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, netdev_priv((struct net_device const *)dev)={9223372036854776780:0}, skb={9223372036854777391:0}, skb={9223372036854777391:0}] [L7538] tmp = netdev_priv((struct net_device const *)dev) [L7539] bp = (struct b44 *)tmp [L7540] rc = 0 [L7541] EXPR skb->len [L7541] len = skb->len [L7542] CALL ldv_spin_lock() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9821] ldv_spin = 1 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L7542] RET ldv_spin_lock() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543] EXPR bp->tx_cons [L7543] EXPR bp->tx_prod VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543] EXPR bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U [L7543] EXPR bp->tx_cons [L7543] EXPR bp->tx_prod [L7543] EXPR bp->tx_pending [L7543] EXPR bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_cons=29, bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U=0, bp->tx_pending=0, bp->tx_prod=0, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543-L7544] CALL, EXPR ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, exp=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L7543-L7544] RET, EXPR ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_cons=29, bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U=0, bp->tx_pending=0, bp->tx_prod=0, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L)=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543-L7544] tmp___0 = ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) [L7545] COND FALSE !(tmp___0 != 0L) [L7552] EXPR bp->sdev [L7552] EXPR (bp->sdev)->dma_dev [L7552] EXPR skb->data VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, skb->data={9223372036854775853:9223372036854777190}, tmp={9223372036854776780:0}, tmp___0=0] [L7552-L7553] CALL, EXPR dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}] [L5381] struct dma_map_ops *ops ; [L5382] struct dma_map_ops *tmp ; [L5383] dma_addr_t addr ; [L5384] int tmp___0 ; [L5385] long tmp___1 ; [L5386] unsigned long tmp___2 ; [L5387] unsigned long tmp___3 ; VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824] [L5390] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5390] RET, EXPR get_dma_ops(dev) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824] [L5390] tmp = get_dma_ops(dev) [L5391] ops = tmp VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}] [L5392] FCALL kmemcheck_mark_initialized(ptr, (unsigned int )size) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}] [L5393] CALL, EXPR valid_dma_direction((int )dir) VAL [\old(dma_desc_sync_size)=0, \old(dma_direction)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5340] return ((dma_direction == 0 || dma_direction == 1) || dma_direction == 2); VAL [\old(dma_desc_sync_size)=0, \old(dma_direction)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_direction=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5393] RET, EXPR valid_dma_direction((int )dir) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, valid_dma_direction((int )dir)=1] [L5393] tmp___0 = valid_dma_direction((int )dir) [L5394] CALL, EXPR ldv__builtin_expect(tmp___0 == 0, 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5394] RET, EXPR ldv__builtin_expect(tmp___0 == 0, 0L) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect(tmp___0 == 0, 0L)=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1] [L5394] tmp___1 = ldv__builtin_expect(tmp___0 == 0, 0L) [L5395] COND FALSE !(tmp___1 != 0L) [L5403] tmp___2 = __phys_addr((unsigned long )ptr) [L5404] EXPR ops->map_page VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->map_page={9223372036854777085:9223372036854776705}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0] [L5404-L5405] EXPR, FCALL (*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs) VAL [(*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs)=0, \old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->map_page={9223372036854777085:9223372036854776705}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0, tmp___2=99079191802150911] [L5404-L5405] addr = (*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs) [L5406] tmp___3 = __phys_addr((unsigned long )ptr) [L5409] return (addr); VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, addr=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0, tmp___2=99079191802150911] [L7552-L7553] RET, EXPR dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0)=0, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, skb->data={9223372036854775853:9223372036854777190}, tmp={9223372036854776780:0}, tmp___0=0] [L7552-L7553] mapping = dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) [L7554] EXPR bp->sdev [L7554] EXPR (bp->sdev)->dma_dev VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0] [L7554] CALL, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5514] struct dma_map_ops *ops ; [L5515] struct dma_map_ops *tmp ; [L5516] int tmp___0 ; VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5519] RET, EXPR get_dma_ops(dev) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] tmp = get_dma_ops(dev) [L5520] ops = tmp [L5522] EXPR ops->mapping_error VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->mapping_error={0:0}, tmp={9223372036854776459:0}] [L5522-L5523] COND FALSE !((unsigned long )ops->mapping_error != (unsigned long )((int (*)(struct device * , dma_addr_t ))0)) [L5529] return (dma_addr == 0ULL); VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, tmp={9223372036854776459:0}] [L7554] RET, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_mapping_error((bp->sdev)->dma_dev, mapping)=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0] [L7554] tmp___5 = dma_mapping_error((bp->sdev)->dma_dev, mapping) [L7555] COND TRUE tmp___5 != 0 || (dma_addr_t )len + mapping > 1073741823ULL [L7556] EXPR bp->sdev [L7556] EXPR (bp->sdev)->dma_dev VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___5=1] [L7556] CALL, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5514] struct dma_map_ops *ops ; [L5515] struct dma_map_ops *tmp ; [L5516] int tmp___0 ; VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5519] RET, EXPR get_dma_ops(dev) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] tmp = get_dma_ops(dev) [L5520] ops = tmp [L5522] EXPR ops->mapping_error VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->mapping_error={0:0}, tmp={9223372036854776459:0}] [L5522-L5523] COND FALSE !((unsigned long )ops->mapping_error != (unsigned long )((int (*)(struct device * , dma_addr_t ))0)) [L5529] return (dma_addr == 0ULL); VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, tmp={9223372036854776459:0}] [L7556] RET, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_mapping_error((bp->sdev)->dma_dev, mapping)=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___5=1] [L7556] tmp___1 = dma_mapping_error((bp->sdev)->dma_dev, mapping) [L7557] COND FALSE !(tmp___1 == 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___1=1, tmp___5=1] [L7562] CALL alloc_skb(len, 33U) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9673] struct sk_buff *tmp ; VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, flags=33, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, size=1073741824] [L9676] CALL ldv_check_alloc_flags(flags) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9780] COND FALSE !(ldv_spin == 0 || flags & 32U) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, flags=33, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9783] CALL ldv_error() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9762] __VERIFIER_error() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] ----- [2018-11-23 15:33:37,550 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:33:37 BoogieIcfgContainer [2018-11-23 15:33:37,550 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 15:33:37,550 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 15:33:37,550 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 15:33:37,550 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 15:33:37,551 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:32:45" (3/4) ... [2018-11-23 15:33:37,555 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-23 15:33:37,555 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 15:33:37,556 INFO L168 Benchmark]: Toolchain (without parser) took 69365.20 ms. Allocated memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: 1.3 GB). Free memory was 944.7 MB in the beginning and 1.6 GB in the end (delta: -672.8 MB). Peak memory consumption was 643.2 MB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,557 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:33:37,557 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2435.31 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 151.0 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -115.3 MB). Peak memory consumption was 247.5 MB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,558 INFO L168 Benchmark]: Boogie Procedure Inliner took 71.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.9 MB). Peak memory consumption was 4.9 MB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,558 INFO L168 Benchmark]: Boogie Preprocessor took 156.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 34.0 MB). Peak memory consumption was 34.0 MB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,559 INFO L168 Benchmark]: RCFGBuilder took 14924.11 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 1.0 GB in the beginning and 898.4 MB in the end (delta: 122.8 MB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,667 INFO L168 Benchmark]: TraceAbstraction took 51769.01 ms. Allocated memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: 120.1 MB). Free memory was 898.4 MB in the beginning and 1.6 GB in the end (delta: -719.2 MB). Peak memory consumption was 322.3 MB. Max. memory is 11.5 GB. [2018-11-23 15:33:37,668 INFO L168 Benchmark]: Witness Printer took 4.83 ms. Allocated memory is still 2.3 GB. Free memory is still 1.6 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:33:37,671 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 2435.31 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 151.0 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -115.3 MB). Peak memory consumption was 247.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 71.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 4.9 MB). Peak memory consumption was 4.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 156.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 34.0 MB). Peak memory consumption was 34.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 14924.11 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 1.0 GB in the beginning and 898.4 MB in the end (delta: 122.8 MB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. * TraceAbstraction took 51769.01 ms. Allocated memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: 120.1 MB). Free memory was 898.4 MB in the beginning and 1.6 GB in the end (delta: -719.2 MB). Peak memory consumption was 322.3 MB. Max. memory is 11.5 GB. * Witness Printer took 4.83 ms. Allocated memory is still 2.3 GB. Free memory is still 1.6 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854775993 could not be translated for associated CType STRUCT~~ssb_driver?name~*CHAR?id_table~*ssb_device_id?probe~*((*ssb_device *ssb_device_id ) : INT)?remove~*((*ssb_device ) : VOID)?suspend~*((*ssb_device ~pm_message_t~0 ) : INT)?resume~*((*ssb_device ) : INT)?shutdown~*((*ssb_device ) : VOID)?drv~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?acpi_match_table~*acpi_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776408 could not be translated for associated CType ARRAY#_47_~ARRAY#_32_~CHAR## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854777258 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_add_vid~*((*net_device ~__be16~0 ~u16~0 ) : INT)?ndo_vlan_rx_kill_vid~*((*net_device ~__be16~0 ~u16~0 ) : INT)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ~gfp_t~0 ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_set_vf_spoofchk~*((*net_device INT ~bool~0 ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_setup_tc~*((*net_device ~u8~0 ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_ddp_target~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_get_hbainfo~*((*net_device *netdev_fcoe_hbainfo ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)?ndo_rx_flow_steer~*((*net_device *sk_buff ~u16~0 ~u32~0 ) : INT)?ndo_add_slave~*((*net_device *net_device ) : INT)?ndo_del_slave~*((*net_device *net_device ) : INT)?ndo_fix_features~*((*net_device ~netdev_features_t~0 ) : ~netdev_features_t~0)?ndo_set_features~*((*net_device ~netdev_features_t~0 ) : INT)?ndo_neigh_construct~*((*neighbour ) : INT)?ndo_neigh_destroy~*((*neighbour ) : VOID)?ndo_fdb_add~*((*ndmsg **nlattr *net_device *UCHAR ~u16~0 ) : INT)?ndo_fdb_del~*((*ndmsg **nlattr *net_device *UCHAR ) : INT)?ndo_fdb_dump~*((*sk_buff *netlink_callback *net_device INT ) : INT)?ndo_bridge_setlink~*((*net_device *nlmsghdr ) : INT)?ndo_bridge_getlink~*((*sk_buff ~u32~0 ~u32~0 *net_device ~u32~0 ) : INT)?ndo_bridge_dellink~*((*net_device *nlmsghdr ) : INT)?ndo_change_carrier~*((*net_device ~bool~0 ) : INT)# - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854777017 could not be translated for associated CType STRUCT~~pci_driver?node~STRUCT~~list_head?next~*list_head?prev~*list_head#?name~*CHAR?id_table~*pci_device_id?probe~*((*pci_dev *pci_device_id ) : INT)?remove~*((*pci_dev ) : VOID)?suspend~*((*pci_dev ~pm_message_t~0 ) : INT)?suspend_late~*((*pci_dev ~pm_message_t~0 ) : INT)?resume_early~*((*pci_dev ) : INT)?resume~*((*pci_dev ) : INT)?shutdown~*((*pci_dev ) : VOID)?sriov_configure~*((*pci_dev INT ) : INT)?err_handler~*pci_error_handlers?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?acpi_match_table~*acpi_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?dynids~STRUCT~~pci_dynids?lock~~spinlock_t~0?list~STRUCT~~list_head?next~*list_head?prev~*list_head### - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854775881 could not be translated for associated CType ARRAY#_2_~STRUCT~~ssb_device_id?vendor~~__u16~0?coreid~~__u16~0?revision~~__u8~0## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776530 could not be translated for associated CType STRUCT~~ssb_driver?name~*CHAR?id_table~*ssb_device_id?probe~*((*ssb_device *ssb_device_id ) : INT)?remove~*((*ssb_device ) : VOID)?suspend~*((*ssb_device ~pm_message_t~0 ) : INT)?resume~*((*ssb_device ) : INT)?shutdown~*((*ssb_device ) : VOID)?drv~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?acpi_match_table~*acpi_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private## - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776898 could not be translated for associated CType STRUCT~~ethtool_ops?get_settings~*((*net_device *ethtool_cmd ) : INT)?set_settings~*((*net_device *ethtool_cmd ) : INT)?get_drvinfo~*((*net_device *ethtool_drvinfo ) : VOID)?get_regs_len~*((*net_device ) : INT)?get_regs~*((*net_device *ethtool_regs *VOID ) : VOID)?get_wol~*((*net_device *ethtool_wolinfo ) : VOID)?set_wol~*((*net_device *ethtool_wolinfo ) : INT)?get_msglevel~*((*net_device ) : ~u32~0)?set_msglevel~*((*net_device ~u32~0 ) : VOID)?nway_reset~*((*net_device ) : INT)?get_link~*((*net_device ) : ~u32~0)?get_eeprom_len~*((*net_device ) : INT)?get_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?set_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?get_coalesce~*((*net_device *ethtool_coalesce ) : INT)?set_coalesce~*((*net_device *ethtool_coalesce ) : INT)?get_ringparam~*((*net_device *ethtool_ringparam ) : VOID)?set_ringparam~*((*net_device *ethtool_ringparam ) : INT)?get_pauseparam~*((*net_device *ethtool_pauseparam ) : VOID)?set_pauseparam~*((*net_device *ethtool_pauseparam ) : INT)?self_test~*((*net_device *ethtool_test *~u64~0 ) : VOID)?get_strings~*((*net_device ~u32~0 *~u8~0 ) : VOID)?set_phys_id~*((*net_device ~ethtool_phys_id_state~0 ) : INT)?get_ethtool_stats~*((*net_device *ethtool_stats *~u64~0 ) : VOID)?begin~*((*net_device ) : INT)?complete~*((*net_device ) : VOID)?get_priv_flags~*((*net_device ) : ~u32~0)?set_priv_flags~*((*net_device ~u32~0 ) : INT)?get_sset_count~*((*net_device INT ) : INT)?get_rxnfc~*((*net_device *ethtool_rxnfc *~u32~0 ) : INT)?set_rxnfc~*((*net_device *ethtool_rxnfc ) : INT)?flash_device~*((*net_device *ethtool_flash ) : INT)?reset~*((*net_device *~u32~0 ) : INT)?get_rxfh_indir_size~*((*net_device ) : ~u32~0)?get_rxfh_indir~*((*net_device *~u32~0 ) : INT)?set_rxfh_indir~*((*net_device *~u32~0 ) : INT)?get_channels~*((*net_device *ethtool_channels ) : VOID)?set_channels~*((*net_device *ethtool_channels ) : INT)?get_dump_flag~*((*net_device *ethtool_dump ) : INT)?get_dump_data~*((*net_device *ethtool_dump *VOID ) : INT)?set_dump~*((*net_device *ethtool_dump ) : INT)?get_ts_info~*((*net_device *ethtool_ts_info ) : INT)?get_module_info~*((*net_device *ethtool_modinfo ) : INT)?get_module_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?get_eee~*((*net_device *ethtool_eee ) : INT)?set_eee~*((*net_device *ethtool_eee ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776578 could not be translated for associated CType ARRAY#_4_~STRUCT~~pci_device_id?vendor~~__u32~0?device~~__u32~0?subvendor~~__u32~0?subdevice~~__u32~0?class~~__u32~0?class_mask~~__u32~0?driver_data~~kernel_ulong_t~0## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854777051 could not be translated for associated CType STRUCT~~ethtool_ops?get_settings~*((*net_device *ethtool_cmd ) : INT)?set_settings~*((*net_device *ethtool_cmd ) : INT)?get_drvinfo~*((*net_device *ethtool_drvinfo ) : VOID)?get_regs_len~*((*net_device ) : INT)?get_regs~*((*net_device *ethtool_regs *VOID ) : VOID)?get_wol~*((*net_device *ethtool_wolinfo ) : VOID)?set_wol~*((*net_device *ethtool_wolinfo ) : INT)?get_msglevel~*((*net_device ) : ~u32~0)?set_msglevel~*((*net_device ~u32~0 ) : VOID)?nway_reset~*((*net_device ) : INT)?get_link~*((*net_device ) : ~u32~0)?get_eeprom_len~*((*net_device ) : INT)?get_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?set_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?get_coalesce~*((*net_device *ethtool_coalesce ) : INT)?set_coalesce~*((*net_device *ethtool_coalesce ) : INT)?get_ringparam~*((*net_device *ethtool_ringparam ) : VOID)?set_ringparam~*((*net_device *ethtool_ringparam ) : INT)?get_pauseparam~*((*net_device *ethtool_pauseparam ) : VOID)?set_pauseparam~*((*net_device *ethtool_pauseparam ) : INT)?self_test~*((*net_device *ethtool_test *~u64~0 ) : VOID)?get_strings~*((*net_device ~u32~0 *~u8~0 ) : VOID)?set_phys_id~*((*net_device ~ethtool_phys_id_state~0 ) : INT)?get_ethtool_stats~*((*net_device *ethtool_stats *~u64~0 ) : VOID)?begin~*((*net_device ) : INT)?complete~*((*net_device ) : VOID)?get_priv_flags~*((*net_device ) : ~u32~0)?set_priv_flags~*((*net_device ~u32~0 ) : INT)?get_sset_count~*((*net_device INT ) : INT)?get_rxnfc~*((*net_device *ethtool_rxnfc *~u32~0 ) : INT)?set_rxnfc~*((*net_device *ethtool_rxnfc ) : INT)?flash_device~*((*net_device *ethtool_flash ) : INT)?reset~*((*net_device *~u32~0 ) : INT)?get_rxfh_indir_size~*((*net_device ) : ~u32~0)?get_rxfh_indir~*((*net_device *~u32~0 ) : INT)?set_rxfh_indir~*((*net_device *~u32~0 ) : INT)?get_channels~*((*net_device *ethtool_channels ) : VOID)?set_channels~*((*net_device *ethtool_channels ) : INT)?get_dump_flag~*((*net_device *ethtool_dump ) : INT)?get_dump_data~*((*net_device *ethtool_dump *VOID ) : INT)?set_dump~*((*net_device *ethtool_dump ) : INT)?get_ts_info~*((*net_device *ethtool_ts_info ) : INT)?get_module_info~*((*net_device *ethtool_modinfo ) : INT)?get_module_eeprom~*((*net_device *ethtool_eeprom *~u8~0 ) : INT)?get_eee~*((*net_device *ethtool_eee ) : INT)?set_eee~*((*net_device *ethtool_eee ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776354 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_add_vid~*((*net_device ~__be16~0 ~u16~0 ) : INT)?ndo_vlan_rx_kill_vid~*((*net_device ~__be16~0 ~u16~0 ) : INT)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ~gfp_t~0 ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_set_vf_spoofchk~*((*net_device INT ~bool~0 ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_setup_tc~*((*net_device ~u8~0 ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_ddp_target~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_get_hbainfo~*((*net_device *netdev_fcoe_hbainfo ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)?ndo_rx_flow_steer~*((*net_device *sk_buff ~u16~0 ~u32~0 ) : INT)?ndo_add_slave~*((*net_device *net_device ) : INT)?ndo_del_slave~*((*net_device *net_device ) : INT)?ndo_fix_features~*((*net_device ~netdev_features_t~0 ) : ~netdev_features_t~0)?ndo_set_features~*((*net_device ~netdev_features_t~0 ) : INT)?ndo_neigh_construct~*((*neighbour ) : INT)?ndo_neigh_destroy~*((*neighbour ) : VOID)?ndo_fdb_add~*((*ndmsg **nlattr *net_device *UCHAR ~u16~0 ) : INT)?ndo_fdb_del~*((*ndmsg **nlattr *net_device *UCHAR ) : INT)?ndo_fdb_dump~*((*sk_buff *netlink_callback *net_device INT ) : INT)?ndo_bridge_setlink~*((*net_device *nlmsghdr ) : INT)?ndo_bridge_getlink~*((*sk_buff ~u32~0 ~u32~0 *net_device ~u32~0 ) : INT)?ndo_bridge_dellink~*((*net_device *nlmsghdr ) : INT)?ndo_change_carrier~*((*net_device ~bool~0 ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776066 could not be translated for associated CType STRUCT~~pci_driver?node~STRUCT~~list_head?next~*list_head?prev~*list_head#?name~*CHAR?id_table~*pci_device_id?probe~*((*pci_dev *pci_device_id ) : INT)?remove~*((*pci_dev ) : VOID)?suspend~*((*pci_dev ~pm_message_t~0 ) : INT)?suspend_late~*((*pci_dev ~pm_message_t~0 ) : INT)?resume_early~*((*pci_dev ) : INT)?resume~*((*pci_dev ) : INT)?shutdown~*((*pci_dev ) : VOID)?sriov_configure~*((*pci_dev INT ) : INT)?err_handler~*pci_error_handlers?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?acpi_match_table~*acpi_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?dynids~STRUCT~~pci_dynids?lock~~spinlock_t~0?list~STRUCT~~list_head?next~*list_head?prev~*list_head### - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854777102 could not be translated for associated CType ARRAY#_47_~ARRAY#_32_~CHAR## - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776525 could not be translated for associated CType ARRAY#_2_~STRUCT~~ssb_device_id?vendor~~__u16~0?coreid~~__u16~0?revision~~__u8~0## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 9223372036854776832 could not be translated for associated CType ARRAY#_4_~STRUCT~~pci_device_id?vendor~~__u32~0?device~~__u32~0?subvendor~~__u32~0?subdevice~~__u32~0?class~~__u32~0?class_mask~~__u32~0?driver_data~~kernel_ulong_t~0## - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!revision - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_ssb_device_table~0!coreid - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 9762]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseAnd at line 9780. Possible FailurePath: [L6239] static int b44_debug = -1; [L6260] static int dma_desc_sync_size ; [L6261] static int instance ; [L6262-L6462] static char const b44_gstrings[47U][32U] = { { 't', 'x', '_', 'g', 'o', 'o', 'd', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 't', 'x', '_', 'g', 'o', 'o', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 't', 'x', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'm', 'u', 'l', 't', 'i', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '6', '4', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '6', '5', '_', 't', 'o', '_', '1', '2', '7', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '1', '2', '8', '_', 't', 'o', '_', '2', '5', '5', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '2', '5', '6', '_', 't', 'o', '_', '5', '1', '1', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '5', '1', '2', '_', 't', 'o', '_', '1', '0', '2', '3', '\000'}, { 't', 'x', '_', 'l', 'e', 'n', '_', '1', '0', '2', '4', '_', 't', 'o', '_', 'm', 'a', 'x', '\000'}, { 't', 'x', '_', 'j', 'a', 'b', 'b', 'e', 'r', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'o', 'v', 'e', 'r', 's', 'i', 'z', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'f', 'r', 'a', 'g', 'm', 'e', 'n', 't', '_', 'p', 'k', 't', 's', '\000'}, { 't', 'x', '_', 'u', 'n', 'd', 'e', 'r', 'r', 'u', 'n', 's', '\000'}, { 't', 'x', '_', 't', 'o', 't', 'a', 'l', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 's', 'i', 'n', 'g', 'l', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'm', 'u', 'l', 't', 'i', 'p', 'l', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'e', 'x', 'c', 'e', 's', 's', 'i', 'v', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'l', 'a', 't', 'e', '_', 'c', 'o', 'l', 's', '\000'}, { 't', 'x', '_', 'd', 'e', 'f', 'e', 'r', 'e', 'd', '\000'}, { 't', 'x', '_', 'c', 'a', 'r', 'r', 'i', 'e', 'r', '_', 'l', 'o', 's', 't', '\000'}, { 't', 'x', '_', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'g', 'o', 'o', 'd', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 'r', 'x', '_', 'g', 'o', 'o', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'o', 'c', 't', 'e', 't', 's', '\000'}, { 'r', 'x', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'b', 'r', 'o', 'a', 'd', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'm', 'u', 'l', 't', 'i', 'c', 'a', 's', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '6', '4', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '6', '5', '_', 't', 'o', '_', '1', '2', '7', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '1', '2', '8', '_', 't', 'o', '_', '2', '5', '5', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '2', '5', '6', '_', 't', 'o', '_', '5', '1', '1', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '5', '1', '2', '_', 't', 'o', '_', '1', '0', '2', '3', '\000'}, { 'r', 'x', '_', 'l', 'e', 'n', '_', '1', '0', '2', '4', '_', 't', 'o', '_', 'm', 'a', 'x', '\000'}, { 'r', 'x', '_', 'j', 'a', 'b', 'b', 'e', 'r', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'o', 'v', 'e', 'r', 's', 'i', 'z', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'f', 'r', 'a', 'g', 'm', 'e', 'n', 't', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'm', 'i', 's', 's', 'e', 'd', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'c', 'r', 'c', '_', 'a', 'l', 'i', 'g', 'n', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'u', 'n', 'd', 'e', 'r', 's', 'i', 'z', 'e', '\000'}, { 'r', 'x', '_', 'c', 'r', 'c', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'a', 'l', 'i', 'g', 'n', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 's', 'y', 'm', 'b', 'o', 'l', '_', 'e', 'r', 'r', 's', '\000'}, { 'r', 'x', '_', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}, { 'r', 'x', '_', 'n', 'o', 'n', 'p', 'a', 'u', 's', 'e', '_', 'p', 'k', 't', 's', '\000'}}; [L9356] int LDV_IN_INTERRUPT ; [L9774] int ldv_spin = 0; [L6240-L6243] static struct pci_device_id const b44_pci_tbl[4U] = { {5348U, 17409U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {5348U, 17410U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {5348U, 5900U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L6244] struct pci_device_id const __mod_pci_device_table ; [L6245-L6253] static struct pci_driver b44_pci_driver = {{0, 0}, "b44", (struct pci_device_id const *)(& b44_pci_tbl), 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{{{{{0U}}, 0U, 0U, 0, {0, {0, 0}, 0, 0, 0UL}}}}, {0, 0}}}; [L6254-L6255] static struct ssb_device_id const b44_ssb_tbl[2U] = { {16963U, 2054U, 255U}, {0U, (unsigned short)0, (unsigned char)0}}; [L6256] struct ssb_device_id const __mod_ssb_device_table ; [L8970-L8975] static struct ethtool_ops const b44_ethtool_ops = {& b44_get_settings, & b44_set_settings, & b44_get_drvinfo, 0, 0, & b44_get_wol, & b44_set_wol, & b44_get_msglevel, & b44_set_msglevel, & b44_nway_reset, & ethtool_op_get_link, 0, 0, 0, 0, 0, & b44_get_ringparam, & b44_set_ringparam, & b44_get_pauseparam, & b44_set_pauseparam, 0, & b44_get_strings, 0, & b44_get_ethtool_stats, 0, 0, 0, 0, & b44_get_sset_count, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L9059-L9063] static struct net_device_ops const b44_netdev_ops = {0, 0, & b44_open, & b44_close, & b44_start_xmit, 0, 0, & b44_set_rx_mode, & b44_set_mac_addr, & eth_validate_addr, & b44_ioctl, 0, & b44_change_mtu, 0, & b44_tx_timeout, & b44_get_stats64, 0, 0, 0, & b44_poll_controller, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L9288-L9291] static struct ssb_driver b44_ssb_driver = {"b44", (struct ssb_device_id const *)(& b44_ssb_tbl), & b44_init_one, & b44_remove_one, & b44_suspend, & b44_resume, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}; VAL [\old(__mod_pci_device_table)=9223372036854777261, \old(__mod_pci_device_table)=9223372036854777386, \old(__mod_pci_device_table)=9223372036854776040, \old(__mod_pci_device_table)=9223372036854777142, \old(__mod_pci_device_table)=9223372036854777010, \old(__mod_pci_device_table)=9223372036854776236, \old(__mod_pci_device_table)=9223372036854776184, \old(__mod_ssb_device_table)=9223372036854777361, \old(__mod_ssb_device_table)=9223372036854776512, \old(__mod_ssb_device_table)=9223372036854776519, \old(b44_debug)=9223372036854776380, \old(b44_ethtool_ops)=null, \old(b44_ethtool_ops)=null, \old(b44_gstrings)=null, \old(b44_gstrings)=null, \old(b44_netdev_ops)=null, \old(b44_netdev_ops)=null, \old(b44_pci_driver)=null, \old(b44_pci_driver)=null, \old(b44_pci_tbl)=null, \old(b44_pci_tbl)=null, \old(b44_ssb_driver)=null, \old(b44_ssb_driver)=null, \old(b44_ssb_tbl)=null, \old(b44_ssb_tbl)=null, \old(dma_desc_sync_size)=9223372036854776521, \old(instance)=9223372036854776310, \old(LDV_IN_INTERRUPT)=9223372036854777231, \old(ldv_spin)=9223372036854776935, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=0, ldv_spin=0] [L9359] struct net_device *var_group1 ; [L9360] struct ethtool_drvinfo *var_group2 ; [L9361] struct ethtool_cmd *var_group3 ; [L9362] struct ethtool_wolinfo *var_group4 ; [L9363] struct ethtool_ringparam *var_group5 ; [L9364] struct ethtool_pauseparam *var_group6 ; [L9365] u32 var_b44_set_msglevel_59_p1 ; [L9366] u32 var_b44_get_strings_68_p1 ; [L9367] u8 *var_b44_get_strings_68_p2 ; [L9368] int var_b44_get_sset_count_69_p1 ; [L9369] struct ethtool_stats *var_group7 ; [L9370] u64 *var_b44_get_ethtool_stats_70_p2 ; [L9371] int res_b44_open_45 ; [L9372] int res_b44_close_53 ; [L9373] struct sk_buff *var_group8 ; [L9374] struct rtnl_link_stats64 *var_group9 ; [L9375] void *var_b44_set_mac_addr_43_p1 ; [L9376] struct ifreq *var_group10 ; [L9377] int var_b44_ioctl_73_p2 ; [L9378] int var_b44_change_mtu_34_p1 ; [L9379] struct ssb_device *var_group11 ; [L9380] struct ssb_device_id const *var_b44_init_one_75_p1 ; [L9381] int res_b44_init_one_75 ; [L9382] pm_message_t var_b44_suspend_77_p1 ; [L9383] int var_b44_interrupt_31_p0 ; [L9384] void *var_b44_interrupt_31_p1 ; [L9385] unsigned long var_b44_timer_25_p0 ; [L9386] int ldv_s_b44_netdev_ops_net_device_ops ; [L9387] int ldv_s_b44_ssb_driver_ssb_driver ; [L9388] int tmp ; [L9389] int tmp___0 ; [L9390] int tmp___1 ; [L9393] ldv_s_b44_netdev_ops_net_device_ops = 0 [L9394] ldv_s_b44_ssb_driver_ssb_driver = 0 [L9395] LDV_IN_INTERRUPT = 1 [L9398] CALL, EXPR b44_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9313] unsigned int dma_desc_align_size ; [L9314] int tmp ; [L9315] int err ; [L9316] unsigned int __max1 ; [L9317] unsigned int __max2 ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] CALL, EXPR dma_get_cache_alignment() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L5662] return (1); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] RET, EXPR dma_get_cache_alignment() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=0, dma_get_cache_alignment()=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9320] tmp = dma_get_cache_alignment() [L9321] dma_desc_align_size = (unsigned int )tmp [L9322] __max1 = dma_desc_align_size [L9323] __max2 = 8U VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9324] EXPR __max1 > __max2 ? __max1 : __max2 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max1 > __max2 ? __max1 : __max2=8, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9324] dma_desc_sync_size = (int )(__max1 > __max2 ? __max1 : __max2) [L9325] CALL, EXPR b44_pci_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9294] int err ; [L9297] err = 0 [L9298] err = ssb_pcihost_register(& b44_pci_driver) [L9299] return (err); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9325] RET, EXPR b44_pci_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_init()=0, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9325] err = b44_pci_init() [L9326] COND FALSE !(err != 0) [L9331] err = __ssb_driver_register(& b44_ssb_driver, & __this_module) [L9332] COND FALSE !(err != 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9337] return (err); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __max1=1, __max2=8, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_align_size=1, dma_desc_sync_size=8, err=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, tmp=1] [L9398] RET, EXPR b44_init() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_init()=0, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, var_b44_suspend_77_p1={9223372036854776649:0}] [L9398] tmp = b44_init() [L9399] COND FALSE !(tmp != 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, tmp=0, var_b44_suspend_77_p1={9223372036854776649:0}] [L9577] tmp___1 = __VERIFIER_nondet_int() [L9578] COND TRUE (tmp___1 != 0 || ldv_s_b44_netdev_ops_net_device_ops != 0) || ldv_s_b44_ssb_driver_ssb_driver != 0 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_s_b44_netdev_ops_net_device_ops=0, ldv_s_b44_ssb_driver_ssb_driver=0, ldv_spin=0, tmp=0, tmp___1=1, var_b44_suspend_77_p1={9223372036854776649:0}] [L9406] tmp___0 = __VERIFIER_nondet_int() [L9408] case 0: [L9412] case 1: [L9416] case 2: [L9420] case 3: [L9424] case 4: [L9428] case 5: [L9432] case 6: [L9436] case 7: [L9440] case 8: [L9444] case 9: [L9448] case 10: [L9452] case 11: [L9456] case 12: [L9460] case 13: [L9464] case 14: [L9468] case 15: [L9483] case 16: [L9498] case 17: [L9500] CALL b44_start_xmit(var_group8, var_group1) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, skb={9223372036854777391:0}] [L7521] struct b44 *bp ; [L7522] void *tmp ; [L7523] int rc ; [L7524] dma_addr_t mapping ; [L7525] u32 len ; [L7526] u32 entry ; [L7527] u32 ctrl ; [L7528] unsigned long flags ; [L7529] long tmp___0 ; [L7530] struct sk_buff *bounce_skb ; [L7531] int tmp___1 ; [L7532] int tmp___2 ; [L7533] int tmp___3 ; [L7534] unsigned char *tmp___4 ; [L7535] int tmp___5 ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}] [L7538] CALL, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L5897] return ((void *)dev + 2816U); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776780:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L7538] RET, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0, netdev_priv((struct net_device const *)dev)={9223372036854776780:0}, skb={9223372036854777391:0}, skb={9223372036854777391:0}] [L7538] tmp = netdev_priv((struct net_device const *)dev) [L7539] bp = (struct b44 *)tmp [L7540] rc = 0 [L7541] EXPR skb->len [L7541] len = skb->len [L7542] CALL ldv_spin_lock() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=0] [L9821] ldv_spin = 1 VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L7542] RET ldv_spin_lock() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543] EXPR bp->tx_cons [L7543] EXPR bp->tx_prod VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543] EXPR bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U [L7543] EXPR bp->tx_cons [L7543] EXPR bp->tx_prod [L7543] EXPR bp->tx_pending [L7543] EXPR bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_cons=29, bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U=0, bp->tx_pending=0, bp->tx_prod=0, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543-L7544] CALL, EXPR ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, exp=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L7543-L7544] RET, EXPR ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->tx_cons=29, bp->tx_cons=29, bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U=0, bp->tx_pending=0, bp->tx_prod=0, bp->tx_prod=0, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L)=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}] [L7543-L7544] tmp___0 = ldv__builtin_expect(bp->tx_cons <= bp->tx_prod ? bp->tx_cons + bp->tx_pending == bp->tx_prod : (bp->tx_cons - bp->tx_prod) + bp->tx_pending == 512U, 0L) [L7545] COND FALSE !(tmp___0 != 0L) [L7552] EXPR bp->sdev [L7552] EXPR (bp->sdev)->dma_dev [L7552] EXPR skb->data VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, skb->data={9223372036854775853:9223372036854777190}, tmp={9223372036854776780:0}, tmp___0=0] [L7552-L7553] CALL, EXPR dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}] [L5381] struct dma_map_ops *ops ; [L5382] struct dma_map_ops *tmp ; [L5383] dma_addr_t addr ; [L5384] int tmp___0 ; [L5385] long tmp___1 ; [L5386] unsigned long tmp___2 ; [L5387] unsigned long tmp___3 ; VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824] [L5390] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5390] RET, EXPR get_dma_ops(dev) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824] [L5390] tmp = get_dma_ops(dev) [L5391] ops = tmp VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}] [L5392] FCALL kmemcheck_mark_initialized(ptr, (unsigned int )size) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}] [L5393] CALL, EXPR valid_dma_direction((int )dir) VAL [\old(dma_desc_sync_size)=0, \old(dma_direction)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5340] return ((dma_direction == 0 || dma_direction == 1) || dma_direction == 2); VAL [\old(dma_desc_sync_size)=0, \old(dma_direction)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_direction=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5393] RET, EXPR valid_dma_direction((int )dir) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, valid_dma_direction((int )dir)=1] [L5393] tmp___0 = valid_dma_direction((int )dir) [L5394] CALL, EXPR ldv__builtin_expect(tmp___0 == 0, 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=0, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5394] RET, EXPR ldv__builtin_expect(tmp___0 == 0, 0L) VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect(tmp___0 == 0, 0L)=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1] [L5394] tmp___1 = ldv__builtin_expect(tmp___0 == 0, 0L) [L5395] COND FALSE !(tmp___1 != 0L) [L5403] tmp___2 = __phys_addr((unsigned long )ptr) [L5404] EXPR ops->map_page VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->map_page={9223372036854777085:9223372036854776705}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0] [L5404-L5405] EXPR, FCALL (*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs) VAL [(*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs)=0, \old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->map_page={9223372036854777085:9223372036854776705}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0, tmp___2=99079191802150911] [L5404-L5405] addr = (*(ops->map_page))(dev, 0xffffea0000000000UL + (tmp___2 >> 12), (unsigned long )ptr & 4095UL, size, dir, attrs) [L5406] tmp___3 = __phys_addr((unsigned long )ptr) [L5409] return (addr); VAL [\old(dir)=1, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, \result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, addr=0, attrs={0:0}, attrs={0:0}, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dir=1, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ptr={9223372036854775853:9223372036854777190}, ptr={9223372036854775853:9223372036854777190}, size=1073741824, tmp={9223372036854776459:0}, tmp___0=1, tmp___1=0, tmp___2=99079191802150911] [L7552-L7553] RET, EXPR dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0)=0, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, skb->data={9223372036854775853:9223372036854777190}, tmp={9223372036854776780:0}, tmp___0=0] [L7552-L7553] mapping = dma_map_single_attrs((bp->sdev)->dma_dev, (void *)skb->data, (size_t )len, 1, 0) [L7554] EXPR bp->sdev [L7554] EXPR (bp->sdev)->dma_dev VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0] [L7554] CALL, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5514] struct dma_map_ops *ops ; [L5515] struct dma_map_ops *tmp ; [L5516] int tmp___0 ; VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5519] RET, EXPR get_dma_ops(dev) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] tmp = get_dma_ops(dev) [L5520] ops = tmp [L5522] EXPR ops->mapping_error VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->mapping_error={0:0}, tmp={9223372036854776459:0}] [L5522-L5523] COND FALSE !((unsigned long )ops->mapping_error != (unsigned long )((int (*)(struct device * , dma_addr_t ))0)) [L5529] return (dma_addr == 0ULL); VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, tmp={9223372036854776459:0}] [L7554] RET, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_mapping_error((bp->sdev)->dma_dev, mapping)=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0] [L7554] tmp___5 = dma_mapping_error((bp->sdev)->dma_dev, mapping) [L7555] COND TRUE tmp___5 != 0 || (dma_addr_t )len + mapping > 1073741823ULL [L7556] EXPR bp->sdev [L7556] EXPR (bp->sdev)->dma_dev VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___5=1] [L7556] CALL, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5514] struct dma_map_ops *ops ; [L5515] struct dma_map_ops *tmp ; [L5516] int tmp___0 ; VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] CALL, EXPR get_dma_ops(dev) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5366] long tmp ; VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] CALL, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9771] return (exp); VAL [\old(c)=0, \old(dma_desc_sync_size)=0, \old(exp)=1, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, c=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, exp=1, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] RET, EXPR ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L)=1, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5369-L5370] tmp = ldv__builtin_expect((unsigned long )dev == (unsigned long )((struct device *)0), 0L) [L5371] tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1, tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0)=1] [L5371] COND TRUE tmp != 0L || (unsigned long )dev->archdata.dma_ops == (unsigned long )((struct dma_map_ops *)0) [L5372] return (dma_ops); VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result={9223372036854776459:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, tmp=1] [L5519] RET, EXPR get_dma_ops(dev) VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, get_dma_ops(dev)={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L5519] tmp = get_dma_ops(dev) [L5520] ops = tmp [L5522] EXPR ops->mapping_error VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, ops->mapping_error={0:0}, tmp={9223372036854776459:0}] [L5522-L5523] COND FALSE !((unsigned long )ops->mapping_error != (unsigned long )((int (*)(struct device * , dma_addr_t ))0)) [L5529] return (dma_addr == 0ULL); VAL [\old(dma_addr)=0, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dev={0:0}, dev={0:0}, dma_addr=0, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, ops={9223372036854776459:0}, tmp={9223372036854776459:0}] [L7556] RET, EXPR dma_mapping_error((bp->sdev)->dma_dev, mapping) VAL [(bp->sdev)->dma_dev={0:0}, \old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, bp->sdev={9223372036854776944:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_mapping_error((bp->sdev)->dma_dev, mapping)=1, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___5=1] [L7556] tmp___1 = dma_mapping_error((bp->sdev)->dma_dev, mapping) [L7557] COND FALSE !(tmp___1 == 0) VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, bp={9223372036854776780:0}, dev={9223372036854776780:-2816}, dev={9223372036854776780:-2816}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, len=1073741824, mapping=0, rc=0, skb={9223372036854777391:0}, skb={9223372036854777391:0}, tmp={9223372036854776780:0}, tmp___0=0, tmp___1=1, tmp___5=1] [L7562] CALL alloc_skb(len, 33U) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9673] struct sk_buff *tmp ; VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, \old(size)=1073741824, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, flags=33, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1, size=1073741824] [L9676] CALL ldv_check_alloc_flags(flags) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9780] COND FALSE !(ldv_spin == 0 || flags & 32U) VAL [\old(dma_desc_sync_size)=0, \old(flags)=33, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, flags=33, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9783] CALL ldv_error() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] [L9762] __VERIFIER_error() VAL [\old(dma_desc_sync_size)=0, \old(instance)=0, \old(LDV_IN_INTERRUPT)=0, \old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, __mod_ssb_device_table=0, b44_debug=-1, b44_ethtool_ops={9223372036854776897:0}, b44_gstrings={9223372036854777100:0}, b44_netdev_ops={9223372036854777254:0}, b44_pci_driver={9223372036854776071:0}, b44_pci_tbl={9223372036854776577:0}, b44_ssb_driver={9223372036854776532:0}, b44_ssb_tbl={9223372036854776971:0}, dma_desc_sync_size=8, dma_ops={9223372036854776459:0}, instance=0, LDV_IN_INTERRUPT=1, ldv_spin=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 165 procedures, 1728 locations, 1 error locations. UNSAFE Result, 51.7s OverallTime, 4 OverallIterations, 5 TraceHistogramMax, 0.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7692 SDtfs, 1952 SDslu, 10451 SDs, 0 SdLazy, 24 SolverSat, 3 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2334occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 3 MinimizatonAttempts, 20 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 3.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 491 NumberOfCodeBlocks, 491 NumberOfCodeBlocksAsserted, 4 NumberOfCheckSat, 339 ConstructedInterpolants, 0 QuantifiedInterpolants, 52103 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 3 InterpolantComputations, 3 PerfectInterpolantSequences, 61/61 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-aa41828 [2018-11-23 15:33:57,338 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 15:33:57,339 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 15:33:57,346 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 15:33:57,346 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 15:33:57,347 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 15:33:57,348 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 15:33:57,349 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 15:33:57,350 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 15:33:57,351 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 15:33:57,351 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 15:33:57,352 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 15:33:57,352 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 15:33:57,353 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 15:33:57,354 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 15:33:57,355 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 15:33:57,355 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 15:33:57,357 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 15:33:57,358 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 15:33:57,359 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 15:33:57,360 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 15:33:57,361 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 15:33:57,363 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 15:33:57,363 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 15:33:57,364 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 15:33:57,364 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 15:33:57,365 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 15:33:57,366 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 15:33:57,367 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 15:33:57,368 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 15:33:57,368 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 15:33:57,368 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 15:33:57,368 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 15:33:57,368 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 15:33:57,369 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 15:33:57,370 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 15:33:57,371 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2018-11-23 15:33:57,381 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 15:33:57,381 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 15:33:57,382 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 15:33:57,382 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 15:33:57,382 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 15:33:57,383 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 15:33:57,383 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 15:33:57,384 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 15:33:57,384 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:33:57,385 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 15:33:57,385 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fba57fb9b90f358055e96a73f6fe2a6d58f10629 [2018-11-23 15:33:57,417 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 15:33:57,427 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 15:33:57,429 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 15:33:57,431 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 15:33:57,431 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 15:33:57,432 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:33:57,478 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/82141ad9f/b0d5307d89f44496b8a5051a3aa167e9/FLAG03905e246 [2018-11-23 15:33:58,007 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 15:33:58,008 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/sv-benchmarks/c/ldv-challenges/linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:33:58,034 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/82141ad9f/b0d5307d89f44496b8a5051a3aa167e9/FLAG03905e246 [2018-11-23 15:33:58,244 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/data/82141ad9f/b0d5307d89f44496b8a5051a3aa167e9 [2018-11-23 15:33:58,246 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 15:33:58,247 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 15:33:58,248 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 15:33:58,248 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 15:33:58,251 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 15:33:58,252 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:33:58" (1/1) ... [2018-11-23 15:33:58,254 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@631d50bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:33:58, skipping insertion in model container [2018-11-23 15:33:58,254 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:33:58" (1/1) ... [2018-11-23 15:33:58,260 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 15:33:58,345 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 15:34:00,099 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:34:00,164 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 15:34:00,380 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:34:00,831 INFO L195 MainTranslator]: Completed translation [2018-11-23 15:34:00,831 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00 WrapperNode [2018-11-23 15:34:00,831 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 15:34:00,832 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 15:34:00,832 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 15:34:00,832 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 15:34:00,837 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:00,888 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:00,907 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 15:34:00,907 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 15:34:00,907 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 15:34:00,908 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 15:34:00,915 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:00,915 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:00,934 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:00,935 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:01,034 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:01,047 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:01,067 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... [2018-11-23 15:34:01,086 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 15:34:01,086 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 15:34:01,086 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 15:34:01,086 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 15:34:01,087 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:34:01,129 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_sync_single_for_device [2018-11-23 15:34:01,129 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_invariants [2018-11-23 15:34:01,130 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_invariants [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_flow_ctrl [2018-11-23 15:34:01,130 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_flow_ctrl [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_set_drvdata [2018-11-23 15:34:01,130 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_set_drvdata [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-11-23 15:34:01,130 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_wake_queue [2018-11-23 15:34:01,130 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_wake_queue [2018-11-23 15:34:01,131 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_rings [2018-11-23 15:34:01,131 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_rings [2018-11-23 15:34:01,131 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unregister_driver [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_skb [2018-11-23 15:34:01,132 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_skb [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable_pending [2018-11-23 15:34:01,132 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable_pending [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE2 [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure __alloc_skb [2018-11-23 15:34:01,132 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb [2018-11-23 15:34:01,132 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure b44_readphy [2018-11-23 15:34:01,133 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_readphy [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_rx_mode [2018-11-23 15:34:01,133 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_rx_mode [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure b44_free_consistent [2018-11-23 15:34:01,133 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_free_consistent [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure b44_enable_ints [2018-11-23 15:34:01,133 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_enable_ints [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure request_irq [2018-11-23 15:34:01,133 INFO L138 BoogieDeclarations]: Found implementation of procedure request_irq [2018-11-23 15:34:01,133 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_coherent_mask [2018-11-23 15:34:01,134 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_coherent_mask [2018-11-23 15:34:01,134 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2018-11-23 15:34:01,134 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2018-11-23 15:34:01,134 INFO L130 BoogieDeclarations]: Found specification of procedure b44_start_xmit [2018-11-23 15:34:01,134 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_start_xmit [2018-11-23 15:34:01,134 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2018-11-23 15:34:01,134 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2018-11-23 15:34:01,134 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2018-11-23 15:34:01,134 INFO L130 BoogieDeclarations]: Found specification of procedure dma_sync_single_for_device [2018-11-23 15:34:01,134 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_sync_single_for_device [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure b44_cleanup [2018-11-23 15:34:01,135 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_cleanup [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure disable_irq [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure kmemcheck_mark_initialized [2018-11-23 15:34:01,135 INFO L138 BoogieDeclarations]: Found implementation of procedure kmemcheck_mark_initialized [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_word [2018-11-23 15:34:01,135 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_word [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_update_begin [2018-11-23 15:34:01,135 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_update_begin [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 15:34:01,135 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_mask [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_enable [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure b44_timer [2018-11-23 15:34:01,136 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_timer [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_get_drvdata [2018-11-23 15:34:01,136 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_get_drvdata [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOID [2018-11-23 15:34:01,136 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOID [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 15:34:01,136 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 15:34:01,136 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_rx_mode [2018-11-23 15:34:01,137 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_rx_mode [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_drvinfo [2018-11-23 15:34:01,137 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_drvinfo [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_is_enabled [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2018-11-23 15:34:01,137 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ [2018-11-23 15:34:01,137 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2018-11-23 15:34:01,137 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed_set [2018-11-23 15:34:01,137 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed_set [2018-11-23 15:34:01,138 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2018-11-23 15:34:01,138 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2018-11-23 15:34:01,138 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2018-11-23 15:34:01,139 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-23 15:34:01,139 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_device_disable [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure bwfilter_table [2018-11-23 15:34:01,139 INFO L138 BoogieDeclarations]: Found implementation of procedure bwfilter_table [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2018-11-23 15:34:01,139 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2018-11-23 15:34:01,139 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 15:34:01,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure pci_name [2018-11-23 15:34:01,140 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_name [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_bus_powerup [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure b44_sync_dma_desc_for_device [2018-11-23 15:34:01,140 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_sync_dma_desc_for_device [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_driver_unregister [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_schedule [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2018-11-23 15:34:01,140 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2018-11-23 15:34:01,140 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure br32 [2018-11-23 15:34:01,141 INFO L138 BoogieDeclarations]: Found implementation of procedure br32 [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure b44_poll_controller [2018-11-23 15:34:01,141 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_poll_controller [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_alloc_coherent [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure dma_unmap_single_attrs [2018-11-23 15:34:01,141 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_unmap_single_attrs [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure register_netdev [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure round_jiffies [2018-11-23 15:34:01,141 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2018-11-23 15:34:01,141 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irq [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_dma_translation [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2018-11-23 15:34:01,142 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value_probe [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 15:34:01,142 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure dma_supported [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2018-11-23 15:34:01,143 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_cam_write [2018-11-23 15:34:01,143 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_cam_write [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure arch_irqs_disabled_flags [2018-11-23 15:34:01,143 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_irqs_disabled_flags [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure b44_tx_timeout [2018-11-23 15:34:01,143 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_tx_timeout [2018-11-23 15:34:01,143 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-23 15:34:01,144 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_mapping_error [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure b44_wap54g10_workaround [2018-11-23 15:34:01,144 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_wap54g10_workaround [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irq_7 [2018-11-23 15:34:01,144 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irq_7 [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2018-11-23 15:34:01,144 INFO L130 BoogieDeclarations]: Found specification of procedure is_zero_ether_addr [2018-11-23 15:34:01,144 INFO L138 BoogieDeclarations]: Found implementation of procedure is_zero_ether_addr [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE2 [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_sset_count [2018-11-23 15:34:01,145 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_sset_count [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_attach [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure generic_mii_ioctl [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure b44_nway_reset [2018-11-23 15:34:01,145 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_nway_reset [2018-11-23 15:34:01,145 INFO L130 BoogieDeclarations]: Found specification of procedure b44_alloc_rx_skb [2018-11-23 15:34:01,146 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_alloc_rx_skb [2018-11-23 15:34:01,146 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_strings [2018-11-23 15:34:01,147 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_strings [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2018-11-23 15:34:01,147 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure b44_writephy [2018-11-23 15:34:01,147 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_writephy [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE2 [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure b44_pci_exit [2018-11-23 15:34:01,147 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_pci_exit [2018-11-23 15:34:01,147 INFO L130 BoogieDeclarations]: Found specification of procedure b44_chip_reset [2018-11-23 15:34:01,148 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_chip_reset [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE8 [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_hw [2018-11-23 15:34:01,148 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_hw [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2018-11-23 15:34:01,148 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_detach [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure dma_mapping_error [2018-11-23 15:34:01,148 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_mapping_error [2018-11-23 15:34:01,148 INFO L130 BoogieDeclarations]: Found specification of procedure if_mii [2018-11-23 15:34:01,148 INFO L138 BoogieDeclarations]: Found implementation of procedure if_mii [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure b44_halt [2018-11-23 15:34:01,149 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_halt [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2018-11-23 15:34:01,149 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_etherdev_mqs [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure b44_alloc_consistent [2018-11-23 15:34:01,149 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_alloc_consistent [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2018-11-23 15:34:01,149 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_mac_addr [2018-11-23 15:34:01,149 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_mac_addr [2018-11-23 15:34:01,149 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_set_power_state [2018-11-23 15:34:01,150 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_pcihost_set_power_state [2018-11-23 15:34:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure __ssb_driver_register [2018-11-23 15:34:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2018-11-23 15:34:01,150 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0 [2018-11-23 15:34:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0 [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_handler_precall [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_wol [2018-11-23 15:34:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_wol [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_free_coherent [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure netif_napi_add [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_coherent_gfp_flags [2018-11-23 15:34:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_coherent_gfp_flags [2018-11-23 15:34:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_read32 [2018-11-23 15:34:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_read32 [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure is_device_dma_capable [2018-11-23 15:34:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure is_device_dma_capable [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure __napi_schedule [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_writephy [2018-11-23 15:34:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_writephy [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure b44_pci_init [2018-11-23 15:34:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_pci_init [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2018-11-23 15:34:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_irq_4 [2018-11-23 15:34:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_irq_4 [2018-11-23 15:34:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_5 [2018-11-23 15:34:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_5 [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure skb_copy_from_linear_data [2018-11-23 15:34:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_copy_from_linear_data [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INT [2018-11-23 15:34:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INT [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_wol [2018-11-23 15:34:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_wol [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 15:34:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure dma_free_attrs [2018-11-23 15:34:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_free_attrs [2018-11-23 15:34:01,154 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2018-11-23 15:34:01,155 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2018-11-23 15:34:01,155 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2018-11-23 15:34:01,155 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2018-11-23 15:34:01,155 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_skb_21 [2018-11-23 15:34:01,155 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_skb_21 [2018-11-23 15:34:01,155 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer_sync [2018-11-23 15:34:01,155 INFO L130 BoogieDeclarations]: Found specification of procedure b44_open [2018-11-23 15:34:01,155 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_open [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_word [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure b44_interrupt [2018-11-23 15:34:01,156 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_interrupt [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-23 15:34:01,156 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_wol [2018-11-23 15:34:01,156 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_wol [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2018-11-23 15:34:01,156 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2018-11-23 15:34:01,156 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2018-11-23 15:34:01,156 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_clockspeed [2018-11-23 15:34:01,157 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init_one [2018-11-23 15:34:01,157 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init_one [2018-11-23 15:34:01,157 INFO L130 BoogieDeclarations]: Found specification of procedure b44_magic_pattern [2018-11-23 15:34:01,157 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_magic_pattern [2018-11-23 15:34:01,157 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 15:34:01,157 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_stats64 [2018-11-23 15:34:01,157 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_stats64 [2018-11-23 15:34:01,157 INFO L130 BoogieDeclarations]: Found specification of procedure __netdev_alloc_skb [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_write32 [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_write32 [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_load_mcast [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_load_mcast [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_unregister [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ssb_pcihost_unregister [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_settings [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_settings [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure b44_clear_stats [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_clear_stats [2018-11-23 15:34:01,158 INFO L130 BoogieDeclarations]: Found specification of procedure b44_disable_ints [2018-11-23 15:34:01,158 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_disable_ints [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_settings [2018-11-23 15:34:01,159 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_settings [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure net_ratelimit [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE2 [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure bw32 [2018-11-23 15:34:01,159 INFO L138 BoogieDeclarations]: Found implementation of procedure bw32 [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE8 [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure kobject_name [2018-11-23 15:34:01,159 INFO L138 BoogieDeclarations]: Found implementation of procedure kobject_name [2018-11-23 15:34:01,159 INFO L130 BoogieDeclarations]: Found specification of procedure netif_msg_init [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_msg_init [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irq [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irq [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure napi_enable [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_enable [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_bus_may_powerdown [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_coherent_mask [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_set_coherent_mask [2018-11-23 15:34:01,160 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_msglevel [2018-11-23 15:34:01,160 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_msglevel [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOID [2018-11-23 15:34:01,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOID [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOID [2018-11-23 15:34:01,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOID [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure enable_irq [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_wol_pci [2018-11-23 15:34:01,161 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_wol_pci [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_fetch_retry_bh [2018-11-23 15:34:01,161 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_fetch_retry_bh [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2018-11-23 15:34:01,161 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2018-11-23 15:34:01,161 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcicore_dev_irqvecs_enable [2018-11-23 15:34:01,162 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2018-11-23 15:34:01,162 INFO L130 BoogieDeclarations]: Found specification of procedure dma_map_single_attrs [2018-11-23 15:34:01,163 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_map_single_attrs [2018-11-23 15:34:01,163 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~u16~0~TO~~u32~0 [2018-11-23 15:34:01,163 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~u16~0~TO~~u32~0 [2018-11-23 15:34:01,163 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_disable_ints [2018-11-23 15:34:01,163 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_disable_ints [2018-11-23 15:34:01,163 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_ringparam [2018-11-23 15:34:01,163 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_ringparam [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure is_valid_ether_addr [2018-11-23 15:34:01,164 INFO L138 BoogieDeclarations]: Found implementation of procedure is_valid_ether_addr [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure is_multicast_ether_addr [2018-11-23 15:34:01,164 INFO L138 BoogieDeclarations]: Found implementation of procedure is_multicast_ether_addr [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_ethtool_stats [2018-11-23 15:34:01,164 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_ethtool_stats [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 15:34:01,164 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 15:34:01,164 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_msglevel [2018-11-23 15:34:01,164 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_msglevel [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure b44_get_pauseparam [2018-11-23 15:34:01,165 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_get_pauseparam [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure b44_check_phy [2018-11-23 15:34:01,165 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_check_phy [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_irq [2018-11-23 15:34:01,165 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_irq [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_ringparam [2018-11-23 15:34:01,165 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_ringparam [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_stop_queue [2018-11-23 15:34:01,165 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_stop_queue [2018-11-23 15:34:01,165 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irqrestore_8 [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irqrestore_8 [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure dma_get_cache_alignment [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_get_cache_alignment [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure ssb_pcihost_register [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure mod_timer [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure b44_close [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_close [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_readphy [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_readphy [2018-11-23 15:34:01,166 INFO L130 BoogieDeclarations]: Found specification of procedure b44_phy_reset [2018-11-23 15:34:01,166 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_phy_reset [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv___netdev_alloc_skb_28 [2018-11-23 15:34:01,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv___netdev_alloc_skb_28 [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure init_timer_key [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_1 [2018-11-23 15:34:01,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_1 [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_power_state [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable [2018-11-23 15:34:01,167 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-23 15:34:01,167 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed [2018-11-23 15:34:01,167 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure b44_link_report [2018-11-23 15:34:01,168 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_link_report [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_flow_ctrl [2018-11-23 15:34:01,168 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_flow_ctrl [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure b44_remove_one [2018-11-23 15:34:01,168 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_remove_one [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure __b44_set_mac_addr [2018-11-23 15:34:01,168 INFO L138 BoogieDeclarations]: Found implementation of procedure __b44_set_mac_addr [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure b44_init [2018-11-23 15:34:01,168 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_init [2018-11-23 15:34:01,168 INFO L130 BoogieDeclarations]: Found specification of procedure b44_ioctl [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_ioctl [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure b44_resume [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_resume [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure b44_suspend [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_suspend [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure b44_stats_update [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_stats_update [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure b44_free_rings [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_free_rings [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure u64_stats_fetch_begin_bh [2018-11-23 15:34:01,169 INFO L138 BoogieDeclarations]: Found implementation of procedure u64_stats_fetch_begin_bh [2018-11-23 15:34:01,169 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2018-11-23 15:34:01,170 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2018-11-23 15:34:01,170 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irq [2018-11-23 15:34:01,173 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_attrs [2018-11-23 15:34:01,173 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_attrs [2018-11-23 15:34:01,173 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2018-11-23 15:34:01,173 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2018-11-23 15:34:01,173 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2018-11-23 15:34:01,173 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2018-11-23 15:34:01,173 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_pseudo_magicp [2018-11-23 15:34:01,173 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_pseudo_magicp [2018-11-23 15:34:01,173 INFO L130 BoogieDeclarations]: Found specification of procedure b44_wait_bit [2018-11-23 15:34:01,173 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_wait_bit [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure napi_schedule_prep [2018-11-23 15:34:01,174 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_schedule_prep [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_word [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_clear_bit [2018-11-23 15:34:01,174 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_clear_bit [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_save_flags [2018-11-23 15:34:01,174 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_save_flags [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdev [2018-11-23 15:34:01,174 INFO L130 BoogieDeclarations]: Found specification of procedure b44_change_mtu [2018-11-23 15:34:01,175 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_change_mtu [2018-11-23 15:34:01,175 INFO L130 BoogieDeclarations]: Found specification of procedure netpoll_trap [2018-11-23 15:34:01,175 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 15:34:01,175 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 15:34:01,175 INFO L130 BoogieDeclarations]: Found specification of procedure b44_setup_phy [2018-11-23 15:34:01,175 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_setup_phy [2018-11-23 15:34:01,175 INFO L130 BoogieDeclarations]: Found specification of procedure b44_set_pauseparam [2018-11-23 15:34:01,175 INFO L138 BoogieDeclarations]: Found implementation of procedure b44_set_pauseparam [2018-11-23 15:34:27,783 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 15:34:27,783 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-11-23 15:34:27,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:34:27 BoogieIcfgContainer [2018-11-23 15:34:27,784 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 15:34:27,784 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 15:34:27,784 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 15:34:27,787 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 15:34:27,787 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:33:58" (1/3) ... [2018-11-23 15:34:27,788 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44c36476 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:34:27, skipping insertion in model container [2018-11-23 15:34:27,788 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:34:00" (2/3) ... [2018-11-23 15:34:27,788 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44c36476 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:34:27, skipping insertion in model container [2018-11-23 15:34:27,788 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:34:27" (3/3) ... [2018-11-23 15:34:27,790 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-3.10-rc1-43_1a-bitvector-drivers--net--ethernet--broadcom--b44.ko--ldv_main0_true-unreach-call.cil.out.c [2018-11-23 15:34:27,798 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 15:34:27,805 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 15:34:27,819 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 15:34:27,850 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 15:34:27,851 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 15:34:27,851 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 15:34:27,851 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 15:34:27,851 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 15:34:27,851 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 15:34:27,852 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 15:34:27,852 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 15:34:27,852 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 15:34:27,887 INFO L276 IsEmpty]: Start isEmpty. Operand 1728 states. [2018-11-23 15:34:27,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-23 15:34:27,895 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:34:27,896 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:34:27,897 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:34:27,901 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:34:27,901 INFO L82 PathProgramCache]: Analyzing trace with hash 155171662, now seen corresponding path program 1 times [2018-11-23 15:34:27,910 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 15:34:27,911 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 15:34:27,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:34:29,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:34:29,161 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 15:34:29,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:34:29,213 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 15:34:29,224 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:34:29,224 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 15:34:29,226 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 15:34:29,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 15:34:29,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:34:29,235 INFO L87 Difference]: Start difference. First operand 1728 states. Second operand 3 states. [2018-11-23 15:34:29,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:34:29,412 INFO L93 Difference]: Finished difference Result 4049 states and 5531 transitions. [2018-11-23 15:34:29,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 15:34:29,413 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2018-11-23 15:34:29,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:34:29,436 INFO L225 Difference]: With dead ends: 4049 [2018-11-23 15:34:29,436 INFO L226 Difference]: Without dead ends: 2330 [2018-11-23 15:34:29,445 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 15:34:29,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2330 states. [2018-11-23 15:34:29,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2330 to 2330. [2018-11-23 15:34:29,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2330 states. [2018-11-23 15:34:29,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2330 states to 2330 states and 3143 transitions. [2018-11-23 15:34:29,570 INFO L78 Accepts]: Start accepts. Automaton has 2330 states and 3143 transitions. Word has length 61 [2018-11-23 15:34:29,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:34:29,570 INFO L480 AbstractCegarLoop]: Abstraction has 2330 states and 3143 transitions. [2018-11-23 15:34:29,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 15:34:29,571 INFO L276 IsEmpty]: Start isEmpty. Operand 2330 states and 3143 transitions. [2018-11-23 15:34:29,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-11-23 15:34:29,581 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:34:29,582 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:34:29,582 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:34:29,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:34:29,582 INFO L82 PathProgramCache]: Analyzing trace with hash 270192319, now seen corresponding path program 1 times [2018-11-23 15:34:29,584 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 15:34:29,585 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 15:34:29,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:34:30,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:34:30,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 15:34:30,834 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 15:34:30,835 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 15:34:30,840 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:34:30,840 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:34:30,841 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:34:30,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:34:30,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:34:30,842 INFO L87 Difference]: Start difference. First operand 2330 states and 3143 transitions. Second operand 5 states. [2018-11-23 15:34:30,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:34:30,965 INFO L93 Difference]: Finished difference Result 4630 states and 6253 transitions. [2018-11-23 15:34:30,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:34:30,966 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 134 [2018-11-23 15:34:30,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:34:30,978 INFO L225 Difference]: With dead ends: 4630 [2018-11-23 15:34:30,978 INFO L226 Difference]: Without dead ends: 2330 [2018-11-23 15:34:30,987 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:34:30,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2330 states. [2018-11-23 15:34:31,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2330 to 2330. [2018-11-23 15:34:31,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2330 states. [2018-11-23 15:34:31,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2330 states to 2330 states and 3142 transitions. [2018-11-23 15:34:31,071 INFO L78 Accepts]: Start accepts. Automaton has 2330 states and 3142 transitions. Word has length 134 [2018-11-23 15:34:31,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:34:31,071 INFO L480 AbstractCegarLoop]: Abstraction has 2330 states and 3142 transitions. [2018-11-23 15:34:31,071 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:34:31,071 INFO L276 IsEmpty]: Start isEmpty. Operand 2330 states and 3142 transitions. [2018-11-23 15:34:31,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-23 15:34:31,076 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:34:31,077 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:34:31,077 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:34:31,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:34:31,077 INFO L82 PathProgramCache]: Analyzing trace with hash 556400348, now seen corresponding path program 1 times [2018-11-23 15:34:31,081 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 15:34:31,081 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 15:34:31,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:34:32,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:34:32,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 15:34:32,589 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-23 15:34:32,589 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 15:34:32,595 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:34:32,596 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:34:32,596 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:34:32,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:34:32,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:34:32,596 INFO L87 Difference]: Start difference. First operand 2330 states and 3142 transitions. Second operand 6 states. [2018-11-23 15:34:32,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:34:32,748 INFO L93 Difference]: Finished difference Result 2341 states and 3151 transitions. [2018-11-23 15:34:32,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 15:34:32,749 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 136 [2018-11-23 15:34:32,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:34:32,760 INFO L225 Difference]: With dead ends: 2341 [2018-11-23 15:34:32,760 INFO L226 Difference]: Without dead ends: 2338 [2018-11-23 15:34:32,762 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:34:32,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2338 states. [2018-11-23 15:34:32,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2338 to 2338. [2018-11-23 15:34:32,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2338 states. [2018-11-23 15:34:32,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2338 states to 2338 states and 3148 transitions. [2018-11-23 15:34:32,839 INFO L78 Accepts]: Start accepts. Automaton has 2338 states and 3148 transitions. Word has length 136 [2018-11-23 15:34:32,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:34:32,840 INFO L480 AbstractCegarLoop]: Abstraction has 2338 states and 3148 transitions. [2018-11-23 15:34:32,840 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:34:32,840 INFO L276 IsEmpty]: Start isEmpty. Operand 2338 states and 3148 transitions. [2018-11-23 15:34:32,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-11-23 15:34:32,845 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:34:32,846 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:34:32,846 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:34:32,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:34:32,847 INFO L82 PathProgramCache]: Analyzing trace with hash -409850251, now seen corresponding path program 1 times [2018-11-23 15:34:32,850 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 15:34:32,850 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 15:34:32,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:34:34,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:34:34,227 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 15:34:34,266 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-11-23 15:34:34,266 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 15:34:34,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:34:34,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:34:34,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:34:34,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:34:34,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:34:34,274 INFO L87 Difference]: Start difference. First operand 2338 states and 3148 transitions. Second operand 6 states. [2018-11-23 15:34:34,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:34:34,437 INFO L93 Difference]: Finished difference Result 2342 states and 3151 transitions. [2018-11-23 15:34:34,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 15:34:34,438 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 149 [2018-11-23 15:34:34,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:34:34,439 INFO L225 Difference]: With dead ends: 2342 [2018-11-23 15:34:34,439 INFO L226 Difference]: Without dead ends: 0 [2018-11-23 15:34:34,445 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:34:34,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-11-23 15:34:34,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-11-23 15:34:34,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-11-23 15:34:34,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-11-23 15:34:34,446 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 149 [2018-11-23 15:34:34,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:34:34,447 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-11-23 15:34:34,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:34:34,447 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-23 15:34:34,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 15:34:34,450 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-11-23 15:34:36,998 INFO L448 ceAbstractionStarter]: For program point L5371(line 5371) no Hoare annotation was computed. [2018-11-23 15:34:36,998 INFO L451 ceAbstractionStarter]: At program point L5369(lines 5369 5370) the Hoare annotation is: true [2018-11-23 15:34:36,998 INFO L448 ceAbstractionStarter]: For program point L5371-2(lines 5371 5375) no Hoare annotation was computed. [2018-11-23 15:34:36,998 INFO L448 ceAbstractionStarter]: For program point L5369-1(lines 5369 5370) no Hoare annotation was computed. [2018-11-23 15:34:36,998 INFO L448 ceAbstractionStarter]: For program point get_dma_opsEXIT(lines 5364 5377) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L451 ceAbstractionStarter]: At program point get_dma_opsENTRY(lines 5364 5377) the Hoare annotation is: true [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point get_dma_opsFINAL(lines 5364 5377) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lock_irq_4EXIT(lines 5247 5255) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L451 ceAbstractionStarter]: At program point ldv_spin_lock_irq_4ENTRY(lines 5247 5255) the Hoare annotation is: true [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lock_irq_4FINAL(lines 5247 5255) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L451 ceAbstractionStarter]: At program point ldv_spin_unlock_5ENTRY(lines 5257 5265) the Hoare annotation is: true [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_5EXIT(lines 5257 5265) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_5FINAL(lines 5257 5265) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9051(lines 9051 9055) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L451 ceAbstractionStarter]: At program point b44_get_invariantsENTRY(lines 9010 9058) the Hoare annotation is: true [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9024(lines 9024 9030) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9024-2(lines 9024 9030) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9051-2(lines 9051 9055) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9039-2(lines 9020 9057) no Hoare annotation was computed. [2018-11-23 15:34:36,999 INFO L448 ceAbstractionStarter]: For program point L9039(lines 9039 9043) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L9033(lines 9033 9037) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L9033-2(lines 9033 9037) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point b44_get_invariantsEXIT(lines 9010 9058) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L9038-1(line 9038) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point L9036(line 9036) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L9036-1(line 9036) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point L9034(line 9034) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point L9038(line 9038) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point b44_get_invariantsFINAL(lines 9010 9058) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L9034-1(line 9034) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point skb_copy_from_linear_dataEXIT(lines 5726 5737) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point skb_copy_from_linear_dataENTRY(lines 5726 5737) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point skb_copy_from_linear_dataFINAL(lines 5726 5737) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point L5734(line 5734) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point L5734-1(line 5734) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L448 ceAbstractionStarter]: For program point __b44_set_flow_ctrlEXIT(lines 6714 6741) no Hoare annotation was computed. [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point __b44_set_flow_ctrlENTRY(lines 6714 6741) the Hoare annotation is: true [2018-11-23 15:34:37,000 INFO L451 ceAbstractionStarter]: At program point L6730(line 6730) the Hoare annotation is: true [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point L6731(line 6731) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L451 ceAbstractionStarter]: At program point L6733-2(lines 6733 6737) the Hoare annotation is: true [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point L6733(lines 6733 6737) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point __b44_set_flow_ctrlFINAL(lines 6714 6741) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point L6723-1(line 6723) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L451 ceAbstractionStarter]: At program point L6723(line 6723) the Hoare annotation is: true [2018-11-23 15:34:37,001 INFO L451 ceAbstractionStarter]: At program point L6725-2(lines 6725 6729) the Hoare annotation is: true [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point L6725(lines 6725 6729) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L451 ceAbstractionStarter]: At program point ssb_set_drvdataENTRY(lines 6171 6179) the Hoare annotation is: true [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point ssb_set_drvdataFINAL(lines 6171 6179) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point ssb_set_drvdataEXIT(lines 6171 6179) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INTFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INTEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,001 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INTENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L5939(lines 5939 5943) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point L5938(line 5938) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point netif_tx_wake_queueEXIT(lines 5925 5946) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L5938-1(line 5938) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L5939-2(lines 5925 5946) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point netif_tx_wake_queueENTRY(lines 5925 5946) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point L5933(line 5933) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L5932(lines 5932 5937) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point L7738(line 7738) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L7738-1(line 7738) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point L7730(line 7730) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L7732-2(lines 7732 7736) no Hoare annotation was computed. [2018-11-23 15:34:37,002 INFO L451 ceAbstractionStarter]: At program point b44_init_ringsENTRY(lines 7723 7761) the Hoare annotation is: true [2018-11-23 15:34:37,002 INFO L448 ceAbstractionStarter]: For program point L7732(lines 7732 7736) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7730-1(line 7730) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7753(lines 7753 7757) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7745(line 7745) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7737-2(lines 7737 7741) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7737(lines 7737 7741) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7731-1(line 7731) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L451 ceAbstractionStarter]: At program point L7731(line 7731) the Hoare annotation is: true [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7733-1(line 7733) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L451 ceAbstractionStarter]: At program point L7733(line 7733) the Hoare annotation is: true [2018-11-23 15:34:37,003 INFO L451 ceAbstractionStarter]: At program point L7758(lines 7723 7761) the Hoare annotation is: true [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point b44_init_ringsEXIT(lines 7723 7761) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L448 ceAbstractionStarter]: For program point L7729-1(line 7729) no Hoare annotation was computed. [2018-11-23 15:34:37,003 INFO L451 ceAbstractionStarter]: At program point L7729(line 7729) the Hoare annotation is: true [2018-11-23 15:34:37,003 INFO L451 ceAbstractionStarter]: At program point L7754(lines 7728 7760) the Hoare annotation is: true [2018-11-23 15:34:37,004 INFO L451 ceAbstractionStarter]: At program point L7752(lines 7728 7760) the Hoare annotation is: true [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point L7746(lines 7746 7750) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point L9677(line 9677) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L444 ceAbstractionStarter]: At program point L9676(line 9676) the Hoare annotation is: (or (= (bvadd alloc_skb_~flags (_ bv4294967263 32)) (_ bv0 32)) (not (= (bvadd |alloc_skb_#in~flags| (_ bv4294967263 32)) (_ bv0 32)))) [2018-11-23 15:34:37,004 INFO L444 ceAbstractionStarter]: At program point L9676-1(line 9676) the Hoare annotation is: (or (= (bvadd alloc_skb_~flags (_ bv4294967263 32)) (_ bv0 32)) (not (= (bvadd |alloc_skb_#in~flags| (_ bv4294967263 32)) (_ bv0 32)))) [2018-11-23 15:34:37,004 INFO L451 ceAbstractionStarter]: At program point alloc_skbENTRY(lines 9671 9680) the Hoare annotation is: true [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point alloc_skbFINAL(lines 9671 9680) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point alloc_skbEXIT(lines 9671 9680) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point napi_disable_pendingEXIT(lines 5805 5813) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point L5810-1(line 5810) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L448 ceAbstractionStarter]: For program point napi_disable_pendingFINAL(lines 5805 5813) no Hoare annotation was computed. [2018-11-23 15:34:37,004 INFO L451 ceAbstractionStarter]: At program point napi_disable_pendingENTRY(lines 5805 5813) the Hoare annotation is: true [2018-11-23 15:34:37,005 INFO L451 ceAbstractionStarter]: At program point L5810(line 5810) the Hoare annotation is: true [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L8958-1(line 8958) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L444 ceAbstractionStarter]: At program point b44_set_wolENTRY(lines 8952 8969) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point b44_set_wolEXIT(lines 8952 8969) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L8961(lines 8961 8965) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L444 ceAbstractionStarter]: At program point L8960(line 8960) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L8960-1(line 8960) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L451 ceAbstractionStarter]: At program point L8961-2(lines 8961 8965) the Hoare annotation is: true [2018-11-23 15:34:37,005 INFO L444 ceAbstractionStarter]: At program point L8958(line 8958) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point b44_set_wolFINAL(lines 8952 8969) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L8966(line 8966) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L5630(line 5630) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L5632-2(lines 5607 5641) no Hoare annotation was computed. [2018-11-23 15:34:37,005 INFO L448 ceAbstractionStarter]: For program point L5632(lines 5632 5638) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5624-2(lines 5624 5629) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5624(lines 5624 5629) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5620-1(line 5620) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5618(line 5618) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5620(line 5620) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5618-1(line 5618) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5635(line 5635) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5635-1(line 5635) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5623(line 5623) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5623-1(line 5623) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point L5621(line 5621) the Hoare annotation is: true [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point L5621-1(line 5621) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L448 ceAbstractionStarter]: For program point dma_free_attrsEXIT(lines 5607 5641) no Hoare annotation was computed. [2018-11-23 15:34:37,006 INFO L451 ceAbstractionStarter]: At program point dma_free_attrsENTRY(lines 5607 5641) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point netdev_alloc_skbFINAL(lines 5694 5702) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point netdev_alloc_skbEXIT(lines 5694 5702) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point netdev_alloc_skbENTRY(lines 5694 5702) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point L5699(line 5699) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point L5699-1(line 5699) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point b44_readphyFINAL(lines 6621 6634) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point b44_readphyENTRY(lines 6621 6634) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point L6631-1(line 6631) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point L6631(line 6631) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point L6626(lines 6626 6630) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point b44_readphyEXIT(lines 6621 6634) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point netif_tx_start_queueENTRY(lines 5906 5914) the Hoare annotation is: true [2018-11-23 15:34:37,007 INFO L448 ceAbstractionStarter]: For program point netif_tx_start_queueEXIT(lines 5906 5914) no Hoare annotation was computed. [2018-11-23 15:34:37,007 INFO L451 ceAbstractionStarter]: At program point L5911(line 5911) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point netif_tx_start_queueFINAL(lines 5906 5914) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point ldv_alloc_skb_21EXIT(lines 5666 5674) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point ldv_alloc_skb_21ENTRY(lines 5666 5674) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point ldv_alloc_skb_21FINAL(lines 5666 5674) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point __b44_set_rx_modeFINAL(lines 8472 8522) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point L8500(line 8500) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point L8500-2(lines 8500 8504) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point L8490(line 8490) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point __b44_set_rx_modeENTRY(lines 8472 8522) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point L8515(line 8515) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point L8515-1(line 8515) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point L8488(lines 8488 8519) no Hoare annotation was computed. [2018-11-23 15:34:37,008 INFO L451 ceAbstractionStarter]: At program point L8509(lines 8491 8519) the Hoare annotation is: true [2018-11-23 15:34:37,008 INFO L448 ceAbstractionStarter]: For program point L8507(line 8507) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point __b44_set_rx_modeEXIT(lines 8472 8522) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8511(lines 8491 8519) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8499(line 8499) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8499-1(line 8499) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8503(line 8503) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8503-1(line 8503) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8485(line 8485) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8518-1(lines 8488 8519) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8485-1(line 8485) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8516(line 8516) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8483(line 8483) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L8483-1(line 8483) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L451 ceAbstractionStarter]: At program point L8518(line 8518) the Hoare annotation is: true [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L7771(lines 7771 7783) no Hoare annotation was computed. [2018-11-23 15:34:37,009 INFO L448 ceAbstractionStarter]: For program point L7773-1(line 7773) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L451 ceAbstractionStarter]: At program point L7773(line 7773) the Hoare annotation is: true [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7771-2(lines 7771 7783) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point b44_free_consistentEXIT(lines 7762 7799) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L451 ceAbstractionStarter]: At program point L7786(line 7786) the Hoare annotation is: true [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7784-2(lines 7762 7799) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7784(lines 7784 7796) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7786-1(line 7786) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L451 ceAbstractionStarter]: At program point b44_free_consistentENTRY(lines 7762 7799) the Hoare annotation is: true [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7776-1(lines 7776 7777) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L451 ceAbstractionStarter]: At program point L7776(lines 7776 7777) the Hoare annotation is: true [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7772-2(lines 7772 7778) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7772(lines 7772 7778) no Hoare annotation was computed. [2018-11-23 15:34:37,010 INFO L448 ceAbstractionStarter]: For program point L7789-1(lines 7789 7790) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L7789(lines 7789 7790) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point L7785-2(lines 7785 7791) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point L7785(lines 7785 7791) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point L6592-1(line 6592) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L6592(line 6592) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point b44_enable_intsENTRY(lines 6587 6595) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point b44_enable_intsFINAL(lines 6587 6595) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point b44_enable_intsEXIT(lines 6587 6595) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point L8159-1(line 8159) no Hoare annotation was computed. [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L8159(line 8159) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L8161-1(line 8161) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L8161(line 8161) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L451 ceAbstractionStarter]: At program point L8155(line 8155) the Hoare annotation is: true [2018-11-23 15:34:37,011 INFO L448 ceAbstractionStarter]: For program point L8157-1(lines 8157 8158) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8157(lines 8157 8158) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8153-1(line 8153) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8153(line 8153) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point L8147-1(line 8147) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8147(line 8147) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8174(line 8174) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point L8145-1(line 8145) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8145(line 8145) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8174-1(line 8174) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8162(line 8162) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point L8160(lines 8160 8168) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L451 ceAbstractionStarter]: At program point L8154(line 8154) the Hoare annotation is: true [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point L8156(line 8156) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point b44_openFINAL(lines 8136 8179) no Hoare annotation was computed. [2018-11-23 15:34:37,012 INFO L448 ceAbstractionStarter]: For program point L8148(lines 8148 8152) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L451 ceAbstractionStarter]: At program point L8175(lines 8144 8178) the Hoare annotation is: true [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point b44_openEXIT(lines 8136 8179) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L451 ceAbstractionStarter]: At program point b44_openENTRY(lines 8136 8179) the Hoare annotation is: true [2018-11-23 15:34:37,013 INFO L451 ceAbstractionStarter]: At program point L8163(line 8163) the Hoare annotation is: true [2018-11-23 15:34:37,013 INFO L451 ceAbstractionStarter]: At program point L7482(line 7482) the Hoare annotation is: true [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point L7482-1(line 7482) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point L7476(lines 7476 7481) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point b44_interruptFINAL(lines 7441 7499) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point L7470(lines 7470 7474) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L451 ceAbstractionStarter]: At program point L7470-2(lines 7470 7474) the Hoare annotation is: true [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point L7462(line 7462) no Hoare annotation was computed. [2018-11-23 15:34:37,013 INFO L444 ceAbstractionStarter]: At program point b44_interruptENTRY(lines 7441 7499) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,013 INFO L448 ceAbstractionStarter]: For program point L7464-1(line 7464) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7464(line 7464) the Hoare annotation is: true [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point b44_interruptEXIT(lines 7441 7499) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L444 ceAbstractionStarter]: At program point L7458(line 7458) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7491(line 7491) the Hoare annotation is: true [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7458-1(line 7458) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7483(lines 7483 7489) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7485-1(line 7485) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7485(line 7485) the Hoare annotation is: true [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7475(line 7475) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7467(lines 7467 7495) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7469-1(line 7469) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7469(line 7469) the Hoare annotation is: true [2018-11-23 15:34:37,014 INFO L448 ceAbstractionStarter]: For program point L7496(line 7496) no Hoare annotation was computed. [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7467-2(lines 7467 7495) the Hoare annotation is: true [2018-11-23 15:34:37,014 INFO L451 ceAbstractionStarter]: At program point L7490(lines 7467 7493) the Hoare annotation is: true [2018-11-23 15:34:37,015 INFO L451 ceAbstractionStarter]: At program point L7461-1(line 7461) the Hoare annotation is: true [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L7492(line 7492) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L444 ceAbstractionStarter]: At program point L7461(line 7461) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,015 INFO L451 ceAbstractionStarter]: At program point request_irqENTRY(lines 6158 6167) the Hoare annotation is: true [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point request_irqFINAL(lines 6158 6167) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point request_irqEXIT(lines 6158 6167) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point dma_alloc_coherent_maskFINAL(lines 5534 5548) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point dma_alloc_coherent_maskEXIT(lines 5534 5548) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L451 ceAbstractionStarter]: At program point dma_alloc_coherent_maskENTRY(lines 5534 5548) the Hoare annotation is: true [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L5542(line 5542) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L5541-2(lines 5541 5545) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L5541(lines 5541 5545) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L5542-2(line 5542) no Hoare annotation was computed. [2018-11-23 15:34:37,015 INFO L448 ceAbstractionStarter]: For program point L5952-1(line 5952) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L451 ceAbstractionStarter]: At program point L5953(line 5953) the Hoare annotation is: true [2018-11-23 15:34:37,016 INFO L451 ceAbstractionStarter]: At program point L5952(line 5952) the Hoare annotation is: true [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point netif_wake_queueEXIT(lines 5947 5956) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L451 ceAbstractionStarter]: At program point netif_wake_queueENTRY(lines 5947 5956) the Hoare annotation is: true [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point netif_wake_queueFINAL(lines 5947 5956) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L451 ceAbstractionStarter]: At program point #Ultimate.C_memcpyENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,016 INFO L451 ceAbstractionStarter]: At program point L-1-1(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point #Ultimate.C_memcpyEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point #Ultimate.C_memcpyFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L444 ceAbstractionStarter]: At program point L7542(line 7542) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point L7542-1(line 7542) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point L7584-1(line 7584) no Hoare annotation was computed. [2018-11-23 15:34:37,016 INFO L448 ceAbstractionStarter]: For program point L7617-2(lines 7617 7621) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L451 ceAbstractionStarter]: At program point L7584(line 7584) the Hoare annotation is: true [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7617(lines 7617 7621) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7543(line 7543) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7543-3(lines 7543 7544) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L451 ceAbstractionStarter]: At program point L7543-2(line 7543) the Hoare annotation is: true [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7568-1(lines 7568 7569) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L451 ceAbstractionStarter]: At program point L7568(lines 7568 7569) the Hoare annotation is: true [2018-11-23 15:34:37,017 INFO L451 ceAbstractionStarter]: At program point L7618(line 7618) the Hoare annotation is: true [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7552-1(lines 7552 7553) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L444 ceAbstractionStarter]: At program point b44_start_xmitENTRY(lines 7519 7634) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,017 INFO L451 ceAbstractionStarter]: At program point L7552(lines 7552 7553) the Hoare annotation is: true [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7618-1(line 7618) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7602(lines 7602 7607) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7602-2(lines 7602 7607) no Hoare annotation was computed. [2018-11-23 15:34:37,017 INFO L448 ceAbstractionStarter]: For program point L7611-1(line 7611) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7611(line 7611) the Hoare annotation is: true [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7545(lines 7545 7551) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7570(line 7570) the Hoare annotation is: true [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7603-1(lines 7603 7604) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7603(lines 7603 7604) the Hoare annotation is: true [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7570-1(line 7570) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7562(line 7562) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7595(lines 7595 7599) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7628(line 7628) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7595-2(lines 7595 7599) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7554(line 7554) the Hoare annotation is: true [2018-11-23 15:34:37,018 INFO L448 ceAbstractionStarter]: For program point L7554-1(line 7554) no Hoare annotation was computed. [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7546(line 7546) the Hoare annotation is: true [2018-11-23 15:34:37,018 INFO L451 ceAbstractionStarter]: At program point L7579(lines 7537 7633) the Hoare annotation is: true [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7612-1(lines 7612 7616) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7612(lines 7612 7616) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7546-1(line 7546) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L444 ceAbstractionStarter]: At program point L7538(line 7538) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7571(lines 7571 7582) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7538-1(line 7538) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7563(lines 7563 7567) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7555(lines 7555 7589) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7555-2(lines 7555 7589) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L451 ceAbstractionStarter]: At program point L7613(line 7613) the Hoare annotation is: true [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7572-1(line 7572) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L451 ceAbstractionStarter]: At program point L7572(line 7572) the Hoare annotation is: true [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point b44_start_xmitEXIT(lines 7519 7634) no Hoare annotation was computed. [2018-11-23 15:34:37,019 INFO L448 ceAbstractionStarter]: For program point L7622(line 7622) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point b44_start_xmitFINAL(lines 7519 7634) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7556-1(line 7556) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7556(line 7556) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7622-2(lines 7622 7626) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7573-2(lines 7573 7577) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7573(lines 7573 7577) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7623(line 7623) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7557-2(lines 7557 7561) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7557(lines 7557 7561) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7574(line 7574) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7574-1(line 7574) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7632(lines 7537 7633) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L451 ceAbstractionStarter]: At program point L7558(line 7558) the Hoare annotation is: true [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point L7558-1(line 7558) no Hoare annotation was computed. [2018-11-23 15:34:37,020 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lockEXIT(lines 9816 9824) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L444 ceAbstractionStarter]: At program point ldv_spin_lockENTRY(lines 9816 9824) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lockFINAL(lines 9816 9824) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5504-1(line 5504) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point L5504(line 5504) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5500-2(lines 5500 5507) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5500(lines 5500 5507) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point L5495(lines 5492 5497) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point L5491(line 5491) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point L5490(line 5490) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5491-1(line 5491) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5492(lines 5492 5499) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point dma_sync_single_for_deviceENTRY(lines 5479 5511) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5488-1(line 5488) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point L5490-1(line 5490) no Hoare annotation was computed. [2018-11-23 15:34:37,021 INFO L451 ceAbstractionStarter]: At program point L5488(line 5488) the Hoare annotation is: true [2018-11-23 15:34:37,021 INFO L448 ceAbstractionStarter]: For program point dma_sync_single_for_deviceEXIT(lines 5479 5511) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point dma_sync_single_for_deviceFINAL(lines 5479 5511) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point L8943-2(lines 8943 8947) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point L8940(line 8940) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point L8940-1(line 8940) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point L8943(lines 8943 8947) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point b44_get_wolEXIT(lines 8934 8951) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point L8948(line 8948) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point b44_get_wolENTRY(lines 8934 8951) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point b44_get_wolFINAL(lines 8934 8951) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point constant_test_bitENTRY(lines 5167 5174) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point constant_test_bitFINAL(lines 5167 5174) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point constant_test_bitEXIT(lines 5167 5174) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point b44_cleanupEXIT(lines 9340 9349) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point L9346(line 9346) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point b44_cleanupENTRY(lines 9340 9349) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point b44_cleanupFINAL(lines 9340 9349) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point ldv_check_alloc_flagsEXIT(lines 9775 9787) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L451 ceAbstractionStarter]: At program point ldv_check_alloc_flagsENTRY(lines 9775 9787) the Hoare annotation is: true [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point L9780(lines 9780 9784) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L444 ceAbstractionStarter]: At program point L9783(line 9783) the Hoare annotation is: (and (not (= (bvadd |ldv_check_alloc_flags_#in~flags| (_ bv4294967263 32)) (_ bv0 32))) (not (= ~ldv_spin~0 (_ bv0 32))) (not (= (bvadd |ldv_check_alloc_flags_#in~flags| (_ bv4294967264 32)) (_ bv0 32)))) [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point L9783-1(lines 9775 9787) no Hoare annotation was computed. [2018-11-23 15:34:37,022 INFO L448 ceAbstractionStarter]: For program point kmemcheck_mark_initializedFINAL(lines 5326 5333) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point kmemcheck_mark_initializedENTRY(lines 5326 5333) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point kmemcheck_mark_initializedEXIT(lines 5326 5333) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9152(line 9152) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9152-1(line 9152) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point L9086(lines 9086 9091) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point L9078-2(lines 9078 9084) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point L9078(lines 9078 9084) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9165(lines 9076 9169) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9099(line 9099) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point L9099-1(line 9099) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point b44_init_oneENTRY(lines 9064 9170) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9153(line 9153) the Hoare annotation is: true [2018-11-23 15:34:37,023 INFO L448 ceAbstractionStarter]: For program point L9145(lines 9145 9150) no Hoare annotation was computed. [2018-11-23 15:34:37,023 INFO L451 ceAbstractionStarter]: At program point L9100(line 9100) the Hoare annotation is: true [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point b44_init_oneFINAL(lines 9064 9170) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9100-1(line 9100) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9154(line 9154) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L451 ceAbstractionStarter]: At program point L9129(line 9129) the Hoare annotation is: true [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9129-1(line 9129) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9117(lines 9117 9128) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L451 ceAbstractionStarter]: At program point L9121(line 9121) the Hoare annotation is: true [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9121-1(line 9121) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9130(lines 9130 9135) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L451 ceAbstractionStarter]: At program point L9167(lines 9076 9169) the Hoare annotation is: true [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9155(lines 9155 9159) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9122(lines 9122 9127) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point b44_init_oneEXIT(lines 9064 9170) no Hoare annotation was computed. [2018-11-23 15:34:37,024 INFO L451 ceAbstractionStarter]: At program point L9147(lines 9076 9169) the Hoare annotation is: true [2018-11-23 15:34:37,024 INFO L448 ceAbstractionStarter]: For program point L9155-2(lines 9155 9159) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point L9110(lines 9110 9115) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point L9094-1(line 9094) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L9094(line 9094) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point pci_read_config_wordFINAL(lines 6124 6133) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point pci_read_config_wordENTRY(lines 6124 6133) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point pci_read_config_wordEXIT(lines 6124 6133) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L8238(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point b44_magic_patternENTRY(lines 8214 8279) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L8234(line 8234) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L8236(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L8263(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point b44_magic_patternFINAL(lines 8214 8279) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L448 ceAbstractionStarter]: For program point L8234-1(line 8234) no Hoare annotation was computed. [2018-11-23 15:34:37,025 INFO L451 ceAbstractionStarter]: At program point L8265(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point L8228-1(line 8228) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point L8228(line 8228) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point L8261-1(line 8261) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point L8261(line 8261) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point b44_magic_patternEXIT(lines 8214 8279) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point L8245-1(lines 8224 8278) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point L8276(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point L8270(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point L8272(lines 8224 8278) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point u64_stats_update_beginEXIT(lines 5779 5786) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point u64_stats_update_beginFINAL(lines 5779 5786) no Hoare annotation was computed. [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point u64_stats_update_beginENTRY(lines 5779 5786) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L451 ceAbstractionStarter]: At program point b44_get_stats64ENTRY(lines 8394 8431) the Hoare annotation is: true [2018-11-23 15:34:37,026 INFO L448 ceAbstractionStarter]: For program point b44_get_stats64EXIT(lines 8394 8431) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L8407(line 8407) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point b44_get_stats64FINAL(lines 8394 8431) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L8403-1(line 8403) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L451 ceAbstractionStarter]: At program point L8403(line 8403) the Hoare annotation is: true [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L8423(lines 8423 8427) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L451 ceAbstractionStarter]: At program point L8424(lines 8402 8430) the Hoare annotation is: true [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L8421-1(lines 8421 8422) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L451 ceAbstractionStarter]: At program point L8421(lines 8421 8422) the Hoare annotation is: true [2018-11-23 15:34:37,027 INFO L451 ceAbstractionStarter]: At program point L6209(line 6209) the Hoare annotation is: true [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L6209-1(line 6209) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point ssb_write32EXIT(lines 6204 6212) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L451 ceAbstractionStarter]: At program point ssb_write32ENTRY(lines 6204 6212) the Hoare annotation is: true [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point ssb_write32FINAL(lines 6204 6212) no Hoare annotation was computed. [2018-11-23 15:34:37,027 INFO L448 ceAbstractionStarter]: For program point L8446-2(line 8446) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point __b44_load_mcastFINAL(lines 8432 8471) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point L8446(line 8446) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point __b44_load_mcastEXIT(lines 8432 8471) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point L8468(lines 8443 8470) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point L8459(line 8459) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point L8459-1(line 8459) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point L8464(lines 8443 8470) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point L8462(lines 8443 8470) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point __b44_load_mcastENTRY(lines 8432 8471) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point L7082(line 7082) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L444 ceAbstractionStarter]: At program point b44_timerENTRY(lines 7072 7087) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,028 INFO L448 ceAbstractionStarter]: For program point b44_timerFINAL(lines 7072 7087) no Hoare annotation was computed. [2018-11-23 15:34:37,028 INFO L451 ceAbstractionStarter]: At program point L7079-1(line 7079) the Hoare annotation is: true [2018-11-23 15:34:37,028 INFO L444 ceAbstractionStarter]: At program point L7079(line 7079) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point b44_timerEXIT(lines 7072 7087) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L451 ceAbstractionStarter]: At program point L7080(line 7080) the Hoare annotation is: true [2018-11-23 15:34:37,029 INFO L451 ceAbstractionStarter]: At program point L7081(line 7081) the Hoare annotation is: true [2018-11-23 15:34:37,029 INFO L451 ceAbstractionStarter]: At program point ssb_get_drvdataENTRY(lines 6180 6187) the Hoare annotation is: true [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point ssb_get_drvdataEXIT(lines 6180 6187) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point ssb_get_drvdataFINAL(lines 6180 6187) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L451 ceAbstractionStarter]: At program point ssb_pcihost_unregisterENTRY(lines 6215 6223) the Hoare annotation is: true [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point ssb_pcihost_unregisterFINAL(lines 6215 6223) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point ssb_pcihost_unregisterEXIT(lines 6215 6223) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point L8669(line 8669) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point b44_get_settingsFINAL(lines 8624 8685) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L451 ceAbstractionStarter]: At program point L8632(line 8632) the Hoare annotation is: true [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point L8632-1(line 8632) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point L8637(lines 8637 8641) no Hoare annotation was computed. [2018-11-23 15:34:37,029 INFO L448 ceAbstractionStarter]: For program point L8670-2(lines 8631 8684) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8637-2(lines 8637 8641) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8670(lines 8670 8674) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8658(line 8658) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L451 ceAbstractionStarter]: At program point L8658-2(line 8658) the Hoare annotation is: true [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8658-3(line 8658) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8642(lines 8642 8646) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8675-1(lines 8675 8680) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8642-2(lines 8642 8646) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8647-2(lines 8647 8651) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L451 ceAbstractionStarter]: At program point L8676(line 8676) the Hoare annotation is: true [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8676-1(line 8676) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8647(lines 8647 8651) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L448 ceAbstractionStarter]: For program point L8664(lines 8664 8668) no Hoare annotation was computed. [2018-11-23 15:34:37,030 INFO L451 ceAbstractionStarter]: At program point L8664-2(lines 8664 8668) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point L8652(lines 8652 8656) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point L8652-2(lines 8652 8656) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point b44_get_settingsENTRY(lines 8624 8685) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point b44_get_settingsEXIT(lines 8624 8685) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point b44_clear_statsEXIT(lines 7892 7923) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point L7903(lines 7896 7922) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point L7905(lines 7896 7922) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point L7901(line 7901) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point L7897-1(line 7897) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point L7897(line 7897) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point b44_clear_statsFINAL(lines 7892 7923) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point L7914(lines 7896 7922) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point L7916(lines 7896 7922) the Hoare annotation is: true [2018-11-23 15:34:37,031 INFO L448 ceAbstractionStarter]: For program point L7912(line 7912) no Hoare annotation was computed. [2018-11-23 15:34:37,031 INFO L451 ceAbstractionStarter]: At program point b44_clear_statsENTRY(lines 7892 7923) the Hoare annotation is: true [2018-11-23 15:34:37,032 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOIDENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOIDEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOIDFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point ldv_errorFINAL(lines 9757 9764) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L451 ceAbstractionStarter]: At program point ldv_errorENTRY(lines 9757 9764) the Hoare annotation is: true [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION(line 9762) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point ldv_errorEXIT(lines 9757 9764) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point b44_disable_intsFINAL(lines 6577 6586) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point b44_disable_intsEXIT(lines 6577 6586) no Hoare annotation was computed. [2018-11-23 15:34:37,032 INFO L451 ceAbstractionStarter]: At program point L6582(line 6582) the Hoare annotation is: true [2018-11-23 15:34:37,032 INFO L451 ceAbstractionStarter]: At program point b44_disable_intsENTRY(lines 6577 6586) the Hoare annotation is: true [2018-11-23 15:34:37,032 INFO L448 ceAbstractionStarter]: For program point L6583(line 6583) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L451 ceAbstractionStarter]: At program point L6582-1(line 6582) the Hoare annotation is: true [2018-11-23 15:34:37,033 INFO L444 ceAbstractionStarter]: At program point L8529(line 8529) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8529-1(line 8529) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point b44_set_rx_modeEXIT(lines 8523 8536) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L451 ceAbstractionStarter]: At program point L8532(line 8532) the Hoare annotation is: true [2018-11-23 15:34:37,033 INFO L444 ceAbstractionStarter]: At program point L8531(line 8531) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,033 INFO L451 ceAbstractionStarter]: At program point L8531-1(line 8531) the Hoare annotation is: true [2018-11-23 15:34:37,033 INFO L444 ceAbstractionStarter]: At program point b44_set_rx_modeENTRY(lines 8523 8536) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point b44_set_rx_modeFINAL(lines 8523 8536) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8706-5(lines 8706 8710) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8706-2(line 8706) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8706-4(line 8706) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8727-2(lines 8727 8731) no Hoare annotation was computed. [2018-11-23 15:34:37,033 INFO L448 ceAbstractionStarter]: For program point L8727(lines 8727 8731) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8752(line 8752) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8711(line 8711) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8732(lines 8732 8736) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8699(lines 8699 8710) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L444 ceAbstractionStarter]: At program point L8699-2(lines 8699 8710) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,034 INFO L444 ceAbstractionStarter]: At program point L8695(line 8695) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8695-1(line 8695) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point b44_set_settingsEXIT(lines 8686 8761) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8753(lines 8753 8757) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L451 ceAbstractionStarter]: At program point L8753-2(lines 8753 8757) the Hoare annotation is: true [2018-11-23 15:34:37,034 INFO L444 ceAbstractionStarter]: At program point b44_set_settingsENTRY(lines 8686 8761) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point b44_set_settingsFINAL(lines 8686 8761) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8741(lines 8741 8745) no Hoare annotation was computed. [2018-11-23 15:34:37,034 INFO L448 ceAbstractionStarter]: For program point L8741-2(lines 8741 8745) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8712(lines 8712 8751) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8700(lines 8700 8704) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L451 ceAbstractionStarter]: At program point L8754(line 8754) the Hoare annotation is: true [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8758(line 8758) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8717(lines 8717 8721) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8717-2(lines 8717 8721) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8746(lines 8746 8750) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8754-1(line 8754) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L451 ceAbstractionStarter]: At program point L8746-2(lines 8712 8751) the Hoare annotation is: true [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8722(lines 8722 8726) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L444 ceAbstractionStarter]: At program point L8697(line 8697) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8697-1(line 8697) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8714(lines 8714 8737) no Hoare annotation was computed. [2018-11-23 15:34:37,035 INFO L448 ceAbstractionStarter]: For program point L8722-2(lines 8722 8726) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8706(line 8706) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L451 ceAbstractionStarter]: At program point bw32ENTRY(lines 6494 6502) the Hoare annotation is: true [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point bw32EXIT(lines 6494 6502) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point bw32FINAL(lines 6494 6502) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L6499-1(line 6499) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L451 ceAbstractionStarter]: At program point L6499(line 6499) the Hoare annotation is: true [2018-11-23 15:34:37,036 INFO L451 ceAbstractionStarter]: At program point L8570(line 8570) the Hoare annotation is: true [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8576(line 8576) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8570-1(line 8570) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8587(lines 8587 8592) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8593(line 8593) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8583-2(line 8583) no Hoare annotation was computed. [2018-11-23 15:34:37,036 INFO L451 ceAbstractionStarter]: At program point L8587-2(lines 8587 8592) the Hoare annotation is: true [2018-11-23 15:34:37,036 INFO L448 ceAbstractionStarter]: For program point L8583(line 8583) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point L8577(line 8577) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L8577-1(line 8577) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L8575(lines 8575 8595) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point b44_get_drvinfoEXIT(lines 8560 8599) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point L8596(lines 8560 8599) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point L8586(line 8586) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L8580(line 8580) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point b44_get_drvinfoENTRY(lines 8560 8599) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L8586-1(line 8586) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L8584(line 8584) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point netif_carrier_okENTRY(lines 6024 6032) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point netif_carrier_okFINAL(lines 6024 6032) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L451 ceAbstractionStarter]: At program point L6029(line 6029) the Hoare annotation is: true [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point L6029-1(line 6029) no Hoare annotation was computed. [2018-11-23 15:34:37,037 INFO L448 ceAbstractionStarter]: For program point netif_carrier_okEXIT(lines 6024 6032) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$EXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$FINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point kobject_nameEXIT(lines 5296 5303) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L451 ceAbstractionStarter]: At program point kobject_nameENTRY(lines 5296 5303) the Hoare annotation is: true [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point kobject_nameFINAL(lines 5296 5303) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point L6047(lines 6047 6051) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point netif_msg_initFINAL(lines 6037 6054) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point netif_msg_initEXIT(lines 6037 6054) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point L6042(lines 6042 6046) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L451 ceAbstractionStarter]: At program point netif_msg_initENTRY(lines 6037 6054) the Hoare annotation is: true [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point ethtool_cmd_speed_setFINAL(lines 5760 5769) no Hoare annotation was computed. [2018-11-23 15:34:37,038 INFO L451 ceAbstractionStarter]: At program point ethtool_cmd_speed_setENTRY(lines 5760 5769) the Hoare annotation is: true [2018-11-23 15:34:37,038 INFO L448 ceAbstractionStarter]: For program point ethtool_cmd_speed_setEXIT(lines 5760 5769) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point valid_dma_directionEXIT(lines 5335 5342) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L451 ceAbstractionStarter]: At program point valid_dma_directionENTRY(lines 5335 5342) the Hoare annotation is: true [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point valid_dma_directionFINAL(lines 5335 5342) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L451 ceAbstractionStarter]: At program point clear_bitENTRY(lines 5138 5146) the Hoare annotation is: true [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point clear_bitFINAL(lines 5138 5146) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point clear_bitEXIT(lines 5138 5146) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L451 ceAbstractionStarter]: At program point spin_unlock_irqENTRY(lines 9622 9631) the Hoare annotation is: true [2018-11-23 15:34:37,039 INFO L451 ceAbstractionStarter]: At program point L9627(line 9627) the Hoare annotation is: true [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point spin_unlock_irqEXIT(lines 9622 9631) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L444 ceAbstractionStarter]: At program point L9627-1(line 9627) the Hoare annotation is: (= ~ldv_spin~0 (_ bv0 32)) [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point spin_unlock_irqFINAL(lines 9622 9631) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L448 ceAbstractionStarter]: For program point napi_enableEXIT(lines 5862 5882) no Hoare annotation was computed. [2018-11-23 15:34:37,039 INFO L451 ceAbstractionStarter]: At program point L5879(line 5879) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point napi_enableFINAL(lines 5862 5882) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point L5870(lines 5870 5877) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point L5873(lines 5870 5875) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point L5868-1(line 5868) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point L5869(line 5869) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point L5868(line 5868) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point L5869-1(line 5869) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point napi_enableENTRY(lines 5862 5882) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point ldv__builtin_expectFINAL(lines 9766 9773) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point ldv__builtin_expectENTRY(lines 9766 9773) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point ldv__builtin_expectEXIT(lines 9766 9773) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L448 ceAbstractionStarter]: For program point #Ultimate.C_memsetEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point L-1-1(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,040 INFO L451 ceAbstractionStarter]: At program point #Ultimate.C_memsetENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point #Ultimate.C_memsetFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point L5648(lines 5648 5652) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point dma_set_coherent_maskEXIT(lines 5642 5656) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L451 ceAbstractionStarter]: At program point dma_set_coherent_maskENTRY(lines 5642 5656) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point dma_set_coherent_maskFINAL(lines 5642 5656) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L451 ceAbstractionStarter]: At program point L8554(line 8554) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point b44_set_msglevelEXIT(lines 8548 8559) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L451 ceAbstractionStarter]: At program point b44_set_msglevelENTRY(lines 8548 8559) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point L8554-1(line 8554) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point b44_set_msglevelFINAL(lines 8548 8559) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOIDENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOIDEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOIDFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,041 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOIDENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,041 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOIDEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOIDFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point bwfilter_tableFINAL(lines 8191 8213) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point L8206(lines 8196 8212) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point L8202(line 8202) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point L8204(lines 8196 8212) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point bwfilter_tableEXIT(lines 8191 8213) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point L8201(line 8201) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point L8202-1(line 8202) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point bwfilter_tableENTRY(lines 8191 8213) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point netif_stop_queueEXIT(lines 5982 5991) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point L5987(line 5987) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point netif_stop_queueFINAL(lines 5982 5991) no Hoare annotation was computed. [2018-11-23 15:34:37,042 INFO L451 ceAbstractionStarter]: At program point netif_stop_queueENTRY(lines 5982 5991) the Hoare annotation is: true [2018-11-23 15:34:37,042 INFO L448 ceAbstractionStarter]: For program point L5987-1(line 5987) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point L5988(line 5988) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point pci_nameENTRY(lines 6146 6154) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point pci_nameEXIT(lines 6146 6154) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point L6151(line 6151) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point L6151-1(line 6151) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point pci_nameFINAL(lines 6146 6154) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point L8334(lines 8334 8335) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point L8336-1(lines 8336 8337) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L451 ceAbstractionStarter]: At program point L8336(lines 8336 8337) the Hoare annotation is: true [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point b44_setup_wol_pciEXIT(lines 8325 8343) no Hoare annotation was computed. [2018-11-23 15:34:37,043 INFO L448 ceAbstractionStarter]: For program point L8331(lines 8331 8340) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point L8332-1(line 8332) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L451 ceAbstractionStarter]: At program point L8332(line 8332) the Hoare annotation is: true [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point L8333-1(line 8333) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L451 ceAbstractionStarter]: At program point b44_setup_wol_pciENTRY(lines 8325 8343) the Hoare annotation is: true [2018-11-23 15:34:37,044 INFO L451 ceAbstractionStarter]: At program point L8333(line 8333) the Hoare annotation is: true [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point L8334-1(lines 8334 8335) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point b44_setup_wol_pciFINAL(lines 8325 8343) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point L8331-2(lines 8331 8340) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point u64_stats_fetch_retry_bhEXIT(lines 5795 5803) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L451 ceAbstractionStarter]: At program point u64_stats_fetch_retry_bhENTRY(lines 5795 5803) the Hoare annotation is: true [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point u64_stats_fetch_retry_bhFINAL(lines 5795 5803) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point test_and_set_bitEXIT(lines 5147 5156) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point test_and_set_bitFINAL(lines 5147 5156) no Hoare annotation was computed. [2018-11-23 15:34:37,044 INFO L451 ceAbstractionStarter]: At program point test_and_set_bitENTRY(lines 5147 5156) the Hoare annotation is: true [2018-11-23 15:34:37,044 INFO L448 ceAbstractionStarter]: For program point b44_sync_dma_desc_for_deviceEXIT(lines 6463 6473) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point b44_sync_dma_desc_for_deviceENTRY(lines 6463 6473) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point b44_sync_dma_desc_for_deviceFINAL(lines 6463 6473) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point L6469-1(lines 6469 6470) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L6469(lines 6469 6470) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point spinlock_checkENTRY(lines 5229 5236) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point spinlock_checkEXIT(lines 5229 5236) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point spinlock_checkFINAL(lines 5229 5236) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point dma_map_single_attrsENTRY(lines 5378 5411) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point L5404-1(lines 5404 5405) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point dma_map_single_attrsEXIT(lines 5378 5411) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L5404(lines 5404 5405) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point dma_map_single_attrsFINAL(lines 5378 5411) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L5398(lines 5395 5400) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point L5395(lines 5395 5402) no Hoare annotation was computed. [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L5394(line 5394) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L5392-1(line 5392) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L451 ceAbstractionStarter]: At program point L5390(line 5390) the Hoare annotation is: true [2018-11-23 15:34:37,045 INFO L448 ceAbstractionStarter]: For program point L5393(line 5393) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point L5394-1(line 5394) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point L5392(line 5392) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point L5390-1(line 5390) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~u16~0~TO~~u32~0FINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~~u16~0~TO~~u32~0EXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~~u16~0~TO~~u32~0ENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point __b44_disable_intsENTRY(lines 6568 6576) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point __b44_disable_intsFINAL(lines 6568 6576) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point L6573(line 6573) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point __b44_disable_intsEXIT(lines 6568 6576) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point L6490(line 6490) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point br32EXIT(lines 6485 6493) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point L6490-1(line 6490) no Hoare annotation was computed. [2018-11-23 15:34:37,046 INFO L451 ceAbstractionStarter]: At program point br32ENTRY(lines 6485 6493) the Hoare annotation is: true [2018-11-23 15:34:37,046 INFO L448 ceAbstractionStarter]: For program point br32FINAL(lines 6485 6493) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point b44_get_ringparamFINAL(lines 8762 8774) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L451 ceAbstractionStarter]: At program point L8768(line 8768) the Hoare annotation is: true [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L8768-1(line 8768) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L451 ceAbstractionStarter]: At program point b44_get_ringparamENTRY(lines 8762 8774) the Hoare annotation is: true [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point b44_get_ringparamEXIT(lines 8762 8774) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L451 ceAbstractionStarter]: At program point L6105(line 6105) the Hoare annotation is: true [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6105-1(line 6105) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6099(lines 6099 6103) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point is_valid_ether_addrEXIT(lines 6089 6121) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6099-2(lines 6097 6120) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6106(lines 6106 6110) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6106-2(lines 6104 6116) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L448 ceAbstractionStarter]: For program point L6104(lines 6104 6118) no Hoare annotation was computed. [2018-11-23 15:34:37,047 INFO L451 ceAbstractionStarter]: At program point L6098(line 6098) the Hoare annotation is: true [2018-11-23 15:34:37,047 INFO L451 ceAbstractionStarter]: At program point is_valid_ether_addrENTRY(lines 6089 6121) the Hoare annotation is: true [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point L6098-1(line 6098) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point is_valid_ether_addrFINAL(lines 6089 6121) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point is_multicast_ether_addrEXIT(lines 6081 6088) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L451 ceAbstractionStarter]: At program point is_multicast_ether_addrENTRY(lines 6081 6088) the Hoare annotation is: true [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point is_multicast_ether_addrFINAL(lines 6081 6088) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point b44_poll_controllerEXIT(lines 8180 8190) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L444 ceAbstractionStarter]: At program point L8186(line 8186) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,048 INFO L444 ceAbstractionStarter]: At program point b44_poll_controllerENTRY(lines 8180 8190) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point b44_poll_controllerFINAL(lines 8180 8190) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point L8186-1(line 8186) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L451 ceAbstractionStarter]: At program point L5438(line 5438) the Hoare annotation is: true [2018-11-23 15:34:37,048 INFO L451 ceAbstractionStarter]: At program point dma_unmap_single_attrsENTRY(lines 5412 5445) the Hoare annotation is: true [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point L5434(lines 5434 5441) no Hoare annotation was computed. [2018-11-23 15:34:37,048 INFO L448 ceAbstractionStarter]: For program point L5438-1(line 5438) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point dma_unmap_single_attrsEXIT(lines 5412 5445) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L5434-2(lines 5434 5441) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L5426(lines 5426 5433) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L451 ceAbstractionStarter]: At program point L5429(lines 5426 5431) the Hoare annotation is: true [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L5424-1(line 5424) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L451 ceAbstractionStarter]: At program point L5422(line 5422) the Hoare annotation is: true [2018-11-23 15:34:37,049 INFO L451 ceAbstractionStarter]: At program point L5425(line 5425) the Hoare annotation is: true [2018-11-23 15:34:37,049 INFO L451 ceAbstractionStarter]: At program point L5424(line 5424) the Hoare annotation is: true [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L5425-1(line 5425) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L5422-1(line 5422) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point dma_unmap_single_attrsFINAL(lines 5412 5445) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L8925(lines 8925 8929) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L444 ceAbstractionStarter]: At program point L8923(lines 8923 8924) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L8923-1(lines 8923 8924) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L448 ceAbstractionStarter]: For program point L8898-1(line 8898) no Hoare annotation was computed. [2018-11-23 15:34:37,049 INFO L444 ceAbstractionStarter]: At program point L8917(lines 8897 8932) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L8919(lines 8897 8932) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L448 ceAbstractionStarter]: For program point b44_get_ethtool_statsEXIT(lines 8883 8933) no Hoare annotation was computed. [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L8907(line 8907) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L448 ceAbstractionStarter]: For program point L8907-1(line 8907) no Hoare annotation was computed. [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L8901(line 8901) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L451 ceAbstractionStarter]: At program point L8901-1(line 8901) the Hoare annotation is: true [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point b44_get_ethtool_statsENTRY(lines 8883 8933) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L8926(lines 8897 8932) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L448 ceAbstractionStarter]: For program point b44_get_ethtool_statsFINAL(lines 8883 8933) no Hoare annotation was computed. [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L8898(line 8898) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L451 ceAbstractionStarter]: At program point L8902(line 8902) the Hoare annotation is: true [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L9565(line 9565) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,050 INFO L444 ceAbstractionStarter]: At program point L9532(line 9532) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9565-1(line 9565) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9532-1(line 9532) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9466(line 9466) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 9357 9591) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9516(line 9516) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9483(line 9483) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9516-1(line 9516) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9450(line 9450) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9450-1(line 9450) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9500(line 9500) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9500-1(line 9500) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9434(line 9434) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9484(lines 9484 9496) no Hoare annotation was computed. [2018-11-23 15:34:37,051 INFO L444 ceAbstractionStarter]: At program point L9418(line 9418) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,051 INFO L448 ceAbstractionStarter]: For program point L9418-1(line 9418) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9468(line 9468) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9452(line 9452) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 9357 9591) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L444 ceAbstractionStarter]: At program point L9584(lines 9392 9590) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9518(line 9518) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9469(lines 9469 9481) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9436(line 9436) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9568(line 9568) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9535(lines 9535 9539) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9502(line 9502) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9486-1(line 9486) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L448 ceAbstractionStarter]: For program point L9420(line 9420) no Hoare annotation was computed. [2018-11-23 15:34:37,052 INFO L444 ceAbstractionStarter]: At program point L9486(line 9486) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,052 INFO L444 ceAbstractionStarter]: At program point L9586(line 9586) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,052 INFO L444 ceAbstractionStarter]: At program point L9586-1(lines 9392 9590) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9520(line 9520) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9454(line 9454) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9570(line 9570) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9438-1(line 9438) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9504(line 9504) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9471(line 9471) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9504-1(line 9504) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9438(line 9438) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9471-1(line 9471) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9554(line 9554) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9422-1(line 9422) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9488(lines 9488 9492) no Hoare annotation was computed. [2018-11-23 15:34:37,053 INFO L444 ceAbstractionStarter]: At program point L9422(line 9422) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,053 INFO L448 ceAbstractionStarter]: For program point L9522(line 9522) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9456(line 9456) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9572(line 9572) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9506(line 9506) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9473(lines 9473 9477) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9440(line 9440) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9407(lines 9407 9574) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L444 ceAbstractionStarter]: At program point L9556(line 9556) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9556-1(line 9556) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9424(line 9424) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9408(line 9408) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L444 ceAbstractionStarter]: At program point L9524(line 9524) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,054 INFO L448 ceAbstractionStarter]: For program point L9524-1(line 9524) no Hoare annotation was computed. [2018-11-23 15:34:37,054 INFO L444 ceAbstractionStarter]: At program point L9458(line 9458) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,054 INFO L444 ceAbstractionStarter]: At program point L9508(line 9508) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point L9442(line 9442) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point L9426(line 9426) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9558(line 9558) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point L9410(line 9410) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point L9575(lines 9392 9590) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9460(line 9460) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9526(line 9526) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9444(line 9444) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9510(line 9510) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point mainENTRY(lines 9357 9591) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9428(line 9428) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L444 ceAbstractionStarter]: At program point L9560(line 9560) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9560-1(line 9560) no Hoare annotation was computed. [2018-11-23 15:34:37,055 INFO L448 ceAbstractionStarter]: For program point L9412(line 9412) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9462-1(line 9462) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9528(line 9528) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9462(line 9462) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9578(lines 9578 9582) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9446-1(line 9446) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9545(line 9545) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9512(line 9512) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9512-1(line 9512) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9446(line 9446) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9562(line 9562) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9430-1(line 9430) no Hoare annotation was computed. [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9430(line 9430) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L444 ceAbstractionStarter]: At program point L9579(lines 9392 9590) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,056 INFO L448 ceAbstractionStarter]: For program point L9546(lines 9546 9552) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9414-1(line 9414) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L444 ceAbstractionStarter]: At program point L9414(line 9414) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9530(line 9530) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9398-1(line 9398) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9464(line 9464) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L444 ceAbstractionStarter]: At program point L9398(line 9398) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9514(line 9514) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9448(line 9448) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9531(lines 9531 9543) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9498(line 9498) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9432(line 9432) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9399(lines 9399 9403) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L444 ceAbstractionStarter]: At program point L9548(line 9548) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9548-1(line 9548) no Hoare annotation was computed. [2018-11-23 15:34:37,057 INFO L448 ceAbstractionStarter]: For program point L9416(line 9416) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point L5920-1(line 5920) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point netif_start_queueEXIT(lines 5915 5924) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point L5921(line 5921) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point L5920(line 5920) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point netif_start_queueENTRY(lines 5915 5924) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point netif_start_queueFINAL(lines 5915 5924) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point b44_get_msglevelEXIT(lines 8537 8547) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point L8543(line 8543) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point L8543-1(line 8543) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point b44_get_msglevelENTRY(lines 8537 8547) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point b44_get_msglevelFINAL(lines 8537 8547) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point b44_get_pauseparamEXIT(lines 8800 8813) no Hoare annotation was computed. [2018-11-23 15:34:37,058 INFO L451 ceAbstractionStarter]: At program point b44_get_pauseparamENTRY(lines 8800 8813) the Hoare annotation is: true [2018-11-23 15:34:37,058 INFO L448 ceAbstractionStarter]: For program point b44_get_pauseparamFINAL(lines 8800 8813) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L8806-1(line 8806) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L451 ceAbstractionStarter]: At program point L8806(line 8806) the Hoare annotation is: true [2018-11-23 15:34:37,059 INFO L451 ceAbstractionStarter]: At program point b44_check_phyENTRY(lines 6950 7071) the Hoare annotation is: true [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point b44_check_phyFINAL(lines 6950 7071) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L6997(lines 6997 7065) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L7055(lines 7055 7059) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L6981-1(line 6981) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L451 ceAbstractionStarter]: At program point L6981(line 6981) the Hoare annotation is: true [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L6998(lines 6998 7062) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L7023(line 7023) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L7015(line 7015) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L7015-2(lines 7015 7049) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L451 ceAbstractionStarter]: At program point L6974(line 6974) the Hoare annotation is: true [2018-11-23 15:34:37,059 INFO L451 ceAbstractionStarter]: At program point L7040(line 7040) the Hoare annotation is: true [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L6974-1(line 6974) no Hoare annotation was computed. [2018-11-23 15:34:37,059 INFO L448 ceAbstractionStarter]: For program point L6999(lines 6999 7003) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L6999-2(lines 6999 7003) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7024-1(lines 7024 7038) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7024(lines 7024 7038) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7016-1(line 7016) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L451 ceAbstractionStarter]: At program point L7016(line 7016) the Hoare annotation is: true [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L6975(lines 6975 6979) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L6975-2(lines 6971 6991) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7025-1(line 7025) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L451 ceAbstractionStarter]: At program point L7025(line 7025) the Hoare annotation is: true [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7050(lines 7050 7054) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L6984-1(line 6984) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L451 ceAbstractionStarter]: At program point L6984(line 6984) the Hoare annotation is: true [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7050-2(lines 7050 7054) no Hoare annotation was computed. [2018-11-23 15:34:37,060 INFO L451 ceAbstractionStarter]: At program point L7042(line 7042) the Hoare annotation is: true [2018-11-23 15:34:37,060 INFO L448 ceAbstractionStarter]: For program point L7009-1(line 7009) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L451 ceAbstractionStarter]: At program point L7009(line 7009) the Hoare annotation is: true [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7042-1(line 7042) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7026(lines 7026 7035) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7018(lines 7018 7022) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L451 ceAbstractionStarter]: At program point L7018-2(lines 7018 7022) the Hoare annotation is: true [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7010(lines 7010 7014) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7043(line 7043) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7010-2(lines 7010 7014) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7043-3(lines 7015 7049) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7043-2(lines 7043 7048) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L451 ceAbstractionStarter]: At program point L6994(line 6994) the Hoare annotation is: true [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L7027-1(line 7027) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L451 ceAbstractionStarter]: At program point L7027(line 7027) the Hoare annotation is: true [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L6994-1(line 6994) no Hoare annotation was computed. [2018-11-23 15:34:37,061 INFO L451 ceAbstractionStarter]: At program point L6986(line 6986) the Hoare annotation is: true [2018-11-23 15:34:37,061 INFO L448 ceAbstractionStarter]: For program point L6995-1(lines 6995 7068) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L6995(lines 6995 7068) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L7028(lines 7028 7032) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L451 ceAbstractionStarter]: At program point L7045(line 7045) the Hoare annotation is: true [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point b44_check_phyEXIT(lines 6950 7071) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L7004-2(lines 7004 7008) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L6971(lines 6971 6993) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L7004(lines 7004 7008) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L6996-1(line 6996) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L451 ceAbstractionStarter]: At program point L6996(line 6996) the Hoare annotation is: true [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L7029-1(line 7029) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L451 ceAbstractionStarter]: At program point L7029(line 7029) the Hoare annotation is: true [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point L6980(lines 6980 6989) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L448 ceAbstractionStarter]: For program point spin_lock_irqFINAL(lines 9602 9611) no Hoare annotation was computed. [2018-11-23 15:34:37,062 INFO L444 ceAbstractionStarter]: At program point spin_lock_irqENTRY(lines 9602 9611) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,063 INFO L448 ceAbstractionStarter]: For program point spin_lock_irqEXIT(lines 9602 9611) no Hoare annotation was computed. [2018-11-23 15:34:37,063 INFO L444 ceAbstractionStarter]: At program point L9607(line 9607) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,063 INFO L451 ceAbstractionStarter]: At program point L9607-1(line 9607) the Hoare annotation is: true [2018-11-23 15:34:37,063 INFO L451 ceAbstractionStarter]: At program point L8795(line 8795) the Hoare annotation is: true [2018-11-23 15:34:37,063 INFO L444 ceAbstractionStarter]: At program point L8795-1(line 8795) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,063 INFO L444 ceAbstractionStarter]: At program point b44_set_ringparamENTRY(lines 8775 8799) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,063 INFO L448 ceAbstractionStarter]: For program point L8793(line 8793) no Hoare annotation was computed. [2018-11-23 15:34:37,063 INFO L451 ceAbstractionStarter]: At program point L8791(line 8791) the Hoare annotation is: true [2018-11-23 15:34:37,063 INFO L451 ceAbstractionStarter]: At program point L8791-1(line 8791) the Hoare annotation is: true [2018-11-23 15:34:37,063 INFO L444 ceAbstractionStarter]: At program point L8781(line 8781) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,063 INFO L448 ceAbstractionStarter]: For program point L8783-2(line 8783) no Hoare annotation was computed. [2018-11-23 15:34:37,063 INFO L448 ceAbstractionStarter]: For program point b44_set_ringparamEXIT(lines 8775 8799) no Hoare annotation was computed. [2018-11-23 15:34:37,063 INFO L448 ceAbstractionStarter]: For program point L8781-1(line 8781) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8783-3(line 8783) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8783-5(line 8783) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8783(line 8783) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8783-6(line 8783) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8783-8(lines 8783 8787) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8796(line 8796) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L451 ceAbstractionStarter]: At program point L8794(line 8794) the Hoare annotation is: true [2018-11-23 15:34:37,064 INFO L444 ceAbstractionStarter]: At program point L8788(line 8788) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8788-1(line 8788) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L8794-1(line 8794) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L451 ceAbstractionStarter]: At program point L8792(line 8792) the Hoare annotation is: true [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point b44_set_ringparamFINAL(lines 8775 8799) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L451 ceAbstractionStarter]: At program point L6017(line 6017) the Hoare annotation is: true [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point netif_runningEXIT(lines 6012 6020) no Hoare annotation was computed. [2018-11-23 15:34:37,064 INFO L448 ceAbstractionStarter]: For program point L6017-1(line 6017) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point netif_runningENTRY(lines 6012 6020) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point netif_runningFINAL(lines 6012 6020) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point L5978(line 5978) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point L5971(line 5971) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point L5972(lines 5972 5977) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point L5966(lines 5966 5970) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point netif_tx_stop_queueFINAL(lines 5957 5981) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point L5965(line 5965) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point L5965-1(line 5965) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point L5966-2(lines 5966 5970) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point netif_tx_stop_queueEXIT(lines 5957 5981) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point netif_tx_stop_queueENTRY(lines 5957 5981) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L451 ceAbstractionStarter]: At program point ldv_spin_unlock_irqrestore_8ENTRY(lines 5277 5285) the Hoare annotation is: true [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_irqrestore_8EXIT(lines 5277 5285) no Hoare annotation was computed. [2018-11-23 15:34:37,065 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_irqrestore_8FINAL(lines 5277 5285) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOIDEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOIDENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOIDFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point dma_get_cache_alignmentEXIT(lines 5657 5664) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point dma_get_cache_alignmentENTRY(lines 5657 5664) the Hoare annotation is: true [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point dma_get_cache_alignmentFINAL(lines 5657 5664) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point ldv_spin_unlockENTRY(lines 9825 9833) the Hoare annotation is: true [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlockFINAL(lines 9825 9833) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlockEXIT(lines 9825 9833) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L448 ceAbstractionStarter]: For program point L6560-1(line 6560) no Hoare annotation was computed. [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point L6560(line 6560) the Hoare annotation is: true [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point L6562-1(line 6562) the Hoare annotation is: true [2018-11-23 15:34:37,066 INFO L451 ceAbstractionStarter]: At program point __b44_cam_writeENTRY(lines 6551 6567) the Hoare annotation is: true [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point __b44_cam_writeFINAL(lines 6551 6567) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point __b44_cam_writeEXIT(lines 6551 6567) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L451 ceAbstractionStarter]: At program point L6562(line 6562) the Hoare annotation is: true [2018-11-23 15:34:37,067 INFO L451 ceAbstractionStarter]: At program point L6563(line 6563) the Hoare annotation is: true [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point L6564(line 6564) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point arch_irqs_disabled_flagsFINAL(lines 5215 5222) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L451 ceAbstractionStarter]: At program point arch_irqs_disabled_flagsENTRY(lines 5215 5222) the Hoare annotation is: true [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point arch_irqs_disabled_flagsEXIT(lines 5215 5222) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L451 ceAbstractionStarter]: At program point L8382(line 8382) the Hoare annotation is: true [2018-11-23 15:34:37,067 INFO L444 ceAbstractionStarter]: At program point L8384-1(lines 8384 8389) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,067 INFO L448 ceAbstractionStarter]: For program point L8384(lines 8384 8389) no Hoare annotation was computed. [2018-11-23 15:34:37,067 INFO L444 ceAbstractionStarter]: At program point L8385-1(line 8385) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,067 INFO L444 ceAbstractionStarter]: At program point L8385(line 8385) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,068 INFO L448 ceAbstractionStarter]: For program point b44_closeEXIT(lines 8367 8393) no Hoare annotation was computed. [2018-11-23 15:34:37,068 INFO L444 ceAbstractionStarter]: At program point L8378(line 8378) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,068 INFO L451 ceAbstractionStarter]: At program point L8379(line 8379) the Hoare annotation is: true [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L8380(line 8380) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L8382-1(line 8382) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L444 ceAbstractionStarter]: At program point L8375-1(line 8375) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,069 INFO L444 ceAbstractionStarter]: At program point L8375(line 8375) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L8376(line 8376) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L451 ceAbstractionStarter]: At program point L8378-1(line 8378) the Hoare annotation is: true [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L8373-1(line 8373) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L444 ceAbstractionStarter]: At program point b44_closeENTRY(lines 8367 8393) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,069 INFO L444 ceAbstractionStarter]: At program point L8373(line 8373) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L8390(line 8390) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point b44_closeFINAL(lines 8367 8393) no Hoare annotation was computed. [2018-11-23 15:34:37,069 INFO L444 ceAbstractionStarter]: At program point b44_tx_timeoutENTRY(lines 7500 7518) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,069 INFO L448 ceAbstractionStarter]: For program point L7506-1(line 7506) no Hoare annotation was computed. [2018-11-23 15:34:37,070 INFO L444 ceAbstractionStarter]: At program point L7514(line 7514) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,070 INFO L451 ceAbstractionStarter]: At program point L7510(line 7510) the Hoare annotation is: true [2018-11-23 15:34:37,070 INFO L451 ceAbstractionStarter]: At program point L7511(line 7511) the Hoare annotation is: true [2018-11-23 15:34:37,070 INFO L451 ceAbstractionStarter]: At program point L7512(line 7512) the Hoare annotation is: true [2018-11-23 15:34:37,070 INFO L444 ceAbstractionStarter]: At program point L7513(line 7513) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,070 INFO L448 ceAbstractionStarter]: For program point b44_tx_timeoutFINAL(lines 7500 7518) no Hoare annotation was computed. [2018-11-23 15:34:37,070 INFO L444 ceAbstractionStarter]: At program point L7506(line 7506) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,070 INFO L451 ceAbstractionStarter]: At program point L7509-1(line 7509) the Hoare annotation is: true [2018-11-23 15:34:37,070 INFO L444 ceAbstractionStarter]: At program point L7509(line 7509) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,071 INFO L448 ceAbstractionStarter]: For program point b44_tx_timeoutEXIT(lines 7500 7518) no Hoare annotation was computed. [2018-11-23 15:34:37,071 INFO L451 ceAbstractionStarter]: At program point spin_unlock_irqrestoreENTRY(lines 9632 9641) the Hoare annotation is: true [2018-11-23 15:34:37,071 INFO L448 ceAbstractionStarter]: For program point spin_unlock_irqrestoreEXIT(lines 9632 9641) no Hoare annotation was computed. [2018-11-23 15:34:37,071 INFO L451 ceAbstractionStarter]: At program point L9637(line 9637) the Hoare annotation is: true [2018-11-23 15:34:37,071 INFO L444 ceAbstractionStarter]: At program point L9637-1(line 9637) the Hoare annotation is: (= ~ldv_spin~0 (_ bv0 32)) [2018-11-23 15:34:37,071 INFO L448 ceAbstractionStarter]: For program point spin_unlock_irqrestoreFINAL(lines 9632 9641) no Hoare annotation was computed. [2018-11-23 15:34:37,071 INFO L451 ceAbstractionStarter]: At program point L6602(line 6602) the Hoare annotation is: true [2018-11-23 15:34:37,071 INFO L451 ceAbstractionStarter]: At program point L6603(line 6603) the Hoare annotation is: true [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6604(line 6604) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6605-1(line 6605) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L451 ceAbstractionStarter]: At program point L6605(line 6605) the Hoare annotation is: true [2018-11-23 15:34:37,072 INFO L451 ceAbstractionStarter]: At program point L6602-1(line 6602) the Hoare annotation is: true [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point __b44_readphyEXIT(lines 6596 6609) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L451 ceAbstractionStarter]: At program point __b44_readphyENTRY(lines 6596 6609) the Hoare annotation is: true [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point __b44_readphyFINAL(lines 6596 6609) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6688(lines 6688 6692) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point b44_phy_resetFINAL(lines 6682 6713) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6702(lines 6702 6707) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6700-1(line 6700) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L451 ceAbstractionStarter]: At program point L6700(line 6700) the Hoare annotation is: true [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6701-1(lines 6701 6710) no Hoare annotation was computed. [2018-11-23 15:34:37,072 INFO L448 ceAbstractionStarter]: For program point L6701(lines 6701 6710) no Hoare annotation was computed. [2018-11-23 15:34:37,073 INFO L448 ceAbstractionStarter]: For program point L6694(lines 6694 6698) no Hoare annotation was computed. [2018-11-23 15:34:37,073 INFO L448 ceAbstractionStarter]: For program point b44_phy_resetEXIT(lines 6682 6713) no Hoare annotation was computed. [2018-11-23 15:34:37,073 INFO L451 ceAbstractionStarter]: At program point b44_phy_resetENTRY(lines 6682 6713) the Hoare annotation is: true [2018-11-23 15:34:37,073 INFO L448 ceAbstractionStarter]: For program point L6693-1(line 6693) no Hoare annotation was computed. [2018-11-23 15:34:37,073 INFO L451 ceAbstractionStarter]: At program point L6693(line 6693) the Hoare annotation is: true [2018-11-23 15:34:37,073 INFO L451 ceAbstractionStarter]: At program point ldv___netdev_alloc_skb_28ENTRY(lines 9712 9722) the Hoare annotation is: true [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point L9718-1(line 9718) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point ldv___netdev_alloc_skb_28FINAL(lines 9712 9722) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L444 ceAbstractionStarter]: At program point L9718(line 9718) the Hoare annotation is: (or (= (_ bv32 32) ldv___netdev_alloc_skb_28_~flags) (not (= (_ bv32 32) |ldv___netdev_alloc_skb_28_#in~flags|))) [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point ldv___netdev_alloc_skb_28EXIT(lines 9712 9722) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point b44_wap54g10_workaroundEXIT(lines 6761 6768) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L451 ceAbstractionStarter]: At program point b44_wap54g10_workaroundENTRY(lines 6761 6768) the Hoare annotation is: true [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point b44_wap54g10_workaroundFINAL(lines 6761 6768) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_irq_7FINAL(lines 5267 5275) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point ldv_spin_unlock_irq_7EXIT(lines 5267 5275) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L451 ceAbstractionStarter]: At program point ldv_spin_unlock_irq_7ENTRY(lines 5267 5275) the Hoare annotation is: true [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point is_zero_ether_addrEXIT(lines 6073 6080) no Hoare annotation was computed. [2018-11-23 15:34:37,074 INFO L448 ceAbstractionStarter]: For program point is_zero_ether_addrFINAL(lines 6073 6080) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L451 ceAbstractionStarter]: At program point is_zero_ether_addrENTRY(lines 6073 6080) the Hoare annotation is: true [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point L8876(line 8876) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point b44_get_sset_countFINAL(lines 8870 8882) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point L8875(lines 8875 8880) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point L8878(line 8878) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L451 ceAbstractionStarter]: At program point b44_get_sset_countENTRY(lines 8870 8882) the Hoare annotation is: true [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point b44_get_sset_countEXIT(lines 8870 8882) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L451 ceAbstractionStarter]: At program point ldv_spin_lock_1ENTRY(lines 5237 5245) the Hoare annotation is: true [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lock_1FINAL(lines 5237 5245) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point ldv_spin_lock_1EXIT(lines 5237 5245) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L451 ceAbstractionStarter]: At program point L8610-1(line 8610) the Hoare annotation is: true [2018-11-23 15:34:37,075 INFO L444 ceAbstractionStarter]: At program point L8608(line 8608) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point L8608-1(line 8608) no Hoare annotation was computed. [2018-11-23 15:34:37,075 INFO L448 ceAbstractionStarter]: For program point b44_nway_resetEXIT(lines 8600 8623) no Hoare annotation was computed. [2018-11-23 15:34:37,077 INFO L444 ceAbstractionStarter]: At program point b44_nway_resetENTRY(lines 8600 8623) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,077 INFO L448 ceAbstractionStarter]: For program point L8620(line 8620) no Hoare annotation was computed. [2018-11-23 15:34:37,077 INFO L451 ceAbstractionStarter]: At program point L8612(line 8612) the Hoare annotation is: true [2018-11-23 15:34:37,077 INFO L451 ceAbstractionStarter]: At program point L8614-2(lines 8614 8619) the Hoare annotation is: true [2018-11-23 15:34:37,077 INFO L448 ceAbstractionStarter]: For program point L8611(line 8611) no Hoare annotation was computed. [2018-11-23 15:34:37,077 INFO L448 ceAbstractionStarter]: For program point L8612-1(line 8612) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L444 ceAbstractionStarter]: At program point L8610(line 8610) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point b44_nway_resetFINAL(lines 8600 8623) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L451 ceAbstractionStarter]: At program point L8615(line 8615) the Hoare annotation is: true [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L8614(lines 8614 8619) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L8615-1(line 8615) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L7170-1(line 7170) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L451 ceAbstractionStarter]: At program point L7162(line 7162) the Hoare annotation is: true [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L7191-1(line 7191) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L451 ceAbstractionStarter]: At program point L7191(line 7191) the Hoare annotation is: true [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L7224-1(lines 7224 7225) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L451 ceAbstractionStarter]: At program point L7224(lines 7224 7225) the Hoare annotation is: true [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L7162-1(line 7162) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L448 ceAbstractionStarter]: For program point L7187-1(line 7187) no Hoare annotation was computed. [2018-11-23 15:34:37,078 INFO L451 ceAbstractionStarter]: At program point L7187(line 7187) the Hoare annotation is: true [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point b44_alloc_rx_skbEXIT(lines 7138 7231) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7179-1(line 7179) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L451 ceAbstractionStarter]: At program point L7179(line 7179) the Hoare annotation is: true [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7171(lines 7171 7203) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7171-2(lines 7171 7203) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7163(lines 7163 7167) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7155(lines 7155 7159) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7188(lines 7188 7199) no Hoare annotation was computed. [2018-11-23 15:34:37,079 INFO L448 ceAbstractionStarter]: For program point L7155-2(lines 7155 7159) no Hoare annotation was computed. [2018-11-23 15:34:37,080 INFO L448 ceAbstractionStarter]: For program point L7180(lines 7180 7184) no Hoare annotation was computed. [2018-11-23 15:34:37,080 INFO L448 ceAbstractionStarter]: For program point L7209-2(lines 7209 7213) no Hoare annotation was computed. [2018-11-23 15:34:37,080 INFO L448 ceAbstractionStarter]: For program point L7209(lines 7209 7213) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7172-1(line 7172) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L451 ceAbstractionStarter]: At program point L7172(line 7172) the Hoare annotation is: true [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7168-1(lines 7168 7169) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L451 ceAbstractionStarter]: At program point L7168(lines 7168 7169) the Hoare annotation is: true [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point b44_alloc_rx_skbFINAL(lines 7138 7231) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7189-1(line 7189) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L451 ceAbstractionStarter]: At program point L7189(line 7189) the Hoare annotation is: true [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7185-1(lines 7185 7186) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L451 ceAbstractionStarter]: At program point L7185(lines 7185 7186) the Hoare annotation is: true [2018-11-23 15:34:37,081 INFO L451 ceAbstractionStarter]: At program point b44_alloc_rx_skbENTRY(lines 7138 7231) the Hoare annotation is: true [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7173-2(lines 7173 7177) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7173(lines 7173 7177) no Hoare annotation was computed. [2018-11-23 15:34:37,081 INFO L448 ceAbstractionStarter]: For program point L7190(lines 7190 7194) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7223(lines 7223 7228) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7190-2(lines 7190 7194) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7223-2(lines 7223 7228) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7215(lines 7215 7219) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7215-2(lines 7215 7219) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L451 ceAbstractionStarter]: At program point L7174(line 7174) the Hoare annotation is: true [2018-11-23 15:34:37,082 INFO L451 ceAbstractionStarter]: At program point L7170(line 7170) the Hoare annotation is: true [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L7174-1(line 7174) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L8862-1(line 8862) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L451 ceAbstractionStarter]: At program point L8860(line 8860) the Hoare annotation is: true [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L8859(lines 8859 8863) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L8860-1(line 8860) no Hoare annotation was computed. [2018-11-23 15:34:37,082 INFO L451 ceAbstractionStarter]: At program point L8862(line 8862) the Hoare annotation is: true [2018-11-23 15:34:37,082 INFO L448 ceAbstractionStarter]: For program point L8857(line 8857) no Hoare annotation was computed. [2018-11-23 15:34:37,083 INFO L448 ceAbstractionStarter]: For program point L8856(lines 8856 8865) no Hoare annotation was computed. [2018-11-23 15:34:37,083 INFO L448 ceAbstractionStarter]: For program point b44_get_stringsEXIT(lines 8850 8869) no Hoare annotation was computed. [2018-11-23 15:34:37,083 INFO L451 ceAbstractionStarter]: At program point b44_get_stringsENTRY(lines 8850 8869) the Hoare annotation is: true [2018-11-23 15:34:37,083 INFO L451 ceAbstractionStarter]: At program point L8866(lines 8850 8869) the Hoare annotation is: true [2018-11-23 15:34:37,083 INFO L448 ceAbstractionStarter]: For program point pci_write_config_wordEXIT(lines 6134 6143) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point pci_write_config_wordENTRY(lines 6134 6143) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point pci_write_config_wordFINAL(lines 6134 6143) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point b44_writephyFINAL(lines 6635 6648) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point L6640(lines 6640 6644) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point b44_writephyENTRY(lines 6635 6648) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point b44_writephyEXIT(lines 6635 6648) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point L6645-1(line 6645) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point L6645(line 6645) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point L5854(lines 5846 5860) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point L5851(lines 5846 5860) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point L5853(lines 5853 5857) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point L5852(line 5852) no Hoare annotation was computed. [2018-11-23 15:34:37,084 INFO L451 ceAbstractionStarter]: At program point L5847(line 5847) the Hoare annotation is: true [2018-11-23 15:34:37,084 INFO L448 ceAbstractionStarter]: For program point napi_disableFINAL(lines 5842 5861) no Hoare annotation was computed. [2018-11-23 15:34:37,085 INFO L451 ceAbstractionStarter]: At program point napi_disableENTRY(lines 5842 5861) the Hoare annotation is: true [2018-11-23 15:34:37,085 INFO L448 ceAbstractionStarter]: For program point napi_disableEXIT(lines 5842 5861) no Hoare annotation was computed. [2018-11-23 15:34:37,085 INFO L451 ceAbstractionStarter]: At program point L5858(line 5858) the Hoare annotation is: true [2018-11-23 15:34:37,085 INFO L448 ceAbstractionStarter]: For program point ethtool_cmd_speedFINAL(lines 5770 5777) no Hoare annotation was computed. [2018-11-23 15:34:37,085 INFO L451 ceAbstractionStarter]: At program point ethtool_cmd_speedENTRY(lines 5770 5777) the Hoare annotation is: true [2018-11-23 15:34:37,085 INFO L448 ceAbstractionStarter]: For program point ethtool_cmd_speedEXIT(lines 5770 5777) no Hoare annotation was computed. [2018-11-23 15:34:37,085 INFO L448 ceAbstractionStarter]: For program point b44_pci_exitEXIT(lines 9302 9310) no Hoare annotation was computed. [2018-11-23 15:34:37,085 INFO L451 ceAbstractionStarter]: At program point b44_pci_exitENTRY(lines 9302 9310) the Hoare annotation is: true [2018-11-23 15:34:37,085 INFO L448 ceAbstractionStarter]: For program point b44_pci_exitFINAL(lines 9302 9310) no Hoare annotation was computed. [2018-11-23 15:34:37,086 INFO L448 ceAbstractionStarter]: For program point L8000-2(lines 7924 8018) no Hoare annotation was computed. [2018-11-23 15:34:37,086 INFO L448 ceAbstractionStarter]: For program point L8000(lines 8000 8015) no Hoare annotation was computed. [2018-11-23 15:34:37,086 INFO L448 ceAbstractionStarter]: For program point L7955-1(line 7955) no Hoare annotation was computed. [2018-11-23 15:34:37,086 INFO L451 ceAbstractionStarter]: At program point L7988-2(lines 7988 7993) the Hoare annotation is: true [2018-11-23 15:34:37,086 INFO L451 ceAbstractionStarter]: At program point L7955(line 7955) the Hoare annotation is: true [2018-11-23 15:34:37,086 INFO L448 ceAbstractionStarter]: For program point L7988(lines 7988 7993) no Hoare annotation was computed. [2018-11-23 15:34:37,086 INFO L448 ceAbstractionStarter]: For program point L7951-1(line 7951) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L7984-2(line 7984) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L7951(line 7951) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L7984(line 7984) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L7947(lines 7947 7967) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L7947-2(lines 7947 7967) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L8009(line 8009) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L8005-1(line 8005) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L8005(line 8005) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L7968(lines 7941 8017) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L8001-1(line 8001) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L8001(line 8001) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L7997(lines 7941 8017) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point b44_chip_resetEXIT(lines 7924 8018) no Hoare annotation was computed. [2018-11-23 15:34:37,087 INFO L451 ceAbstractionStarter]: At program point L7956-2(lines 7956 7960) the Hoare annotation is: true [2018-11-23 15:34:37,087 INFO L448 ceAbstractionStarter]: For program point L7956(lines 7956 7960) no Hoare annotation was computed. [2018-11-23 15:34:37,088 INFO L448 ceAbstractionStarter]: For program point L7985(line 7985) no Hoare annotation was computed. [2018-11-23 15:34:37,088 INFO L451 ceAbstractionStarter]: At program point L7948-1(line 7948) the Hoare annotation is: true [2018-11-23 15:34:37,088 INFO L451 ceAbstractionStarter]: At program point L7948(line 7948) the Hoare annotation is: true [2018-11-23 15:34:37,088 INFO L448 ceAbstractionStarter]: For program point L7981(line 7981) no Hoare annotation was computed. [2018-11-23 15:34:37,088 INFO L451 ceAbstractionStarter]: At program point b44_chip_resetENTRY(lines 7924 8018) the Hoare annotation is: true [2018-11-23 15:34:37,088 INFO L448 ceAbstractionStarter]: For program point L8002(line 8002) no Hoare annotation was computed. [2018-11-23 15:34:37,088 INFO L448 ceAbstractionStarter]: For program point L7998(line 7998) no Hoare annotation was computed. [2018-11-23 15:34:37,088 INFO L448 ceAbstractionStarter]: For program point L7994(line 7994) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L7961(line 7961) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L7957-1(line 7957) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L451 ceAbstractionStarter]: At program point L7957(line 7957) the Hoare annotation is: true [2018-11-23 15:34:37,089 INFO L451 ceAbstractionStarter]: At program point L7982(line 7982) the Hoare annotation is: true [2018-11-23 15:34:37,089 INFO L451 ceAbstractionStarter]: At program point L7949(line 7949) the Hoare annotation is: true [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L7974(lines 7974 7996) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L8007(lines 8007 8013) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L8007-2(lines 8007 8013) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L448 ceAbstractionStarter]: For program point L7999-1(line 7999) no Hoare annotation was computed. [2018-11-23 15:34:37,089 INFO L451 ceAbstractionStarter]: At program point L7999(line 7999) the Hoare annotation is: true [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L7987-1(line 7987) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L451 ceAbstractionStarter]: At program point L7987(line 7987) the Hoare annotation is: true [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L7950(line 7950) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L451 ceAbstractionStarter]: At program point L7979(line 7979) the Hoare annotation is: true [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L7975(line 7975) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L451 ceAbstractionStarter]: At program point L8008-1(line 8008) the Hoare annotation is: true [2018-11-23 15:34:37,090 INFO L451 ceAbstractionStarter]: At program point L8008(line 8008) the Hoare annotation is: true [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6945-3(line 6945) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6943(line 6943) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6945-2(line 6945) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6945(line 6945) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6943-5(line 6943) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6939-1(lines 6927 6949) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6943-3(line 6943) no Hoare annotation was computed. [2018-11-23 15:34:37,090 INFO L448 ceAbstractionStarter]: For program point L6945-5(line 6945) no Hoare annotation was computed. [2018-11-23 15:34:37,091 INFO L448 ceAbstractionStarter]: For program point L6943-2(line 6943) no Hoare annotation was computed. [2018-11-23 15:34:37,091 INFO L448 ceAbstractionStarter]: For program point b44_link_reportEXIT(lines 6927 6949) no Hoare annotation was computed. [2018-11-23 15:34:37,091 INFO L448 ceAbstractionStarter]: For program point L6933-1(line 6933) no Hoare annotation was computed. [2018-11-23 15:34:37,091 INFO L451 ceAbstractionStarter]: At program point L6933(line 6933) the Hoare annotation is: true [2018-11-23 15:34:37,091 INFO L448 ceAbstractionStarter]: For program point L6934(lines 6934 6938) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point b44_link_reportENTRY(lines 6927 6949) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point L6934-2(lines 6932 6948) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L6748-1(lines 6748 6756) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point L6748(lines 6748 6756) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point L6749(lines 6749 6753) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point b44_set_flow_ctrlENTRY(lines 6742 6760) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point b44_set_flow_ctrlFINAL(lines 6742 6760) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point b44_set_flow_ctrlEXIT(lines 6742 6760) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L8126(line 8126) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L8128-1(lines 8119 8129) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L8128(line 8128) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L8122(line 8122) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point L8124-1(line 8124) no Hoare annotation was computed. [2018-11-23 15:34:37,092 INFO L451 ceAbstractionStarter]: At program point L8124(line 8124) the Hoare annotation is: true [2018-11-23 15:34:37,092 INFO L448 ceAbstractionStarter]: For program point L8126-1(line 8126) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8118(line 8118) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point b44_init_hwENTRY(lines 8100 8135) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8120(line 8120) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8122-1(line 8122) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8114(line 8114) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8116-1(line 8116) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8116(line 8116) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8118-1(lines 8105 8134) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8106(line 8106) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8108-1(line 8108) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point b44_init_hwEXIT(lines 8100 8135) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8108(line 8108) the Hoare annotation is: true [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8106-1(lines 8105 8134) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L448 ceAbstractionStarter]: For program point L8123-1(line 8123) no Hoare annotation was computed. [2018-11-23 15:34:37,093 INFO L451 ceAbstractionStarter]: At program point L8123(line 8123) the Hoare annotation is: true [2018-11-23 15:34:37,094 INFO L448 ceAbstractionStarter]: For program point L8125-1(line 8125) no Hoare annotation was computed. [2018-11-23 15:34:37,094 INFO L451 ceAbstractionStarter]: At program point L8125(line 8125) the Hoare annotation is: true [2018-11-23 15:34:37,094 INFO L448 ceAbstractionStarter]: For program point L8115-1(line 8115) no Hoare annotation was computed. [2018-11-23 15:34:37,094 INFO L451 ceAbstractionStarter]: At program point L8115(line 8115) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point L8117-1(line 8117) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L8117(line 8117) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point b44_init_hwFINAL(lines 8100 8135) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L8113(line 8113) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L8107-1(lines 8107 8112) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point L8109-1(line 8109) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L8109(line 8109) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point L8130(line 8130) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L8132(line 8132) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point b44_remove_oneEXIT(lines 9171 9187) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L9183(line 9183) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L9183-1(line 9183) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point L9177(line 9177) the Hoare annotation is: true [2018-11-23 15:34:37,095 INFO L448 ceAbstractionStarter]: For program point L9177-1(line 9177) no Hoare annotation was computed. [2018-11-23 15:34:37,095 INFO L451 ceAbstractionStarter]: At program point b44_remove_oneENTRY(lines 9171 9187) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point b44_remove_oneFINAL(lines 9171 9187) no Hoare annotation was computed. [2018-11-23 15:34:37,096 INFO L451 ceAbstractionStarter]: At program point __b44_set_mac_addrENTRY(lines 8032 8049) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L451 ceAbstractionStarter]: At program point L8043(line 8043) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L451 ceAbstractionStarter]: At program point L8038(line 8038) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point L8039-1(lines 8032 8049) no Hoare annotation was computed. [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point L8039(lines 8039 8046) no Hoare annotation was computed. [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point L8040-1(line 8040) no Hoare annotation was computed. [2018-11-23 15:34:37,096 INFO L451 ceAbstractionStarter]: At program point L8040(line 8040) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point L8041-1(line 8041) no Hoare annotation was computed. [2018-11-23 15:34:37,096 INFO L451 ceAbstractionStarter]: At program point L8041(line 8041) the Hoare annotation is: true [2018-11-23 15:34:37,096 INFO L448 ceAbstractionStarter]: For program point __b44_set_mac_addrEXIT(lines 8032 8049) no Hoare annotation was computed. [2018-11-23 15:34:37,097 INFO L448 ceAbstractionStarter]: For program point L8038-1(line 8038) no Hoare annotation was computed. [2018-11-23 15:34:37,097 INFO L448 ceAbstractionStarter]: For program point b44_initFINAL(lines 9311 9339) no Hoare annotation was computed. [2018-11-23 15:34:37,097 INFO L451 ceAbstractionStarter]: At program point L9333(line 9333) the Hoare annotation is: true [2018-11-23 15:34:37,097 INFO L448 ceAbstractionStarter]: For program point L9332(lines 9332 9336) no Hoare annotation was computed. [2018-11-23 15:34:37,097 INFO L448 ceAbstractionStarter]: For program point L9332-1(lines 9332 9336) no Hoare annotation was computed. [2018-11-23 15:34:37,097 INFO L451 ceAbstractionStarter]: At program point L9325(line 9325) the Hoare annotation is: true [2018-11-23 15:34:37,097 INFO L448 ceAbstractionStarter]: For program point L9324(line 9324) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L9325-1(line 9325) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L9324-2(line 9324) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L9326(lines 9326 9330) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point b44_initEXIT(lines 9311 9339) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L451 ceAbstractionStarter]: At program point b44_initENTRY(lines 9311 9339) the Hoare annotation is: true [2018-11-23 15:34:37,098 INFO L451 ceAbstractionStarter]: At program point L9320(line 9320) the Hoare annotation is: true [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L9320-1(line 9320) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L444 ceAbstractionStarter]: At program point L8989(line 8989) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L8989-1(line 8989) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L444 ceAbstractionStarter]: At program point b44_ioctlENTRY(lines 8976 9009) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,098 INFO L444 ceAbstractionStarter]: At program point L8987(line 8987) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L8987-1(line 8987) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L448 ceAbstractionStarter]: For program point L8993(lines 8993 8997) no Hoare annotation was computed. [2018-11-23 15:34:37,098 INFO L444 ceAbstractionStarter]: At program point L8992(line 8992) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,099 INFO L448 ceAbstractionStarter]: For program point L8992-1(line 8992) no Hoare annotation was computed. [2018-11-23 15:34:37,099 INFO L448 ceAbstractionStarter]: For program point L8993-2(lines 8986 9008) no Hoare annotation was computed. [2018-11-23 15:34:37,099 INFO L448 ceAbstractionStarter]: For program point b44_ioctlEXIT(lines 8976 9009) no Hoare annotation was computed. [2018-11-23 15:34:37,099 INFO L451 ceAbstractionStarter]: At program point L9005(line 9005) the Hoare annotation is: true [2018-11-23 15:34:37,099 INFO L444 ceAbstractionStarter]: At program point L9005-1(lines 8986 9008) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,099 INFO L444 ceAbstractionStarter]: At program point L9003(line 9003) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,100 INFO L448 ceAbstractionStarter]: For program point L9003-1(line 9003) no Hoare annotation was computed. [2018-11-23 15:34:37,100 INFO L448 ceAbstractionStarter]: For program point b44_ioctlFINAL(lines 8976 9009) no Hoare annotation was computed. [2018-11-23 15:34:37,100 INFO L448 ceAbstractionStarter]: For program point L9276(line 9276) no Hoare annotation was computed. [2018-11-23 15:34:37,100 INFO L451 ceAbstractionStarter]: At program point L9274(line 9274) the Hoare annotation is: true [2018-11-23 15:34:37,100 INFO L444 ceAbstractionStarter]: At program point L9282-1(line 9282) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,100 INFO L448 ceAbstractionStarter]: For program point L9268(line 9268) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L451 ceAbstractionStarter]: At program point L9266(line 9266) the Hoare annotation is: true [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point b44_resumeEXIT(lines 9231 9287) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point L9254-1(line 9254) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point L9283(line 9283) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L444 ceAbstractionStarter]: At program point L9254(line 9254) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,101 INFO L444 ceAbstractionStarter]: At program point b44_resumeENTRY(lines 9231 9287) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,101 INFO L444 ceAbstractionStarter]: At program point L9244(line 9244) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point L9244-1(line 9244) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L451 ceAbstractionStarter]: At program point L9275(line 9275) the Hoare annotation is: true [2018-11-23 15:34:37,101 INFO L444 ceAbstractionStarter]: At program point L9242(line 9242) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point L9248(lines 9248 9253) no Hoare annotation was computed. [2018-11-23 15:34:37,101 INFO L444 ceAbstractionStarter]: At program point L9269(lines 9269 9270) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,101 INFO L448 ceAbstractionStarter]: For program point L9269-1(lines 9269 9270) no Hoare annotation was computed. [2018-11-23 15:34:37,102 INFO L451 ceAbstractionStarter]: At program point L9267(line 9267) the Hoare annotation is: true [2018-11-23 15:34:37,102 INFO L448 ceAbstractionStarter]: For program point L9242-1(line 9242) no Hoare annotation was computed. [2018-11-23 15:34:37,102 INFO L444 ceAbstractionStarter]: At program point L9273(line 9273) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,102 INFO L451 ceAbstractionStarter]: At program point L9273-1(line 9273) the Hoare annotation is: true [2018-11-23 15:34:37,102 INFO L448 ceAbstractionStarter]: For program point L9271(lines 9271 9280) no Hoare annotation was computed. [2018-11-23 15:34:37,102 INFO L444 ceAbstractionStarter]: At program point L9265(line 9265) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,102 INFO L451 ceAbstractionStarter]: At program point L9265-1(line 9265) the Hoare annotation is: true [2018-11-23 15:34:37,104 INFO L448 ceAbstractionStarter]: For program point L9255-2(lines 9241 9286) no Hoare annotation was computed. [2018-11-23 15:34:37,104 INFO L448 ceAbstractionStarter]: For program point b44_resumeFINAL(lines 9231 9287) no Hoare annotation was computed. [2018-11-23 15:34:37,104 INFO L444 ceAbstractionStarter]: At program point L9282(line 9282) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point L9255(lines 9255 9259) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point kzallocEXIT(lines 9662 9670) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L451 ceAbstractionStarter]: At program point L9667(line 9667) the Hoare annotation is: true [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point L9667-1(line 9667) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L451 ceAbstractionStarter]: At program point kzallocENTRY(lines 9662 9670) the Hoare annotation is: true [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point kzallocFINAL(lines 9662 9670) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L451 ceAbstractionStarter]: At program point L9214-1(line 9214) the Hoare annotation is: true [2018-11-23 15:34:37,105 INFO L451 ceAbstractionStarter]: At program point L9218-1(line 9218) the Hoare annotation is: true [2018-11-23 15:34:37,105 INFO L444 ceAbstractionStarter]: At program point L9214(line 9214) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,105 INFO L444 ceAbstractionStarter]: At program point L9202(line 9202) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point L9198-1(line 9198) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point L9227(line 9227) no Hoare annotation was computed. [2018-11-23 15:34:37,105 INFO L448 ceAbstractionStarter]: For program point L9202-1(line 9202) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L444 ceAbstractionStarter]: At program point L9200(line 9200) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9200-1(line 9200) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L444 ceAbstractionStarter]: At program point L9198(line 9198) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9221(lines 9221 9226) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L444 ceAbstractionStarter]: At program point L9221-1(lines 9221 9226) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9219(line 9219) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point b44_suspendFINAL(lines 9188 9230) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9215(line 9215) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9203(lines 9203 9207) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L448 ceAbstractionStarter]: For program point L9203-2(lines 9197 9229) no Hoare annotation was computed. [2018-11-23 15:34:37,106 INFO L444 ceAbstractionStarter]: At program point L9222-1(line 9222) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,108 INFO L444 ceAbstractionStarter]: At program point b44_suspendENTRY(lines 9188 9230) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,108 INFO L451 ceAbstractionStarter]: At program point L9218(line 9218) the Hoare annotation is: true [2018-11-23 15:34:37,108 INFO L448 ceAbstractionStarter]: For program point b44_suspendEXIT(lines 9188 9230) no Hoare annotation was computed. [2018-11-23 15:34:37,108 INFO L444 ceAbstractionStarter]: At program point L9222(line 9222) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L5519(line 5519) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point dma_mapping_errorENTRY(lines 5512 5531) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L5519-1(line 5519) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point dma_mapping_errorFINAL(lines 5512 5531) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L5524-1(line 5524) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L5522(lines 5522 5528) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point dma_mapping_errorEXIT(lines 5512 5531) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L5524(line 5524) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L6914-1(line 6914) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6902(lines 6887 6925) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6900(lines 6887 6925) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L6897-1(line 6897) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6897(line 6897) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point b44_stats_updateFINAL(lines 6876 6926) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6923(line 6923) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6919(lines 6887 6925) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L448 ceAbstractionStarter]: For program point L6889-1(line 6889) no Hoare annotation was computed. [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point b44_stats_updateENTRY(lines 6876 6926) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6889(line 6889) the Hoare annotation is: true [2018-11-23 15:34:37,109 INFO L451 ceAbstractionStarter]: At program point L6914(line 6914) the Hoare annotation is: true [2018-11-23 15:34:37,110 INFO L451 ceAbstractionStarter]: At program point L6917(lines 6887 6925) the Hoare annotation is: true [2018-11-23 15:34:37,110 INFO L448 ceAbstractionStarter]: For program point b44_stats_updateEXIT(lines 6876 6926) no Hoare annotation was computed. [2018-11-23 15:34:37,110 INFO L451 ceAbstractionStarter]: At program point L7711(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,110 INFO L448 ceAbstractionStarter]: For program point b44_free_ringsEXIT(lines 7672 7722) no Hoare annotation was computed. [2018-11-23 15:34:37,112 INFO L451 ceAbstractionStarter]: At program point L7713(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,112 INFO L448 ceAbstractionStarter]: For program point L7707-1(lines 7707 7708) no Hoare annotation was computed. [2018-11-23 15:34:37,112 INFO L451 ceAbstractionStarter]: At program point L7707(lines 7707 7708) the Hoare annotation is: true [2018-11-23 15:34:37,112 INFO L448 ceAbstractionStarter]: For program point L7687-1(line 7687) no Hoare annotation was computed. [2018-11-23 15:34:37,112 INFO L451 ceAbstractionStarter]: At program point L7687(line 7687) the Hoare annotation is: true [2018-11-23 15:34:37,112 INFO L451 ceAbstractionStarter]: At program point b44_free_ringsENTRY(lines 7672 7722) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point b44_free_ringsFINAL(lines 7672 7722) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point L7702(lines 7702 7706) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L7694(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L7690(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L7692(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point L7682(lines 7682 7686) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L7715(lines 7677 7721) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point u64_stats_fetch_begin_bhEXIT(lines 5787 5794) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point u64_stats_fetch_begin_bhENTRY(lines 5787 5794) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point u64_stats_fetch_begin_bhFINAL(lines 5787 5794) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L444 ceAbstractionStarter]: At program point L9597(line 9597) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,113 INFO L444 ceAbstractionStarter]: At program point spin_lockENTRY(lines 9592 9601) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L9597-1(line 9597) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point spin_lockFINAL(lines 9592 9601) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point spin_lockEXIT(lines 9592 9601) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point if_miiENTRY(lines 6062 6069) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point if_miiFINAL(lines 6062 6069) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point if_miiEXIT(lines 6062 6069) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L451 ceAbstractionStarter]: At program point L5601(line 5601) the Hoare annotation is: true [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point L5602-1(line 5602) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point L5601-1(line 5601) no Hoare annotation was computed. [2018-11-23 15:34:37,113 INFO L448 ceAbstractionStarter]: For program point dma_alloc_attrsFINAL(lines 5570 5606) no Hoare annotation was computed. [2018-11-23 15:34:37,115 INFO L448 ceAbstractionStarter]: For program point L5594(lines 5594 5600) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point dma_alloc_attrsEXIT(lines 5570 5606) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L5589(lines 5589 5593) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L5588(line 5588) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L5583(lines 5583 5587) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L5580-1(line 5580) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point dma_alloc_attrsENTRY(lines 5570 5606) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L5583-2(lines 5583 5587) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L5580(line 5580) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L5602(line 5602) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L8027-1(line 8027) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L8027(line 8027) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L8024-1(line 8024) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point b44_haltEXIT(lines 8019 8031) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L8024(line 8024) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L8025(line 8025) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point b44_haltENTRY(lines 8019 8031) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point b44_haltFINAL(lines 8019 8031) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point netdev_privFINAL(lines 5892 5899) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point netdev_privENTRY(lines 5892 5899) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point netdev_privEXIT(lines 5892 5899) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point dev_nameEXIT(lines 5309 5322) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point dev_nameENTRY(lines 5309 5322) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point dev_nameFINAL(lines 5309 5322) no Hoare annotation was computed. [2018-11-23 15:34:37,116 INFO L451 ceAbstractionStarter]: At program point L5319(line 5319) the Hoare annotation is: true [2018-11-23 15:34:37,116 INFO L448 ceAbstractionStarter]: For program point L5319-1(line 5319) no Hoare annotation was computed. [2018-11-23 15:34:37,117 INFO L448 ceAbstractionStarter]: For program point L5314(lines 5314 5318) no Hoare annotation was computed. [2018-11-23 15:34:37,117 INFO L448 ceAbstractionStarter]: For program point L7864-1(line 7864) no Hoare annotation was computed. [2018-11-23 15:34:37,117 INFO L451 ceAbstractionStarter]: At program point L7864(line 7864) the Hoare annotation is: true [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7860-1(lines 7860 7861) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L451 ceAbstractionStarter]: At program point L7860(lines 7860 7861) the Hoare annotation is: true [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7848(lines 7848 7853) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7840(lines 7840 7844) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7873-1(line 7873) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L451 ceAbstractionStarter]: At program point L7873(line 7873) the Hoare annotation is: true [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7828(lines 7828 7832) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7820(lines 7820 7824) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7874(lines 7874 7879) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7845-1(lines 7845 7846) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L451 ceAbstractionStarter]: At program point L7845(lines 7845 7846) the Hoare annotation is: true [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7866(lines 7866 7870) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7837-2(lines 7837 7859) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7837(lines 7837 7859) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L451 ceAbstractionStarter]: At program point L7838(line 7838) the Hoare annotation is: true [2018-11-23 15:34:37,119 INFO L448 ceAbstractionStarter]: For program point L7871-1(lines 7871 7872) no Hoare annotation was computed. [2018-11-23 15:34:37,119 INFO L451 ceAbstractionStarter]: At program point L7871(lines 7871 7872) the Hoare annotation is: true [2018-11-23 15:34:37,120 INFO L451 ceAbstractionStarter]: At program point L7834(lines 7834 7835) the Hoare annotation is: true [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point b44_alloc_consistentFINAL(lines 7800 7891) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7838-1(line 7838) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7863(lines 7863 7885) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7834-1(lines 7834 7835) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L451 ceAbstractionStarter]: At program point L7826(line 7826) the Hoare annotation is: true [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7863-2(lines 7863 7885) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7888(line 7888) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7826-1(line 7826) no Hoare annotation was computed. [2018-11-23 15:34:37,120 INFO L451 ceAbstractionStarter]: At program point L7818(line 7818) the Hoare annotation is: true [2018-11-23 15:34:37,120 INFO L451 ceAbstractionStarter]: At program point b44_alloc_consistentENTRY(lines 7800 7891) the Hoare annotation is: true [2018-11-23 15:34:37,120 INFO L448 ceAbstractionStarter]: For program point L7847-1(line 7847) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point L7847(line 7847) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point b44_alloc_consistentEXIT(lines 7800 7891) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point L7818-1(line 7818) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point L7876(lines 7816 7890) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point netdev_get_tx_queueEXIT(lines 5883 5891) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point netdev_get_tx_queueENTRY(lines 5883 5891) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point netdev_get_tx_queueFINAL(lines 5883 5891) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point set_bitFINAL(lines 5129 5137) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point set_bitEXIT(lines 5129 5137) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point set_bitENTRY(lines 5129 5137) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point L8064-1(line 8064) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point L8095(line 8095) no Hoare annotation was computed. [2018-11-23 15:34:37,123 INFO L444 ceAbstractionStarter]: At program point L8064(line 8064) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point L8091(line 8091) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L451 ceAbstractionStarter]: At program point L8087-1(line 8087) the Hoare annotation is: true [2018-11-23 15:34:37,123 INFO L444 ceAbstractionStarter]: At program point L8087(line 8087) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,123 INFO L448 ceAbstractionStarter]: For program point L8085-1(lines 8085 8086) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L444 ceAbstractionStarter]: At program point L8085(lines 8085 8086) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point L8073-1(line 8073) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L444 ceAbstractionStarter]: At program point L8073(line 8073) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point L8067-1(line 8067) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L444 ceAbstractionStarter]: At program point L8067(line 8067) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point L8090(lines 8090 8094) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point b44_set_mac_addrFINAL(lines 8050 8098) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point L8088(line 8088) no Hoare annotation was computed. [2018-11-23 15:34:37,124 INFO L451 ceAbstractionStarter]: At program point L8090-1(lines 8090 8094) the Hoare annotation is: true [2018-11-23 15:34:37,124 INFO L448 ceAbstractionStarter]: For program point L8074(lines 8074 8078) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L444 ceAbstractionStarter]: At program point b44_set_mac_addrENTRY(lines 8050 8098) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point b44_set_mac_addrEXIT(lines 8050 8098) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point L8074-2(lines 8063 8097) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point L8068(lines 8068 8072) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point ssb_pcihost_set_power_stateEXIT(lines 6224 6236) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point ssb_pcihost_set_power_stateENTRY(lines 6224 6236) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point L6229-2(lines 6224 6236) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point L6229(lines 6229 6233) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point L9617(line 9617) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point spin_unlockENTRY(lines 9612 9621) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L444 ceAbstractionStarter]: At program point L9617-1(line 9617) the Hoare annotation is: (= ~ldv_spin~0 (_ bv0 32)) [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point spin_unlockFINAL(lines 9612 9621) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point spin_unlockEXIT(lines 9612 9621) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point L8318(line 8318) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point b44_setup_pseudo_magicpFINAL(lines 8280 8324) no Hoare annotation was computed. [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point L8314(line 8314) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point L8318-1(line 8318) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L451 ceAbstractionStarter]: At program point b44_setup_pseudo_magicpENTRY(lines 8280 8324) the Hoare annotation is: true [2018-11-23 15:34:37,126 INFO L448 ceAbstractionStarter]: For program point L8310(line 8310) no Hoare annotation was computed. [2018-11-23 15:34:37,127 INFO L448 ceAbstractionStarter]: For program point L8312-1(lines 8312 8313) no Hoare annotation was computed. [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8312(lines 8312 8313) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8314-1(line 8314) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8306(lines 8306 8307) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8308-1(line 8308) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8308(line 8308) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L451 ceAbstractionStarter]: At program point L8302(line 8302) the Hoare annotation is: true [2018-11-23 15:34:37,127 INFO L448 ceAbstractionStarter]: For program point L8304(line 8304) no Hoare annotation was computed. [2018-11-23 15:34:37,127 INFO L448 ceAbstractionStarter]: For program point L8306-1(lines 8306 8307) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8300-1(lines 8300 8301) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8300(lines 8300 8301) the Hoare annotation is: true [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8302-1(line 8302) the Hoare annotation is: true [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8294(lines 8294 8298) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8292-1(line 8292) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8292(line 8292) the Hoare annotation is: true [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8319(line 8319) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8321-1(line 8321) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8321(line 8321) the Hoare annotation is: true [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8315(line 8315) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L448 ceAbstractionStarter]: For program point L8311-1(line 8311) no Hoare annotation was computed. [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8311(line 8311) the Hoare annotation is: true [2018-11-23 15:34:37,129 INFO L451 ceAbstractionStarter]: At program point L8309(line 8309) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point b44_setup_pseudo_magicpEXIT(lines 8280 8324) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L8303(line 8303) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L8305-1(line 8305) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L8305(line 8305) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L8299-1(line 8299) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L8299(line 8299) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L6522(lines 6522 6526) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point b44_wait_bitFINAL(lines 6503 6550) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L6535(lines 6511 6549) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point b44_wait_bitENTRY(lines 6503 6550) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L6531(lines 6511 6549) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point b44_wait_bitEXIT(lines 6503 6550) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L451 ceAbstractionStarter]: At program point L6529(lines 6511 6549) the Hoare annotation is: true [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L6515(line 6515) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L6517(lines 6517 6521) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L6538(lines 6538 6543) no Hoare annotation was computed. [2018-11-23 15:34:37,130 INFO L448 ceAbstractionStarter]: For program point L6540-2(line 6540) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point L6540(line 6540) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point L6538-2(lines 6538 6543) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0EXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L451 ceAbstractionStarter]: At program point ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0ENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0FINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point L5823(lines 5823 5827) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L451 ceAbstractionStarter]: At program point L5822(line 5822) the Hoare annotation is: true [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point L5822-1(line 5822) no Hoare annotation was computed. [2018-11-23 15:34:37,132 INFO L448 ceAbstractionStarter]: For program point L5823-2(lines 5821 5839) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point napi_schedule_prepENTRY(lines 5814 5840) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point napi_schedule_prepFINAL(lines 5814 5840) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point napi_schedule_prepEXIT(lines 5814 5840) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L5830(lines 5830 5834) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L5829(line 5829) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L5829-1(line 5829) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L5828(lines 5828 5837) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L8350(line 8350) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L8351(lines 8351 8362) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L8352-1(line 8352) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L8352(line 8352) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L8354-1(line 8354) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point b44_setup_wolEXIT(lines 8344 8366) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point b44_setup_wolENTRY(lines 8344 8366) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point L8350-1(line 8350) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L448 ceAbstractionStarter]: For program point b44_setup_wolFINAL(lines 8344 8366) no Hoare annotation was computed. [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L8359(line 8359) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L8361-1(lines 8351 8362) the Hoare annotation is: true [2018-11-23 15:34:37,133 INFO L451 ceAbstractionStarter]: At program point L8361(line 8361) the Hoare annotation is: true [2018-11-23 15:34:37,135 INFO L451 ceAbstractionStarter]: At program point L8354(line 8354) the Hoare annotation is: true [2018-11-23 15:34:37,135 INFO L451 ceAbstractionStarter]: At program point L8356-1(line 8356) the Hoare annotation is: true [2018-11-23 15:34:37,135 INFO L451 ceAbstractionStarter]: At program point L8356(line 8356) the Hoare annotation is: true [2018-11-23 15:34:37,135 INFO L448 ceAbstractionStarter]: For program point L8357(line 8357) no Hoare annotation was computed. [2018-11-23 15:34:37,135 INFO L448 ceAbstractionStarter]: For program point test_and_clear_bitEXIT(lines 5157 5166) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point test_and_clear_bitENTRY(lines 5157 5166) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point test_and_clear_bitFINAL(lines 5157 5166) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point dma_alloc_coherent_gfp_flagsFINAL(lines 5549 5569) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5562-1(lines 5562 5566) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point L5555(line 5555) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5557-2(lines 5554 5568) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5555-1(line 5555) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5557(lines 5557 5561) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point dma_alloc_coherent_gfp_flagsENTRY(lines 5549 5569) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point dma_alloc_coherent_gfp_flagsEXIT(lines 5549 5569) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point arch_local_save_flagsFINAL(lines 5182 5214) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point L5198(lines 5198 5199) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5200(lines 5200 5207) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point arch_local_save_flagsEXIT(lines 5182 5214) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L5198-1(lines 5198 5199) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point arch_local_save_flagsENTRY(lines 5182 5214) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point L5203(lines 5200 5205) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point ssb_read32ENTRY(lines 6195 6203) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point L6200-1(line 6200) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L451 ceAbstractionStarter]: At program point L6200(line 6200) the Hoare annotation is: true [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point ssb_read32FINAL(lines 6195 6203) no Hoare annotation was computed. [2018-11-23 15:34:37,136 INFO L448 ceAbstractionStarter]: For program point ssb_read32EXIT(lines 6195 6203) no Hoare annotation was computed. [2018-11-23 15:34:37,137 INFO L448 ceAbstractionStarter]: For program point L7651-2(lines 7642 7670) no Hoare annotation was computed. [2018-11-23 15:34:37,138 INFO L448 ceAbstractionStarter]: For program point L7643-1(line 7643) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point L7643(line 7643) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L7645(lines 7645 7649) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point b44_change_mtuFINAL(lines 7635 7671) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point L7666(line 7666) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L7668(line 7668) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point L7662(line 7662) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point b44_change_mtuENTRY(lines 7635 7671) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point b44_change_mtuEXIT(lines 7635 7671) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point L7662-1(line 7662) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point L7650(line 7650) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L7650-1(line 7650) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point L7667(line 7667) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L7663(line 7663) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point L7665-1(line 7665) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point L7665(line 7665) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L7651(lines 7651 7655) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point is_device_dma_capableFINAL(lines 5343 5350) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point is_device_dma_capableEXIT(lines 5343 5350) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point is_device_dma_capableENTRY(lines 5343 5350) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L5348-2(line 5348) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point L5348(line 5348) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,139 INFO L444 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: (= ~ldv_spin~0 (_ bv0 32)) [2018-11-23 15:34:37,139 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-11-23 15:34:37,139 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-11-23 15:34:37,140 INFO L448 ceAbstractionStarter]: For program point L6848(lines 6848 6852) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L451 ceAbstractionStarter]: At program point b44_setup_phyENTRY(lines 6769 6875) the Hoare annotation is: true [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6807(lines 6807 6871) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6840-1(line 6840) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L451 ceAbstractionStarter]: At program point L6840(line 6840) the Hoare annotation is: true [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6865(lines 6865 6869) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6824-2(lines 6824 6828) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6824(lines 6824 6828) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6783-1(line 6783) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L451 ceAbstractionStarter]: At program point L6783(line 6783) the Hoare annotation is: true [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6841(lines 6841 6845) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6784(lines 6784 6788) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6809-2(lines 6809 6813) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6809(lines 6809 6813) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6834(line 6834) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6801-1(line 6801) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L451 ceAbstractionStarter]: At program point L6801(line 6801) the Hoare annotation is: true [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6859(lines 6859 6863) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6859-2(lines 6859 6863) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6777-1(line 6777) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L451 ceAbstractionStarter]: At program point L6777(line 6777) the Hoare annotation is: true [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6802(lines 6802 6806) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point L6835(lines 6835 6839) no Hoare annotation was computed. [2018-11-23 15:34:37,142 INFO L448 ceAbstractionStarter]: For program point b44_setup_phyFINAL(lines 6769 6875) no Hoare annotation was computed. [2018-11-23 15:34:37,143 INFO L448 ceAbstractionStarter]: For program point L6819(lines 6819 6823) no Hoare annotation was computed. [2018-11-23 15:34:37,143 INFO L448 ceAbstractionStarter]: For program point L6819-2(lines 6819 6823) no Hoare annotation was computed. [2018-11-23 15:34:37,143 INFO L448 ceAbstractionStarter]: For program point L6778(lines 6778 6782) no Hoare annotation was computed. [2018-11-23 15:34:37,143 INFO L448 ceAbstractionStarter]: For program point L6795-1(line 6795) no Hoare annotation was computed. [2018-11-23 15:34:37,143 INFO L451 ceAbstractionStarter]: At program point L6795(line 6795) the Hoare annotation is: true [2018-11-23 15:34:37,143 INFO L448 ceAbstractionStarter]: For program point b44_setup_phyEXIT(lines 6769 6875) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6870(line 6870) the Hoare annotation is: true [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6870-1(lines 6776 6874) the Hoare annotation is: true [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6829-2(lines 6829 6833) the Hoare annotation is: true [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6796(lines 6796 6800) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6829(lines 6829 6833) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6854(lines 6854 6858) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6854-2(lines 6854 6858) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6789-1(line 6789) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6789(line 6789) the Hoare annotation is: true [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6814(lines 6814 6818) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6847-1(line 6847) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6847(line 6847) the Hoare annotation is: true [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6814-2(lines 6814 6818) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L448 ceAbstractionStarter]: For program point L6864-1(line 6864) no Hoare annotation was computed. [2018-11-23 15:34:37,145 INFO L451 ceAbstractionStarter]: At program point L6864(line 6864) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point L6790(lines 6790 6794) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L451 ceAbstractionStarter]: At program point L6615-1(line 6615) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point __b44_writephyEXIT(lines 6610 6620) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L451 ceAbstractionStarter]: At program point L6615(line 6615) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L451 ceAbstractionStarter]: At program point L6616(line 6616) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point L6617(line 6617) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L451 ceAbstractionStarter]: At program point __b44_writephyENTRY(lines 6610 6620) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point __b44_writephyFINAL(lines 6610 6620) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L451 ceAbstractionStarter]: At program point b44_pci_initENTRY(lines 9292 9301) the Hoare annotation is: true [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point b44_pci_initEXIT(lines 9292 9301) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point b44_pci_initFINAL(lines 9292 9301) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point L8828(lines 8828 8832) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point b44_set_pauseparamFINAL(lines 8814 8849) no Hoare annotation was computed. [2018-11-23 15:34:37,146 INFO L448 ceAbstractionStarter]: For program point L8828-2(lines 8828 8832) no Hoare annotation was computed. [2018-11-23 15:34:37,148 INFO L448 ceAbstractionStarter]: For program point L8822-1(line 8822) no Hoare annotation was computed. [2018-11-23 15:34:37,148 INFO L444 ceAbstractionStarter]: At program point L8820(line 8820) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,148 INFO L448 ceAbstractionStarter]: For program point L8820-1(line 8820) no Hoare annotation was computed. [2018-11-23 15:34:37,148 INFO L444 ceAbstractionStarter]: At program point L8822(line 8822) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,148 INFO L444 ceAbstractionStarter]: At program point L8845(line 8845) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,148 INFO L451 ceAbstractionStarter]: At program point L8843(line 8843) the Hoare annotation is: true [2018-11-23 15:34:37,148 INFO L448 ceAbstractionStarter]: For program point L8843-1(line 8843) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L451 ceAbstractionStarter]: At program point L8839(line 8839) the Hoare annotation is: true [2018-11-23 15:34:37,149 INFO L451 ceAbstractionStarter]: At program point L8839-1(line 8839) the Hoare annotation is: true [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8833(lines 8833 8837) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point b44_set_pauseparamEXIT(lines 8814 8849) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8833-2(lines 8833 8837) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8823-2(lines 8823 8827) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8823(lines 8823 8827) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8846(line 8846) no Hoare annotation was computed. [2018-11-23 15:34:37,149 INFO L451 ceAbstractionStarter]: At program point L8838-1(lines 8838 8844) the Hoare annotation is: true [2018-11-23 15:34:37,149 INFO L444 ceAbstractionStarter]: At program point b44_set_pauseparamENTRY(lines 8814 8849) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| (_ bv0 32))) (= ~ldv_spin~0 (_ bv0 32))) [2018-11-23 15:34:37,149 INFO L451 ceAbstractionStarter]: At program point L8840(line 8840) the Hoare annotation is: true [2018-11-23 15:34:37,149 INFO L448 ceAbstractionStarter]: For program point L8838(lines 8838 8844) no Hoare annotation was computed. [2018-11-23 15:34:37,163 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:34:37 BoogieIcfgContainer [2018-11-23 15:34:37,163 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 15:34:37,163 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 15:34:37,163 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 15:34:37,163 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 15:34:37,164 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:34:27" (3/4) ... [2018-11-23 15:34:37,166 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure get_dma_ops [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_lock_irq_4 [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_unlock_5 [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_invariants [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure skb_copy_from_linear_data [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_set_flow_ctrl [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_set_drvdata [2018-11-23 15:34:37,177 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~~dma_addr_t~0~TO~C_INT [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_tx_wake_queue [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_init_rings [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure alloc_skb [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure napi_disable_pending [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_wol [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_free_attrs [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netdev_alloc_skb [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_readphy [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_tx_start_queue [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_alloc_skb_21 [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_set_rx_mode [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_free_consistent [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_enable_ints [2018-11-23 15:34:37,178 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_open [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_interrupt [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure request_irq [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_alloc_coherent_mask [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_wake_queue [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure #Ultimate.C_memcpy [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_start_xmit [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_lock [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_sync_single_for_device [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_wol [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure constant_test_bit [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_cleanup [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_check_alloc_flags [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure kmemcheck_mark_initialized [2018-11-23 15:34:37,179 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_init_one [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure pci_read_config_word [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_magic_pattern [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure u64_stats_update_begin [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_stats64 [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_write32 [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_load_mcast [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_timer [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_get_drvdata [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_pcihost_unregister [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_settings [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_clear_stats [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~TO~VOID [2018-11-23 15:34:37,180 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_error [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_disable_ints [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_rx_mode [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_settings [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure bw32 [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_drvinfo [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_carrier_ok [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure kobject_name [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_msg_init [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ethtool_cmd_speed_set [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure valid_dma_direction [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure clear_bit [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_unlock_irq [2018-11-23 15:34:37,181 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure napi_enable [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv__builtin_expect [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure #Ultimate.C_memset [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_set_coherent_mask [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_msglevel [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~C_UINT~X~C_INT~X~$Pointer$~TO~VOID [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~~u16~0~X~~u32~0~TO~VOID [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure bwfilter_table [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_stop_queue [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure pci_name [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_setup_wol_pci [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure u64_stats_fetch_retry_bh [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure test_and_set_bit [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_sync_dma_desc_for_device [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spinlock_check [2018-11-23 15:34:37,182 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_map_single_attrs [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~~u16~0~TO~~u32~0 [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_disable_ints [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure br32 [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_ringparam [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure is_valid_ether_addr [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure is_multicast_ether_addr [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_poll_controller [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_unmap_single_attrs [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_ethtool_stats [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_start_queue [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_msglevel [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_pauseparam [2018-11-23 15:34:37,183 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_check_phy [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_lock_irq [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_ringparam [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_running [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netif_tx_stop_queue [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_unlock_irqrestore_8 [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_get_cache_alignment [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_unlock [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_cam_write [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure arch_irqs_disabled_flags [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_close [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_tx_timeout [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_unlock_irqrestore [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_readphy [2018-11-23 15:34:37,184 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_phy_reset [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv___netdev_alloc_skb_28 [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_wap54g10_workaround [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_unlock_irq_7 [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure is_zero_ether_addr [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_sset_count [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_lock_1 [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_nway_reset [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_alloc_rx_skb [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_get_strings [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure pci_write_config_word [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_writephy [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure napi_disable [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ethtool_cmd_speed [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_pci_exit [2018-11-23 15:34:37,185 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_chip_reset [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_link_report [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_flow_ctrl [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_init_hw [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_remove_one [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_set_mac_addr [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_init [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_ioctl [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_resume [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure kzalloc [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_suspend [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_mapping_error [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_stats_update [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_free_rings [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure u64_stats_fetch_begin_bh [2018-11-23 15:34:37,186 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_lock [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure if_mii [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_alloc_attrs [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_halt [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netdev_priv [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dev_name [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_alloc_consistent [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure netdev_get_tx_queue [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure set_bit [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_mac_addr [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_pcihost_set_power_state [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_unlock [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_setup_pseudo_magicp [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_wait_bit [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ##fun~$Pointer$~X~$Pointer$~X~C_ULONG~X~C_UINT~X~C_INT~X~$Pointer$~TO~~dma_addr_t~0 [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure napi_schedule_prep [2018-11-23 15:34:37,187 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_setup_wol [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure test_and_clear_bit [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure dma_alloc_coherent_gfp_flags [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure arch_local_save_flags [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ssb_read32 [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_change_mtu [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure is_device_dma_capable [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_setup_phy [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __b44_writephy [2018-11-23 15:34:37,188 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_pci_init [2018-11-23 15:34:37,189 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure b44_set_pauseparam [2018-11-23 15:34:37,250 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 924 nodes and edges [2018-11-23 15:34:37,255 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 368 nodes and edges [2018-11-23 15:34:37,259 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 153 nodes and edges [2018-11-23 15:34:37,264 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 66 nodes and edges [2018-11-23 15:34:37,268 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 32 nodes and edges [2018-11-23 15:34:37,270 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 16 nodes and edges [2018-11-23 15:34:37,272 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 8 nodes and edges [2018-11-23 15:34:37,274 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 3 nodes and edges [2018-11-23 15:34:37,276 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-11-23 15:34:37,278 INFO L879 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-11-23 15:34:37,304 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,304 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,304 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,304 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,307 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,308 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,309 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,310 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 [2018-11-23 15:34:37,583 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_06fab9f6-64b6-46b7-a479-7f86ed2d96c4/bin-2019/uautomizer/witness.graphml [2018-11-23 15:34:37,583 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 15:34:37,584 INFO L168 Benchmark]: Toolchain (without parser) took 39336.98 ms. Allocated memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: 1.9 GB). Free memory was 938.4 MB in the beginning and 2.5 GB in the end (delta: -1.6 GB). Peak memory consumption was 302.8 MB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,585 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:34:37,585 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2583.63 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 938.4 MB in the beginning and 810.0 MB in the end (delta: 128.4 MB). Peak memory consumption was 297.0 MB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,585 INFO L168 Benchmark]: Boogie Procedure Inliner took 75.35 ms. Allocated memory is still 1.2 GB. Free memory was 810.0 MB in the beginning and 804.3 MB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,585 INFO L168 Benchmark]: Boogie Preprocessor took 178.37 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 111.7 MB). Free memory was 804.3 MB in the beginning and 1.2 GB in the end (delta: -376.4 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,585 INFO L168 Benchmark]: RCFGBuilder took 26697.76 ms. Allocated memory was 1.3 GB in the beginning and 2.9 GB in the end (delta: 1.6 GB). Free memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: -1.3 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,586 INFO L168 Benchmark]: TraceAbstraction took 9378.63 ms. Allocated memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 36.7 MB). Free memory was 2.5 GB in the beginning and 2.6 GB in the end (delta: -133.7 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,586 INFO L168 Benchmark]: Witness Printer took 419.74 ms. Allocated memory is still 2.9 GB. Free memory was 2.6 GB in the beginning and 2.5 GB in the end (delta: 116.3 MB). Peak memory consumption was 116.3 MB. Max. memory is 11.5 GB. [2018-11-23 15:34:37,587 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 2583.63 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 938.4 MB in the beginning and 810.0 MB in the end (delta: 128.4 MB). Peak memory consumption was 297.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 75.35 ms. Allocated memory is still 1.2 GB. Free memory was 810.0 MB in the beginning and 804.3 MB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 178.37 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 111.7 MB). Free memory was 804.3 MB in the beginning and 1.2 GB in the end (delta: -376.4 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 26697.76 ms. Allocated memory was 1.3 GB in the beginning and 2.9 GB in the end (delta: 1.6 GB). Free memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: -1.3 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. * TraceAbstraction took 9378.63 ms. Allocated memory was 2.9 GB in the beginning and 2.9 GB in the end (delta: 36.7 MB). Free memory was 2.5 GB in the beginning and 2.6 GB in the end (delta: -133.7 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 419.74 ms. Allocated memory is still 2.9 GB. Free memory was 2.6 GB in the beginning and 2.5 GB in the end (delta: 116.3 MB). Peak memory consumption was 116.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 9762]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 7816]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8897]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 7896]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8491]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8196]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9076]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7537]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5846]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8986]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6887]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8443]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9392]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 7896]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8443]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7467]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5200]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6887]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5395]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9392]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 5426]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8897]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 6511]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8850]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9076]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9392]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 7896]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8491]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7941]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6511]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9392]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 7896]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5870]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5492]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8897]: Loop Invariant Derived loop invariant: !(\old(ldv_spin) == 0bv32) || ldv_spin == 0bv32 - InvariantResult [Line: 7537]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8196]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6511]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7728]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8560]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8402]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8224]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6887]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 5846]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6776]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 8443]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 6887]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7728]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 9076]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7677]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 7723]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 165 procedures, 1728 locations, 1 error locations. SAFE Result, 9.3s OverallTime, 4 OverallIterations, 5 TraceHistogramMax, 0.7s AutomataDifference, 0.0s DeadEndRemovalTime, 2.5s HoareAnnotationTime, HoareTripleCheckerStatistics: 9878 SDtfs, 1943 SDslu, 26623 SDs, 0 SdLazy, 61 SolverSat, 8 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 480 GetRequests, 464 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2338occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 4 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 701 LocationsWithAnnotation, 6029 PreInvPairs, 6185 NumberOfFragments, 1657 HoareAnnotationTreeSize, 6029 FomulaSimplifications, 0 FormulaSimplificationTreeSizeReduction, 0.6s HoareSimplificationTime, 701 FomulaSimplificationsInter, 3293 FormulaSimplificationTreeSizeReductionInter, 1.7s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 4.0s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 480 NumberOfCodeBlocks, 480 NumberOfCodeBlocksAsserted, 4 NumberOfCheckSat, 476 ConstructedInterpolants, 0 QuantifiedInterpolants, 73546 SizeOfPredicates, 8 NumberOfNonLiveVariables, 10241 ConjunctsInSsa, 19 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 65/65 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...