./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_rmo.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_rmo.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e42b6a2a35cef26e55b291e79df7165f23d753e1 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 08:55:59,908 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 08:55:59,909 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 08:55:59,915 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 08:55:59,916 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 08:55:59,916 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 08:55:59,917 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 08:55:59,919 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 08:55:59,920 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 08:55:59,921 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 08:55:59,921 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 08:55:59,922 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 08:55:59,922 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 08:55:59,923 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 08:55:59,924 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 08:55:59,925 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 08:55:59,925 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 08:55:59,926 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 08:55:59,928 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 08:55:59,929 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 08:55:59,930 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 08:55:59,931 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 08:55:59,932 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 08:55:59,933 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 08:55:59,933 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 08:55:59,934 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 08:55:59,934 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 08:55:59,935 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 08:55:59,935 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 08:55:59,936 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 08:55:59,936 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 08:55:59,937 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 08:55:59,937 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 08:55:59,937 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 08:55:59,938 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 08:55:59,938 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 08:55:59,939 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 08:55:59,949 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 08:55:59,949 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 08:55:59,950 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 08:55:59,950 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 08:55:59,950 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 08:55:59,950 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 08:55:59,951 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 08:55:59,951 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 08:55:59,952 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 08:55:59,952 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 08:55:59,953 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 08:55:59,953 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 08:55:59,953 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 08:55:59,953 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 08:55:59,953 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 08:55:59,953 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 08:55:59,954 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 08:55:59,954 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 08:55:59,954 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 08:55:59,954 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 08:55:59,954 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e42b6a2a35cef26e55b291e79df7165f23d753e1 [2018-11-23 08:55:59,974 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 08:55:59,982 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 08:55:59,984 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 08:55:59,985 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 08:55:59,985 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 08:55:59,986 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_rmo.opt_false-unreach-call.i [2018-11-23 08:56:00,022 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/data/e14a9bbef/b4e8cf0d780548378f3127252dbb638e/FLAGaa16f0e96 [2018-11-23 08:56:00,387 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 08:56:00,387 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/sv-benchmarks/c/pthread-wmm/mix045_rmo.opt_false-unreach-call.i [2018-11-23 08:56:00,400 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/data/e14a9bbef/b4e8cf0d780548378f3127252dbb638e/FLAGaa16f0e96 [2018-11-23 08:56:00,410 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/data/e14a9bbef/b4e8cf0d780548378f3127252dbb638e [2018-11-23 08:56:00,412 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 08:56:00,413 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 08:56:00,414 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 08:56:00,414 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 08:56:00,416 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 08:56:00,417 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,418 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c7f8f5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00, skipping insertion in model container [2018-11-23 08:56:00,418 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,425 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 08:56:00,457 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 08:56:00,707 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:56:00,717 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 08:56:00,818 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:56:00,866 INFO L195 MainTranslator]: Completed translation [2018-11-23 08:56:00,867 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00 WrapperNode [2018-11-23 08:56:00,867 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 08:56:00,867 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 08:56:00,867 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 08:56:00,868 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 08:56:00,874 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,887 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,913 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 08:56:00,913 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 08:56:00,913 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 08:56:00,914 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 08:56:00,920 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,921 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,924 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,924 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,932 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,936 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,938 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... [2018-11-23 08:56:00,942 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 08:56:00,942 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 08:56:00,942 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 08:56:00,942 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 08:56:00,943 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 08:56:00,991 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 08:56:00,992 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 08:56:00,992 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 08:56:00,992 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-23 08:56:00,993 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-23 08:56:00,993 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 08:56:00,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 08:56:00,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 08:56:00,994 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 08:56:01,449 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 08:56:01,449 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 08:56:01,449 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:56:01 BoogieIcfgContainer [2018-11-23 08:56:01,449 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 08:56:01,450 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 08:56:01,450 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 08:56:01,453 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 08:56:01,453 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 08:56:00" (1/3) ... [2018-11-23 08:56:01,454 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19a4d5ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 08:56:01, skipping insertion in model container [2018-11-23 08:56:01,454 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:56:00" (2/3) ... [2018-11-23 08:56:01,454 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19a4d5ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 08:56:01, skipping insertion in model container [2018-11-23 08:56:01,454 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:56:01" (3/3) ... [2018-11-23 08:56:01,456 INFO L112 eAbstractionObserver]: Analyzing ICFG mix045_rmo.opt_false-unreach-call.i [2018-11-23 08:56:01,488 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,489 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,489 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,489 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,489 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,489 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,490 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,490 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,490 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,490 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,490 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,491 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,492 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,493 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,497 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,498 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,499 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,500 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,501 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,502 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 08:56:01,513 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 08:56:01,513 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 08:56:01,520 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 08:56:01,535 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 08:56:01,557 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 08:56:01,558 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 08:56:01,558 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 08:56:01,558 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 08:56:01,558 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 08:56:01,559 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 08:56:01,559 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 08:56:01,559 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 08:56:01,559 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 08:56:01,570 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 157places, 194 transitions [2018-11-23 08:56:19,882 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 128914 states. [2018-11-23 08:56:19,884 INFO L276 IsEmpty]: Start isEmpty. Operand 128914 states. [2018-11-23 08:56:19,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-23 08:56:19,892 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:56:19,892 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:56:19,894 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:56:19,899 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:56:19,900 INFO L82 PathProgramCache]: Analyzing trace with hash 1531198028, now seen corresponding path program 1 times [2018-11-23 08:56:19,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:56:19,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:56:19,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:19,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:56:19,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:19,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:56:20,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:56:20,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:56:20,096 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:56:20,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:56:20,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:56:20,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:56:20,114 INFO L87 Difference]: Start difference. First operand 128914 states. Second operand 4 states. [2018-11-23 08:56:23,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:56:23,899 INFO L93 Difference]: Finished difference Result 233474 states and 1098326 transitions. [2018-11-23 08:56:23,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 08:56:23,901 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-23 08:56:23,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:56:24,650 INFO L225 Difference]: With dead ends: 233474 [2018-11-23 08:56:24,650 INFO L226 Difference]: Without dead ends: 203724 [2018-11-23 08:56:24,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:56:25,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203724 states. [2018-11-23 08:56:28,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203724 to 118894. [2018-11-23 08:56:28,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118894 states. [2018-11-23 08:56:28,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118894 states to 118894 states and 559777 transitions. [2018-11-23 08:56:28,747 INFO L78 Accepts]: Start accepts. Automaton has 118894 states and 559777 transitions. Word has length 45 [2018-11-23 08:56:28,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:56:28,749 INFO L480 AbstractCegarLoop]: Abstraction has 118894 states and 559777 transitions. [2018-11-23 08:56:28,749 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:56:28,749 INFO L276 IsEmpty]: Start isEmpty. Operand 118894 states and 559777 transitions. [2018-11-23 08:56:28,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 08:56:28,759 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:56:28,762 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:56:28,762 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:56:28,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:56:28,763 INFO L82 PathProgramCache]: Analyzing trace with hash -834891017, now seen corresponding path program 1 times [2018-11-23 08:56:28,763 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:56:28,763 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:56:28,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:28,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:56:28,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:28,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:56:28,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:56:28,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:56:28,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:56:28,835 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 08:56:28,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:56:28,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:56:28,836 INFO L87 Difference]: Start difference. First operand 118894 states and 559777 transitions. Second operand 3 states. [2018-11-23 08:56:30,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:56:30,259 INFO L93 Difference]: Finished difference Result 118894 states and 557817 transitions. [2018-11-23 08:56:30,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:56:30,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2018-11-23 08:56:30,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:56:30,659 INFO L225 Difference]: With dead ends: 118894 [2018-11-23 08:56:30,659 INFO L226 Difference]: Without dead ends: 118894 [2018-11-23 08:56:30,660 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:56:31,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118894 states. [2018-11-23 08:56:36,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118894 to 118894. [2018-11-23 08:56:36,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118894 states. [2018-11-23 08:56:36,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118894 states to 118894 states and 557817 transitions. [2018-11-23 08:56:36,844 INFO L78 Accepts]: Start accepts. Automaton has 118894 states and 557817 transitions. Word has length 52 [2018-11-23 08:56:36,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:56:36,844 INFO L480 AbstractCegarLoop]: Abstraction has 118894 states and 557817 transitions. [2018-11-23 08:56:36,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 08:56:36,845 INFO L276 IsEmpty]: Start isEmpty. Operand 118894 states and 557817 transitions. [2018-11-23 08:56:36,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 08:56:36,848 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:56:36,848 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:56:36,848 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:56:36,848 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:56:36,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1663124920, now seen corresponding path program 1 times [2018-11-23 08:56:36,849 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:56:36,849 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:56:36,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:36,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:56:36,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:36,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:56:36,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:56:36,926 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:56:36,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:56:36,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:56:36,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:56:36,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:56:36,927 INFO L87 Difference]: Start difference. First operand 118894 states and 557817 transitions. Second operand 5 states. [2018-11-23 08:56:38,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:56:38,860 INFO L93 Difference]: Finished difference Result 325274 states and 1468251 transitions. [2018-11-23 08:56:38,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 08:56:38,861 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2018-11-23 08:56:38,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:56:39,832 INFO L225 Difference]: With dead ends: 325274 [2018-11-23 08:56:39,832 INFO L226 Difference]: Without dead ends: 324274 [2018-11-23 08:56:39,832 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:56:42,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324274 states. [2018-11-23 08:56:50,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324274 to 186424. [2018-11-23 08:56:50,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186424 states. [2018-11-23 08:56:51,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186424 states to 186424 states and 840916 transitions. [2018-11-23 08:56:51,535 INFO L78 Accepts]: Start accepts. Automaton has 186424 states and 840916 transitions. Word has length 52 [2018-11-23 08:56:51,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:56:51,536 INFO L480 AbstractCegarLoop]: Abstraction has 186424 states and 840916 transitions. [2018-11-23 08:56:51,536 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:56:51,536 INFO L276 IsEmpty]: Start isEmpty. Operand 186424 states and 840916 transitions. [2018-11-23 08:56:51,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 08:56:51,543 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:56:51,543 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:56:51,543 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:56:51,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:56:51,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1719302045, now seen corresponding path program 1 times [2018-11-23 08:56:51,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:56:51,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:56:51,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:51,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:56:51,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:56:51,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:56:51,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:56:51,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:56:51,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:56:51,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:56:51,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:56:51,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:56:51,623 INFO L87 Difference]: Start difference. First operand 186424 states and 840916 transitions. Second operand 5 states. [2018-11-23 08:56:53,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:56:53,160 INFO L93 Difference]: Finished difference Result 334054 states and 1500995 transitions. [2018-11-23 08:56:53,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 08:56:53,160 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-11-23 08:56:53,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:56:55,021 INFO L225 Difference]: With dead ends: 334054 [2018-11-23 08:56:55,021 INFO L226 Difference]: Without dead ends: 333004 [2018-11-23 08:56:55,021 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:56:56,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333004 states. [2018-11-23 08:57:05,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333004 to 194884. [2018-11-23 08:57:05,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194884 states. [2018-11-23 08:57:06,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194884 states to 194884 states and 876474 transitions. [2018-11-23 08:57:06,065 INFO L78 Accepts]: Start accepts. Automaton has 194884 states and 876474 transitions. Word has length 53 [2018-11-23 08:57:06,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:06,065 INFO L480 AbstractCegarLoop]: Abstraction has 194884 states and 876474 transitions. [2018-11-23 08:57:06,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:57:06,066 INFO L276 IsEmpty]: Start isEmpty. Operand 194884 states and 876474 transitions. [2018-11-23 08:57:06,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-23 08:57:06,094 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:06,094 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:06,095 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:06,095 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:06,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1090824439, now seen corresponding path program 1 times [2018-11-23 08:57:06,095 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:06,095 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:06,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:06,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:06,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:06,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:06,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:06,168 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:06,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:57:06,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 08:57:06,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:57:06,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:57:06,169 INFO L87 Difference]: Start difference. First operand 194884 states and 876474 transitions. Second operand 3 states. [2018-11-23 08:57:07,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:07,543 INFO L93 Difference]: Finished difference Result 194884 states and 876429 transitions. [2018-11-23 08:57:07,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:57:07,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2018-11-23 08:57:07,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:08,007 INFO L225 Difference]: With dead ends: 194884 [2018-11-23 08:57:08,007 INFO L226 Difference]: Without dead ends: 194884 [2018-11-23 08:57:08,007 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:57:09,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194884 states. [2018-11-23 08:57:13,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194884 to 194884. [2018-11-23 08:57:13,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194884 states. [2018-11-23 08:57:13,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194884 states to 194884 states and 876429 transitions. [2018-11-23 08:57:13,921 INFO L78 Accepts]: Start accepts. Automaton has 194884 states and 876429 transitions. Word has length 60 [2018-11-23 08:57:13,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:13,921 INFO L480 AbstractCegarLoop]: Abstraction has 194884 states and 876429 transitions. [2018-11-23 08:57:13,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 08:57:13,921 INFO L276 IsEmpty]: Start isEmpty. Operand 194884 states and 876429 transitions. [2018-11-23 08:57:13,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-23 08:57:13,944 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:13,944 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:13,945 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:13,945 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:13,945 INFO L82 PathProgramCache]: Analyzing trace with hash 651985896, now seen corresponding path program 1 times [2018-11-23 08:57:13,945 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:13,945 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:13,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:13,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:13,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:13,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:14,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:14,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:14,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:57:14,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:57:14,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:57:14,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:57:14,002 INFO L87 Difference]: Start difference. First operand 194884 states and 876429 transitions. Second operand 4 states. [2018-11-23 08:57:15,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:15,695 INFO L93 Difference]: Finished difference Result 172220 states and 761291 transitions. [2018-11-23 08:57:15,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:57:15,695 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-23 08:57:15,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:16,091 INFO L225 Difference]: With dead ends: 172220 [2018-11-23 08:57:16,091 INFO L226 Difference]: Without dead ends: 169615 [2018-11-23 08:57:16,091 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:16,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169615 states. [2018-11-23 08:57:23,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169615 to 169615. [2018-11-23 08:57:23,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169615 states. [2018-11-23 08:57:24,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169615 states to 169615 states and 752619 transitions. [2018-11-23 08:57:24,265 INFO L78 Accepts]: Start accepts. Automaton has 169615 states and 752619 transitions. Word has length 60 [2018-11-23 08:57:24,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:24,265 INFO L480 AbstractCegarLoop]: Abstraction has 169615 states and 752619 transitions. [2018-11-23 08:57:24,266 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:57:24,266 INFO L276 IsEmpty]: Start isEmpty. Operand 169615 states and 752619 transitions. [2018-11-23 08:57:24,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-23 08:57:24,290 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:24,291 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:24,291 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:24,291 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:24,291 INFO L82 PathProgramCache]: Analyzing trace with hash 391005726, now seen corresponding path program 1 times [2018-11-23 08:57:24,291 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:24,291 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:24,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:24,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:24,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:24,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:24,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:24,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:24,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:57:24,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:57:24,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:57:24,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:24,373 INFO L87 Difference]: Start difference. First operand 169615 states and 752619 transitions. Second operand 5 states. [2018-11-23 08:57:24,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:24,616 INFO L93 Difference]: Finished difference Result 59119 states and 239395 transitions. [2018-11-23 08:57:24,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 08:57:24,617 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2018-11-23 08:57:24,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:24,733 INFO L225 Difference]: With dead ends: 59119 [2018-11-23 08:57:24,733 INFO L226 Difference]: Without dead ends: 56807 [2018-11-23 08:57:24,734 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:24,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56807 states. [2018-11-23 08:57:25,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56807 to 56807. [2018-11-23 08:57:25,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56807 states. [2018-11-23 08:57:25,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56807 states to 56807 states and 230741 transitions. [2018-11-23 08:57:25,603 INFO L78 Accepts]: Start accepts. Automaton has 56807 states and 230741 transitions. Word has length 61 [2018-11-23 08:57:25,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:25,604 INFO L480 AbstractCegarLoop]: Abstraction has 56807 states and 230741 transitions. [2018-11-23 08:57:25,604 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:57:25,604 INFO L276 IsEmpty]: Start isEmpty. Operand 56807 states and 230741 transitions. [2018-11-23 08:57:25,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-23 08:57:25,613 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:25,613 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:25,614 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:25,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:25,614 INFO L82 PathProgramCache]: Analyzing trace with hash -393962470, now seen corresponding path program 1 times [2018-11-23 08:57:25,614 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:25,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:25,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:25,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:25,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:25,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:25,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:25,665 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:25,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:57:25,665 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:57:25,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:57:25,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:57:25,665 INFO L87 Difference]: Start difference. First operand 56807 states and 230741 transitions. Second operand 4 states. [2018-11-23 08:57:26,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:26,822 INFO L93 Difference]: Finished difference Result 78971 states and 316066 transitions. [2018-11-23 08:57:26,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:57:26,823 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2018-11-23 08:57:26,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:26,993 INFO L225 Difference]: With dead ends: 78971 [2018-11-23 08:57:26,994 INFO L226 Difference]: Without dead ends: 78971 [2018-11-23 08:57:26,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:27,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78971 states. [2018-11-23 08:57:27,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78971 to 61563. [2018-11-23 08:57:27,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61563 states. [2018-11-23 08:57:28,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61563 states to 61563 states and 248434 transitions. [2018-11-23 08:57:28,069 INFO L78 Accepts]: Start accepts. Automaton has 61563 states and 248434 transitions. Word has length 67 [2018-11-23 08:57:28,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:28,069 INFO L480 AbstractCegarLoop]: Abstraction has 61563 states and 248434 transitions. [2018-11-23 08:57:28,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:57:28,069 INFO L276 IsEmpty]: Start isEmpty. Operand 61563 states and 248434 transitions. [2018-11-23 08:57:28,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-23 08:57:28,082 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:28,082 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:28,083 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:28,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:28,083 INFO L82 PathProgramCache]: Analyzing trace with hash 1348847865, now seen corresponding path program 1 times [2018-11-23 08:57:28,083 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:28,083 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:28,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:28,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:28,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:28,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:28,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:28,142 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:28,142 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:57:28,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:57:28,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:57:28,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:57:28,142 INFO L87 Difference]: Start difference. First operand 61563 states and 248434 transitions. Second operand 4 states. [2018-11-23 08:57:28,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:28,772 INFO L93 Difference]: Finished difference Result 85638 states and 341484 transitions. [2018-11-23 08:57:28,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 08:57:28,772 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2018-11-23 08:57:28,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:29,243 INFO L225 Difference]: With dead ends: 85638 [2018-11-23 08:57:29,243 INFO L226 Difference]: Without dead ends: 85638 [2018-11-23 08:57:29,243 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:29,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85638 states. [2018-11-23 08:57:30,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85638 to 77175. [2018-11-23 08:57:30,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77175 states. [2018-11-23 08:57:30,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77175 states to 77175 states and 309663 transitions. [2018-11-23 08:57:30,523 INFO L78 Accepts]: Start accepts. Automaton has 77175 states and 309663 transitions. Word has length 67 [2018-11-23 08:57:30,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:30,523 INFO L480 AbstractCegarLoop]: Abstraction has 77175 states and 309663 transitions. [2018-11-23 08:57:30,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:57:30,523 INFO L276 IsEmpty]: Start isEmpty. Operand 77175 states and 309663 transitions. [2018-11-23 08:57:30,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-23 08:57:30,539 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:30,539 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:30,539 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:30,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:30,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1560198778, now seen corresponding path program 1 times [2018-11-23 08:57:30,539 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:30,540 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:30,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:30,541 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:30,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:30,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:30,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:30,638 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:30,638 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:57:30,638 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:57:30,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:57:30,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:30,639 INFO L87 Difference]: Start difference. First operand 77175 states and 309663 transitions. Second operand 6 states. [2018-11-23 08:57:31,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:31,768 INFO L93 Difference]: Finished difference Result 119285 states and 470917 transitions. [2018-11-23 08:57:31,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:57:31,769 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2018-11-23 08:57:31,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:32,049 INFO L225 Difference]: With dead ends: 119285 [2018-11-23 08:57:32,049 INFO L226 Difference]: Without dead ends: 119285 [2018-11-23 08:57:32,049 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:57:32,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119285 states. [2018-11-23 08:57:33,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119285 to 77129. [2018-11-23 08:57:33,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77129 states. [2018-11-23 08:57:34,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77129 states to 77129 states and 303415 transitions. [2018-11-23 08:57:34,174 INFO L78 Accepts]: Start accepts. Automaton has 77129 states and 303415 transitions. Word has length 67 [2018-11-23 08:57:34,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:34,174 INFO L480 AbstractCegarLoop]: Abstraction has 77129 states and 303415 transitions. [2018-11-23 08:57:34,174 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:57:34,174 INFO L276 IsEmpty]: Start isEmpty. Operand 77129 states and 303415 transitions. [2018-11-23 08:57:34,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-23 08:57:34,185 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:34,185 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:34,186 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:34,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:34,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1054640153, now seen corresponding path program 1 times [2018-11-23 08:57:34,186 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:34,186 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:34,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:34,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:34,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:34,266 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:34,266 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:57:34,266 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:57:34,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:57:34,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:34,267 INFO L87 Difference]: Start difference. First operand 77129 states and 303415 transitions. Second operand 6 states. [2018-11-23 08:57:34,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:34,337 INFO L93 Difference]: Finished difference Result 13017 states and 43647 transitions. [2018-11-23 08:57:34,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:57:34,338 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2018-11-23 08:57:34,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:34,354 INFO L225 Difference]: With dead ends: 13017 [2018-11-23 08:57:34,355 INFO L226 Difference]: Without dead ends: 11037 [2018-11-23 08:57:34,355 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-23 08:57:34,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11037 states. [2018-11-23 08:57:34,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11037 to 10667. [2018-11-23 08:57:34,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10667 states. [2018-11-23 08:57:34,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10667 states to 10667 states and 35774 transitions. [2018-11-23 08:57:34,496 INFO L78 Accepts]: Start accepts. Automaton has 10667 states and 35774 transitions. Word has length 67 [2018-11-23 08:57:34,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:34,497 INFO L480 AbstractCegarLoop]: Abstraction has 10667 states and 35774 transitions. [2018-11-23 08:57:34,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:57:34,497 INFO L276 IsEmpty]: Start isEmpty. Operand 10667 states and 35774 transitions. [2018-11-23 08:57:34,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:34,508 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:34,508 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:34,508 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:34,509 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:34,509 INFO L82 PathProgramCache]: Analyzing trace with hash 853175647, now seen corresponding path program 1 times [2018-11-23 08:57:34,509 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:34,509 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:34,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:34,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:34,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:34,586 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:34,586 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 08:57:34,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 08:57:34,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 08:57:34,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:57:34,587 INFO L87 Difference]: Start difference. First operand 10667 states and 35774 transitions. Second operand 4 states. [2018-11-23 08:57:34,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:34,720 INFO L93 Difference]: Finished difference Result 12962 states and 42885 transitions. [2018-11-23 08:57:34,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 08:57:34,720 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 102 [2018-11-23 08:57:34,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:34,738 INFO L225 Difference]: With dead ends: 12962 [2018-11-23 08:57:34,738 INFO L226 Difference]: Without dead ends: 12962 [2018-11-23 08:57:34,739 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 08:57:34,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12962 states. [2018-11-23 08:57:34,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12962 to 11002. [2018-11-23 08:57:34,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11002 states. [2018-11-23 08:57:34,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11002 states to 11002 states and 36802 transitions. [2018-11-23 08:57:34,886 INFO L78 Accepts]: Start accepts. Automaton has 11002 states and 36802 transitions. Word has length 102 [2018-11-23 08:57:34,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:34,887 INFO L480 AbstractCegarLoop]: Abstraction has 11002 states and 36802 transitions. [2018-11-23 08:57:34,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 08:57:34,887 INFO L276 IsEmpty]: Start isEmpty. Operand 11002 states and 36802 transitions. [2018-11-23 08:57:34,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:34,900 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:34,901 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:34,901 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:34,901 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:34,901 INFO L82 PathProgramCache]: Analyzing trace with hash -1470852192, now seen corresponding path program 1 times [2018-11-23 08:57:34,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:34,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:34,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:34,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:34,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:34,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:34,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:34,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:57:34,945 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 08:57:34,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:57:34,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:57:34,945 INFO L87 Difference]: Start difference. First operand 11002 states and 36802 transitions. Second operand 3 states. [2018-11-23 08:57:35,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:35,085 INFO L93 Difference]: Finished difference Result 11537 states and 38330 transitions. [2018-11-23 08:57:35,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:57:35,086 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 102 [2018-11-23 08:57:35,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:35,102 INFO L225 Difference]: With dead ends: 11537 [2018-11-23 08:57:35,102 INFO L226 Difference]: Without dead ends: 11537 [2018-11-23 08:57:35,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:57:35,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11537 states. [2018-11-23 08:57:35,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11537 to 11292. [2018-11-23 08:57:35,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11292 states. [2018-11-23 08:57:35,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11292 states to 11292 states and 37634 transitions. [2018-11-23 08:57:35,246 INFO L78 Accepts]: Start accepts. Automaton has 11292 states and 37634 transitions. Word has length 102 [2018-11-23 08:57:35,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:35,247 INFO L480 AbstractCegarLoop]: Abstraction has 11292 states and 37634 transitions. [2018-11-23 08:57:35,247 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 08:57:35,247 INFO L276 IsEmpty]: Start isEmpty. Operand 11292 states and 37634 transitions. [2018-11-23 08:57:35,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:35,260 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:35,260 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:35,261 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:35,261 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:35,261 INFO L82 PathProgramCache]: Analyzing trace with hash 171304333, now seen corresponding path program 1 times [2018-11-23 08:57:35,261 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:35,261 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:35,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:35,263 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:35,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:35,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:35,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:35,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:35,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 08:57:35,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 08:57:35,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 08:57:35,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:57:35,441 INFO L87 Difference]: Start difference. First operand 11292 states and 37634 transitions. Second operand 8 states. [2018-11-23 08:57:36,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:36,099 INFO L93 Difference]: Finished difference Result 28455 states and 93181 transitions. [2018-11-23 08:57:36,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 08:57:36,100 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 102 [2018-11-23 08:57:36,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:36,138 INFO L225 Difference]: With dead ends: 28455 [2018-11-23 08:57:36,138 INFO L226 Difference]: Without dead ends: 28327 [2018-11-23 08:57:36,138 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-23 08:57:36,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28327 states. [2018-11-23 08:57:36,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28327 to 16507. [2018-11-23 08:57:36,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16507 states. [2018-11-23 08:57:36,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16507 states to 16507 states and 54743 transitions. [2018-11-23 08:57:36,405 INFO L78 Accepts]: Start accepts. Automaton has 16507 states and 54743 transitions. Word has length 102 [2018-11-23 08:57:36,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:36,406 INFO L480 AbstractCegarLoop]: Abstraction has 16507 states and 54743 transitions. [2018-11-23 08:57:36,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 08:57:36,406 INFO L276 IsEmpty]: Start isEmpty. Operand 16507 states and 54743 transitions. [2018-11-23 08:57:36,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:36,423 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:36,423 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:36,423 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:36,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:36,423 INFO L82 PathProgramCache]: Analyzing trace with hash 1132918350, now seen corresponding path program 1 times [2018-11-23 08:57:36,423 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:36,423 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:36,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:36,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:36,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:36,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:36,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:36,497 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:36,497 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:57:36,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:57:36,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:57:36,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:36,498 INFO L87 Difference]: Start difference. First operand 16507 states and 54743 transitions. Second operand 5 states. [2018-11-23 08:57:36,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:36,693 INFO L93 Difference]: Finished difference Result 20095 states and 65790 transitions. [2018-11-23 08:57:36,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 08:57:36,693 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-11-23 08:57:36,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:36,717 INFO L225 Difference]: With dead ends: 20095 [2018-11-23 08:57:36,717 INFO L226 Difference]: Without dead ends: 20095 [2018-11-23 08:57:36,717 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 08:57:36,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20095 states. [2018-11-23 08:57:36,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20095 to 17062. [2018-11-23 08:57:36,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17062 states. [2018-11-23 08:57:37,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17062 states to 17062 states and 56342 transitions. [2018-11-23 08:57:37,030 INFO L78 Accepts]: Start accepts. Automaton has 17062 states and 56342 transitions. Word has length 102 [2018-11-23 08:57:37,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:37,030 INFO L480 AbstractCegarLoop]: Abstraction has 17062 states and 56342 transitions. [2018-11-23 08:57:37,030 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:57:37,030 INFO L276 IsEmpty]: Start isEmpty. Operand 17062 states and 56342 transitions. [2018-11-23 08:57:37,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:37,047 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:37,047 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:37,047 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:37,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:37,048 INFO L82 PathProgramCache]: Analyzing trace with hash -723222830, now seen corresponding path program 1 times [2018-11-23 08:57:37,048 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:37,048 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:37,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:37,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:37,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:37,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:37,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:37,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:37,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:57:37,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:57:37,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:57:37,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:37,110 INFO L87 Difference]: Start difference. First operand 17062 states and 56342 transitions. Second operand 6 states. [2018-11-23 08:57:37,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:37,353 INFO L93 Difference]: Finished difference Result 19617 states and 63676 transitions. [2018-11-23 08:57:37,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:57:37,354 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-11-23 08:57:37,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:37,377 INFO L225 Difference]: With dead ends: 19617 [2018-11-23 08:57:37,377 INFO L226 Difference]: Without dead ends: 19132 [2018-11-23 08:57:37,377 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:37,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19132 states. [2018-11-23 08:57:37,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19132 to 18372. [2018-11-23 08:57:37,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18372 states. [2018-11-23 08:57:37,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18372 states to 18372 states and 60260 transitions. [2018-11-23 08:57:37,612 INFO L78 Accepts]: Start accepts. Automaton has 18372 states and 60260 transitions. Word has length 102 [2018-11-23 08:57:37,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:37,612 INFO L480 AbstractCegarLoop]: Abstraction has 18372 states and 60260 transitions. [2018-11-23 08:57:37,612 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:57:37,613 INFO L276 IsEmpty]: Start isEmpty. Operand 18372 states and 60260 transitions. [2018-11-23 08:57:37,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:37,633 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:37,634 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:37,634 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:37,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:37,634 INFO L82 PathProgramCache]: Analyzing trace with hash 460124467, now seen corresponding path program 1 times [2018-11-23 08:57:37,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:37,634 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:37,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:37,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:37,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:37,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:37,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:37,727 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:37,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 08:57:37,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 08:57:37,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 08:57:37,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:37,728 INFO L87 Difference]: Start difference. First operand 18372 states and 60260 transitions. Second operand 7 states. [2018-11-23 08:57:38,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:38,023 INFO L93 Difference]: Finished difference Result 19715 states and 64540 transitions. [2018-11-23 08:57:38,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:57:38,024 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-23 08:57:38,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:38,050 INFO L225 Difference]: With dead ends: 19715 [2018-11-23 08:57:38,051 INFO L226 Difference]: Without dead ends: 19715 [2018-11-23 08:57:38,051 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:38,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19715 states. [2018-11-23 08:57:38,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19715 to 18217. [2018-11-23 08:57:38,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18217 states. [2018-11-23 08:57:38,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18217 states to 18217 states and 59836 transitions. [2018-11-23 08:57:38,295 INFO L78 Accepts]: Start accepts. Automaton has 18217 states and 59836 transitions. Word has length 102 [2018-11-23 08:57:38,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:38,295 INFO L480 AbstractCegarLoop]: Abstraction has 18217 states and 59836 transitions. [2018-11-23 08:57:38,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 08:57:38,296 INFO L276 IsEmpty]: Start isEmpty. Operand 18217 states and 59836 transitions. [2018-11-23 08:57:38,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:38,316 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:38,316 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:38,316 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:38,317 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:38,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1247716627, now seen corresponding path program 1 times [2018-11-23 08:57:38,317 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:38,317 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:38,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:38,319 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:38,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:38,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:38,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:38,408 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:38,408 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:57:38,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:57:38,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:57:38,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:38,409 INFO L87 Difference]: Start difference. First operand 18217 states and 59836 transitions. Second operand 5 states. [2018-11-23 08:57:38,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:38,537 INFO L93 Difference]: Finished difference Result 13647 states and 45004 transitions. [2018-11-23 08:57:38,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 08:57:38,538 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-11-23 08:57:38,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:38,556 INFO L225 Difference]: With dead ends: 13647 [2018-11-23 08:57:38,557 INFO L226 Difference]: Without dead ends: 13647 [2018-11-23 08:57:38,557 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:38,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13647 states. [2018-11-23 08:57:38,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13647 to 12867. [2018-11-23 08:57:38,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12867 states. [2018-11-23 08:57:38,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12867 states to 12867 states and 42680 transitions. [2018-11-23 08:57:38,724 INFO L78 Accepts]: Start accepts. Automaton has 12867 states and 42680 transitions. Word has length 102 [2018-11-23 08:57:38,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:38,724 INFO L480 AbstractCegarLoop]: Abstraction has 12867 states and 42680 transitions. [2018-11-23 08:57:38,724 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:57:38,724 INFO L276 IsEmpty]: Start isEmpty. Operand 12867 states and 42680 transitions. [2018-11-23 08:57:38,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 08:57:38,738 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:38,738 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:38,738 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:38,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:38,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1068357072, now seen corresponding path program 1 times [2018-11-23 08:57:38,739 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:38,739 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:38,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:38,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:38,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:38,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:38,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:38,845 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:38,845 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:57:38,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:57:38,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:57:38,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:38,846 INFO L87 Difference]: Start difference. First operand 12867 states and 42680 transitions. Second operand 6 states. [2018-11-23 08:57:38,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:38,927 INFO L93 Difference]: Finished difference Result 11587 states and 37752 transitions. [2018-11-23 08:57:38,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 08:57:38,927 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-11-23 08:57:38,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:38,942 INFO L225 Difference]: With dead ends: 11587 [2018-11-23 08:57:38,942 INFO L226 Difference]: Without dead ends: 11587 [2018-11-23 08:57:38,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:38,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11587 states. [2018-11-23 08:57:39,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11587 to 9620. [2018-11-23 08:57:39,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9620 states. [2018-11-23 08:57:39,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9620 states to 9620 states and 31733 transitions. [2018-11-23 08:57:39,076 INFO L78 Accepts]: Start accepts. Automaton has 9620 states and 31733 transitions. Word has length 102 [2018-11-23 08:57:39,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:39,076 INFO L480 AbstractCegarLoop]: Abstraction has 9620 states and 31733 transitions. [2018-11-23 08:57:39,076 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:57:39,076 INFO L276 IsEmpty]: Start isEmpty. Operand 9620 states and 31733 transitions. [2018-11-23 08:57:39,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:39,086 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:39,086 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:39,086 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:39,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:39,087 INFO L82 PathProgramCache]: Analyzing trace with hash 1432893840, now seen corresponding path program 1 times [2018-11-23 08:57:39,087 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:39,087 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:39,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:39,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:39,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:39,185 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:39,185 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 08:57:39,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 08:57:39,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 08:57:39,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 08:57:39,186 INFO L87 Difference]: Start difference. First operand 9620 states and 31733 transitions. Second operand 6 states. [2018-11-23 08:57:39,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:39,337 INFO L93 Difference]: Finished difference Result 10885 states and 34970 transitions. [2018-11-23 08:57:39,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 08:57:39,337 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 104 [2018-11-23 08:57:39,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:39,356 INFO L225 Difference]: With dead ends: 10885 [2018-11-23 08:57:39,356 INFO L226 Difference]: Without dead ends: 10885 [2018-11-23 08:57:39,357 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 08:57:39,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10885 states. [2018-11-23 08:57:39,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10885 to 9790. [2018-11-23 08:57:39,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9790 states. [2018-11-23 08:57:39,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9790 states to 9790 states and 31899 transitions. [2018-11-23 08:57:39,487 INFO L78 Accepts]: Start accepts. Automaton has 9790 states and 31899 transitions. Word has length 104 [2018-11-23 08:57:39,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:39,487 INFO L480 AbstractCegarLoop]: Abstraction has 9790 states and 31899 transitions. [2018-11-23 08:57:39,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 08:57:39,487 INFO L276 IsEmpty]: Start isEmpty. Operand 9790 states and 31899 transitions. [2018-11-23 08:57:39,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:39,497 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:39,497 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:39,497 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:39,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:39,498 INFO L82 PathProgramCache]: Analyzing trace with hash 984197201, now seen corresponding path program 1 times [2018-11-23 08:57:39,498 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:39,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:39,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:39,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:39,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:39,570 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:39,570 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:57:39,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 08:57:39,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:57:39,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:57:39,571 INFO L87 Difference]: Start difference. First operand 9790 states and 31899 transitions. Second operand 5 states. [2018-11-23 08:57:39,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:39,748 INFO L93 Difference]: Finished difference Result 11070 states and 36059 transitions. [2018-11-23 08:57:39,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:57:39,749 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 104 [2018-11-23 08:57:39,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:39,763 INFO L225 Difference]: With dead ends: 11070 [2018-11-23 08:57:39,763 INFO L226 Difference]: Without dead ends: 11070 [2018-11-23 08:57:39,763 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:39,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11070 states. [2018-11-23 08:57:39,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11070 to 9982. [2018-11-23 08:57:39,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9982 states. [2018-11-23 08:57:39,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9982 states to 9982 states and 32523 transitions. [2018-11-23 08:57:39,896 INFO L78 Accepts]: Start accepts. Automaton has 9982 states and 32523 transitions. Word has length 104 [2018-11-23 08:57:39,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:39,896 INFO L480 AbstractCegarLoop]: Abstraction has 9982 states and 32523 transitions. [2018-11-23 08:57:39,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 08:57:39,896 INFO L276 IsEmpty]: Start isEmpty. Operand 9982 states and 32523 transitions. [2018-11-23 08:57:39,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:39,907 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:39,907 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:39,907 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:39,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:39,907 INFO L82 PathProgramCache]: Analyzing trace with hash -2066005614, now seen corresponding path program 1 times [2018-11-23 08:57:39,907 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:39,907 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:39,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:39,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:39,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:40,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:40,004 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:40,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 08:57:40,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 08:57:40,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 08:57:40,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:40,005 INFO L87 Difference]: Start difference. First operand 9982 states and 32523 transitions. Second operand 7 states. [2018-11-23 08:57:40,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:40,314 INFO L93 Difference]: Finished difference Result 19246 states and 62772 transitions. [2018-11-23 08:57:40,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 08:57:40,314 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 104 [2018-11-23 08:57:40,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:40,327 INFO L225 Difference]: With dead ends: 19246 [2018-11-23 08:57:40,327 INFO L226 Difference]: Without dead ends: 9351 [2018-11-23 08:57:40,328 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 08:57:40,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9351 states. [2018-11-23 08:57:40,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9351 to 9143. [2018-11-23 08:57:40,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9143 states. [2018-11-23 08:57:40,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9143 states to 9143 states and 29879 transitions. [2018-11-23 08:57:40,460 INFO L78 Accepts]: Start accepts. Automaton has 9143 states and 29879 transitions. Word has length 104 [2018-11-23 08:57:40,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:40,460 INFO L480 AbstractCegarLoop]: Abstraction has 9143 states and 29879 transitions. [2018-11-23 08:57:40,460 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 08:57:40,460 INFO L276 IsEmpty]: Start isEmpty. Operand 9143 states and 29879 transitions. [2018-11-23 08:57:40,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:40,469 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:40,469 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:40,469 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:40,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:40,470 INFO L82 PathProgramCache]: Analyzing trace with hash 834644247, now seen corresponding path program 1 times [2018-11-23 08:57:40,470 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:40,470 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:40,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:40,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:40,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:40,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:40,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:40,672 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:40,672 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 08:57:40,673 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 08:57:40,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 08:57:40,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:40,673 INFO L87 Difference]: Start difference. First operand 9143 states and 29879 transitions. Second operand 7 states. [2018-11-23 08:57:41,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:41,230 INFO L93 Difference]: Finished difference Result 10214 states and 32922 transitions. [2018-11-23 08:57:41,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 08:57:41,230 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 104 [2018-11-23 08:57:41,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:41,244 INFO L225 Difference]: With dead ends: 10214 [2018-11-23 08:57:41,244 INFO L226 Difference]: Without dead ends: 10214 [2018-11-23 08:57:41,245 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=141, Unknown=0, NotChecked=0, Total=210 [2018-11-23 08:57:41,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10214 states. [2018-11-23 08:57:41,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10214 to 9510. [2018-11-23 08:57:41,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9510 states. [2018-11-23 08:57:41,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9510 states to 9510 states and 30890 transitions. [2018-11-23 08:57:41,371 INFO L78 Accepts]: Start accepts. Automaton has 9510 states and 30890 transitions. Word has length 104 [2018-11-23 08:57:41,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:41,372 INFO L480 AbstractCegarLoop]: Abstraction has 9510 states and 30890 transitions. [2018-11-23 08:57:41,372 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 08:57:41,372 INFO L276 IsEmpty]: Start isEmpty. Operand 9510 states and 30890 transitions. [2018-11-23 08:57:41,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:41,382 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:41,382 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:41,383 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:41,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:41,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1827519050, now seen corresponding path program 2 times [2018-11-23 08:57:41,383 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:41,383 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:41,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:41,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:41,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:41,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:41,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:41,493 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:41,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 08:57:41,493 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 08:57:41,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 08:57:41,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-23 08:57:41,494 INFO L87 Difference]: Start difference. First operand 9510 states and 30890 transitions. Second operand 12 states. [2018-11-23 08:57:42,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:42,035 INFO L93 Difference]: Finished difference Result 16994 states and 55931 transitions. [2018-11-23 08:57:42,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 08:57:42,036 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 104 [2018-11-23 08:57:42,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:42,053 INFO L225 Difference]: With dead ends: 16994 [2018-11-23 08:57:42,053 INFO L226 Difference]: Without dead ends: 13090 [2018-11-23 08:57:42,053 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-11-23 08:57:42,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13090 states. [2018-11-23 08:57:42,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13090 to 12142. [2018-11-23 08:57:42,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12142 states. [2018-11-23 08:57:42,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12142 states to 12142 states and 38900 transitions. [2018-11-23 08:57:42,211 INFO L78 Accepts]: Start accepts. Automaton has 12142 states and 38900 transitions. Word has length 104 [2018-11-23 08:57:42,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:42,211 INFO L480 AbstractCegarLoop]: Abstraction has 12142 states and 38900 transitions. [2018-11-23 08:57:42,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 08:57:42,211 INFO L276 IsEmpty]: Start isEmpty. Operand 12142 states and 38900 transitions. [2018-11-23 08:57:42,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:42,224 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:42,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:42,224 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:42,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:42,224 INFO L82 PathProgramCache]: Analyzing trace with hash 236521401, now seen corresponding path program 1 times [2018-11-23 08:57:42,224 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:42,224 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:42,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:42,226 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:57:42,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:42,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:57:42,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:57:42,335 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:57:42,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 08:57:42,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 08:57:42,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 08:57:42,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-23 08:57:42,336 INFO L87 Difference]: Start difference. First operand 12142 states and 38900 transitions. Second operand 7 states. [2018-11-23 08:57:42,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:57:42,552 INFO L93 Difference]: Finished difference Result 12662 states and 40178 transitions. [2018-11-23 08:57:42,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 08:57:42,553 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 104 [2018-11-23 08:57:42,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 08:57:42,569 INFO L225 Difference]: With dead ends: 12662 [2018-11-23 08:57:42,569 INFO L226 Difference]: Without dead ends: 12662 [2018-11-23 08:57:42,569 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=127, Unknown=0, NotChecked=0, Total=182 [2018-11-23 08:57:42,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12662 states. [2018-11-23 08:57:42,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12662 to 11794. [2018-11-23 08:57:42,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11794 states. [2018-11-23 08:57:42,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11794 states to 11794 states and 37803 transitions. [2018-11-23 08:57:42,722 INFO L78 Accepts]: Start accepts. Automaton has 11794 states and 37803 transitions. Word has length 104 [2018-11-23 08:57:42,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 08:57:42,722 INFO L480 AbstractCegarLoop]: Abstraction has 11794 states and 37803 transitions. [2018-11-23 08:57:42,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 08:57:42,722 INFO L276 IsEmpty]: Start isEmpty. Operand 11794 states and 37803 transitions. [2018-11-23 08:57:42,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 08:57:42,734 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 08:57:42,734 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:57:42,734 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 08:57:42,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:57:42,734 INFO L82 PathProgramCache]: Analyzing trace with hash 360594648, now seen corresponding path program 3 times [2018-11-23 08:57:42,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:57:42,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:57:42,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:42,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:57:42,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:57:42,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:57:42,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:57:42,800 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [507] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [374] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [468] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [521] L674-->L676: Formula: (= v_~__unbuffered_p2_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [364] L676-->L678: Formula: (= v_~__unbuffered_p2_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 [446] L678-->L679: Formula: (= v_~a~0_3 0) InVars {} OutVars{~a~0=v_~a~0_3} AuxVars[] AssignedVars[~a~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 [552] L679-->L680: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 [474] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [539] L682-->L684: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [397] L684-->L685: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [520] L685-->L686: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [450] L686-->L687: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [389] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_20 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_20} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [514] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [444] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [551] L690-->L691: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [472] L691-->L692: Formula: (= v_~y$r_buff1_thd0~0_12 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_12} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [400] L692-->L693: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [537] L693-->L694: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [466] L694-->L695: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [396] L695-->L696: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [519] L696-->L697: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [449] L697-->L698: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [388] L698-->L699: Formula: (= v_~y$w_buff0_used~0_42 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_42} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [513] L699-->L700: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [443] L700-->L702: Formula: (= v_~y$w_buff1_used~0_26 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [471] L702-->L703: Formula: (= v_~z~0_2 0) InVars {} OutVars{~z~0=v_~z~0_2} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [433] L703-->L704: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [536] L704-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [538] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [535] L-1-2-->L786: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_3|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_3|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1210~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_~#t1210~0.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1211~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1212~0.base, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [380] L786-->L786-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1210~0.offset_4|) (not (= 0 |v_ULTIMATE.start_main_~#t1210~0.base_4|)) (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1210~0.base_4| 1) |v_#valid_9|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1210~0.base_4|) 0) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1210~0.base_4| 4) |v_#length_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1210~0.base, #valid, ULTIMATE.start_main_~#t1210~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [382] L786-1-->L787: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1210~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1210~0.base_5|) |v_ULTIMATE.start_main_~#t1210~0.offset_5| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_5|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_5|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [613] L787-->P0ENTRY: Formula: (and (= 0 |v_Thread2_P0_#in~arg.base_3|) (= |v_Thread2_P0_#in~arg.offset_3| 0) (= v_Thread2_P0_thidvar0_2 0)) InVars {} OutVars{Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_3|, Thread2_P0_thidvar0=v_Thread2_P0_thidvar0_2, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P0_#in~arg.base, Thread2_P0_thidvar0, Thread2_P0_#in~arg.offset] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [509] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [434] L788-->L788-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1211~0.offset_4|) (not (= 0 |v_ULTIMATE.start_main_~#t1211~0.base_4|)) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1211~0.base_4|)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1211~0.base_4| 1)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1211~0.base_4| 4))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_4|, #valid=|v_#valid_11|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_4|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_~#t1211~0.base] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [437] L788-1-->L789: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1211~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1211~0.base_5|) |v_ULTIMATE.start_main_~#t1211~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_5|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_5|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [611] L789-->P1ENTRY: Formula: (and (= 0 |v_Thread0_P1_#in~arg.offset_3|) (= 1 v_Thread0_P1_thidvar0_2) (= 0 |v_Thread0_P1_#in~arg.base_3|)) InVars {} OutVars{Thread0_P1_thidvar0=v_Thread0_P1_thidvar0_2, Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_3|, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P1_thidvar0, Thread0_P1_#in~arg.base, Thread0_P1_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [544] L789-1-->L790: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [494] L790-->L790-1: Formula: (and (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t1212~0.base_4|)) (not (= 0 |v_ULTIMATE.start_main_~#t1212~0.base_4|)) (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t1212~0.base_4| 4) |v_#length_5|) (= 0 |v_ULTIMATE.start_main_~#t1212~0.offset_4|) (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t1212~0.base_4| 1))) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_5|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_4|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #length] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [497] L790-1-->L791: Formula: (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1212~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1212~0.base_5|) |v_ULTIMATE.start_main_~#t1212~0.offset_5| 2))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_5|} OutVars{#memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [612] L791-->P2ENTRY: Formula: (and (= |v_Thread1_P2_#in~arg.offset_3| 0) (= 2 v_Thread1_P2_thidvar0_2) (= 0 |v_Thread1_P2_#in~arg.base_3|)) InVars {} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_3|, Thread1_P2_thidvar0=v_Thread1_P2_thidvar0_2, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P2_#in~arg.base, Thread1_P2_thidvar0, Thread1_P2_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [584] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread1_P2_~arg.offset_1 |v_Thread1_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread1_P2___VERIFIER_assert_~expression_1 |v_Thread1_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread1_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread1_P2_~arg.base_1 |v_Thread1_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_4, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, Thread1_P2_~arg.offset=v_Thread1_P2_~arg.offset_1, Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread1_P2___VERIFIER_assert_#in~expression=|v_Thread1_P2___VERIFIER_assert_#in~expression_1|, Thread1_P2_~arg.base=v_Thread1_P2_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread1_P2_~arg.offset, Thread1_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P2___VERIFIER_assert_#in~expression, Thread1_P2_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [586] L4-->L4-3: Formula: (not (= 0 v_Thread1_P2___VERIFIER_assert_~expression_3)) InVars {Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_3} OutVars{Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [589] L4-3-->L764: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~z~0_1 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~__unbuffered_p2_EBX~0_1 v_~a~0_2) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~__unbuffered_p2_EAX~0_1 v_~z~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13)) InVars {~a~0=v_~a~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_1, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~a~0=v_~a~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, ~z~0=v_~z~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [590] L764-->L764-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread1_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread1_P2_#t~ite12] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [558] P0ENTRY-->L718: Formula: (and (= v_~a~0_1 1) (= v_Thread2_P0_~arg.base_1 |v_Thread2_P0_#in~arg.base_1|) (= v_Thread2_P0_~arg.offset_1 |v_Thread2_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~x~0_1 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|} OutVars{~a~0=v_~a~0_1, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, Thread2_P0_~arg.offset=v_Thread2_P0_~arg.offset_1, Thread2_P0_~arg.base=v_Thread2_P0_~arg.base_1, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~x~0=v_~x~0_1, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[~a~0, Thread2_P0_~arg.offset, Thread2_P0_~arg.base, ~__unbuffered_cnt~0, ~x~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 [562] P1ENTRY-->L729: Formula: (and (= v_Thread0_P1_~arg.offset_1 |v_Thread0_P1_#in~arg.offset_1|) (= v_Thread0_P1_~arg.base_1 |v_Thread0_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} OutVars{Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, Thread0_P1_~arg.offset=v_Thread0_P1_~arg.offset_1, Thread0_P1_~arg.base=v_Thread0_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread0_P1_~arg.offset, Thread0_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [592] L764-5-->L765: Formula: (= v_~y~0_5 |v_Thread1_P2_#t~ite12_2|) InVars {Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_2|} OutVars{Thread1_P2_#t~ite11=|v_Thread1_P2_#t~ite11_1|, Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread1_P2_#t~ite11, Thread1_P2_#t~ite12, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [595] L765-->L765-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread1_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread1_P2_#t~ite13] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite13|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [564] L729-->L729-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite13|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [598] L765-2-->L766: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread1_P2_#t~ite13_3|) InVars {Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P2_#t~ite13] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [567] L729-2-->L729-4: Formula: (and (= |v_Thread0_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_3|, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread0_P1_#t~ite4] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [600] L766-->L766-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread1_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread1_P2_#t~ite14] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite14|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [601] L766-2-->L767: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread1_P2_#t~ite14_3|) InVars {Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_3|} OutVars{Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread1_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [570] L729-4-->L729-5: Formula: (= |v_Thread0_P1_#t~ite5_4| |v_Thread0_P1_#t~ite4_4|) InVars {Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_4|} OutVars{Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_4|, Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread0_P1_#t~ite5] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread0_P1_#t~ite5|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [565] L729-5-->L730: Formula: (= v_~y~0_3 |v_Thread0_P1_#t~ite5_2|) InVars {Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_2|} OutVars{Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_1|, ~y~0=v_~y~0_3, Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_3|} AuxVars[] AssignedVars[Thread0_P1_#t~ite4, ~y~0, Thread0_P1_#t~ite5] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [569] L730-->L730-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread0_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} AuxVars[] AssignedVars[Thread0_P1_#t~ite6] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite6|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [603] L767-->L767-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread1_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} AuxVars[] AssignedVars[Thread1_P2_#t~ite15] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite6|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite15|=1, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [571] L730-2-->L731: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread0_P1_#t~ite6_3|) InVars {Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P1_#t~ite6] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite15|=1, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [604] L767-2-->L768: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread1_P2_#t~ite15_3|) InVars {Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_3|} OutVars{Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_4|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread1_P2_#t~ite15] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [573] L731-->L731-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread0_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread0_P1_#t~ite7] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite7|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [606] L768-->L768-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread1_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread1_P2_#t~ite16] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite7|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [574] L731-2-->L732: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread0_P1_#t~ite7_3|) InVars {Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_3|} OutVars{Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread0_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [576] L732-->L732-2: Formula: (and (= |v_Thread0_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread0_P1_#t~ite8] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite8|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [577] L732-2-->L733: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread0_P1_#t~ite8_3|) InVars {Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_3|} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4, Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_4|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread0_P1_#t~ite8] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [579] L733-->L733-2: Formula: (and (= |v_Thread0_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread0_P1_#t~ite9] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite9|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [580] L733-2-->L738: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread0_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread0_P1_#t~ite9, ~__unbuffered_cnt~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [607] L768-2-->L773: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread1_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread1_P2_#t~ite16] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [430] L791-1-->L795: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [527] L795-->L797: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [379] L797-->L797-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_22 256)) (= 0 (mod v_~y$w_buff0_used~0_44 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_22} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_22} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [386] L797-2-->L797-4: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_28 256)) (= 0 (mod v_~y$r_buff1_thd0~0_14 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [366] L797-4-->L797-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [368] L797-5-->L798: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [506] L798-->L798-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_46) (or (= (mod v_~y$w_buff0_used~0_46 256) 0) (= (mod v_~y$r_buff0_thd0~0_24 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_24} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_24, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [512] L798-2-->L799: Formula: (= v_~y$w_buff0_used~0_47 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_47, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [455] L799-->L799-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_30 256)) (= 0 (mod v_~y$r_buff1_thd0~0_16 256))) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_30) (or (= (mod v_~y$r_buff0_thd0~0_26 256) 0) (= 0 (mod v_~y$w_buff0_used~0_49 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [440] L799-2-->L800: Formula: (= v_~y$w_buff1_used~0_31 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_31} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [372] L800-->L800-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_28 256) 0) (= (mod v_~y$w_buff0_used~0_51 256) 0)) (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_28)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [549] L800-2-->L801: Formula: (= v_~y$r_buff0_thd0~0_29 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_29} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [492] L801-->L801-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (= 0 (mod v_~y$r_buff0_thd0~0_31 256))) (or (= 0 (mod v_~y$r_buff1_thd0~0_18 256)) (= (mod v_~y$w_buff1_used~0_33 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_18)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [500] L801-2-->L808: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12) (= v_~y$r_buff1_thd0~0_19 |v_ULTIMATE.start_main_#t~ite26_5|)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [376] L808-->L808-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_32 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_54 256)) (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_34 256))) (and .cse0 (= 0 (mod v_~y$r_buff1_thd0~0_20 256))))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_54, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_54, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [367] L808-5-->L809: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [502] L809-->L809-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [493] L809-8-->L810: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [452] L810-->L810-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [427] L810-8-->L811: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [369] L811-->L811-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_66) (not (= (mod v_~weak$$choice2~0_13 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [532] L811-8-->L812: Formula: (= v_~y$w_buff0_used~0_29 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_29, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [489] L812-->L812-8: Formula: (and (not (= (mod v_~weak$$choice2~0_1 256) 0)) (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_18)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [462] L812-8-->L813: Formula: (= v_~y$w_buff1_used~0_21 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_21} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [425] L813-->L813-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_10) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [418] L813-8-->L814: Formula: (= v_~y$r_buff0_thd0~0_15 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_15, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [530] L814-->L814-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_8) (not (= 0 (mod v_~weak$$choice2~0_5 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [524] L814-8-->L816: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 2 v_~x~0_3) (= v_~__unbuffered_p2_EBX~0_2 0) (= 2 v_~y~0_6) (= v_~__unbuffered_p2_EAX~0_2 1))) 1 0) 0) 0 1)) (= v_~y$r_buff1_thd0~0_11 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_2, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [414] L816-->L816-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [393] L816-2-->L819: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [375] L819-->L819-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [381] L819-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [421] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [416] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [410] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 ~a~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); srcloc: L790 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); srcloc: L790-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0;~__unbuffered_p2_EBX~0 := ~a~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~a~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite12;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite33;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite34;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite39;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite42;havoc main_#t~ite40;havoc main_#t~ite41; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite48;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 ~a~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); srcloc: L790 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); srcloc: L790-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0;~__unbuffered_p2_EBX~0 := ~a~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~a~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite12;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite33;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite34;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite39;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite42;havoc main_#t~ite40;havoc main_#t~ite41; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite48;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] -1 call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] -1 call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] -1 call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] -1 call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L765] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L804] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L805] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 assume 0 != ~weak$$choice2~0 % 256; [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 assume 0 != ~y$flush_delayed~0 % 256; [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] -1 call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] -1 call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] -1 call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] -1 call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L765] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L804] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L805] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 assume 0 != ~weak$$choice2~0 % 256; [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 assume 0 != ~y$flush_delayed~0 % 256; [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0, main_~#t1211~0, main_~#t1212~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call main_~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, main_~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call main_~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, main_~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call main_~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, main_~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L804] -1 havoc main_#t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L805] -1 havoc main_#t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0, main_~#t1211~0, main_~#t1212~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call main_~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, main_~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call main_~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, main_~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call main_~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, main_~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L804] -1 havoc main_#t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L805] -1 havoc main_#t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call ~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, ~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call ~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, ~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call ~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, ~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc #t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := #t~ite22; [L797] -1 havoc #t~ite21; [L797] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := #t~ite23; [L798] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := #t~ite24; [L799] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L800] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L801] -1 havoc #t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L804] -1 havoc #t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L805] -1 havoc #t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := #t~ite30; [L808] -1 havoc #t~ite30; [L808] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := #t~ite33; [L809] -1 havoc #t~ite32; [L809] -1 havoc #t~ite33; [L809] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := #t~ite36; [L810] -1 havoc #t~ite35; [L810] -1 havoc #t~ite34; [L810] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := #t~ite39; [L811] -1 havoc #t~ite37; [L811] -1 havoc #t~ite39; [L811] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := #t~ite42; [L812] -1 havoc #t~ite42; [L812] -1 havoc #t~ite40; [L812] -1 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L813] -1 havoc #t~ite45; [L813] -1 havoc #t~ite43; [L813] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L814] -1 havoc #t~ite47; [L814] -1 havoc #t~ite48; [L814] -1 havoc #t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := #t~ite49; [L816] -1 havoc #t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call ~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, ~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call ~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, ~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call ~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, ~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L790] -1 pthread_t t1212; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK -1 pthread_create(&t1212, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L743] 0 y$w_buff1 = y$w_buff0 [L744] 0 y$w_buff0 = 2 [L745] 0 y$w_buff1_used = y$w_buff0_used [L746] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L748] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 0 y$r_buff0_thd3 = (_Bool)1 [L755] 0 z = 1 [L758] 0 __unbuffered_p2_EAX = z [L761] 0 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L708] 1 a = 1 [L711] 1 x = 1 [L716] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 2 x = 2 [L726] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L729] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L730] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L767] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L731] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L732] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L733] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L736] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L805] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L806] -1 y$flush_delayed = weak$$choice2 [L807] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] -1 y = y$flush_delayed ? y$mem_tmp : y [L817] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-23 08:57:45,344 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 08:57:45,345 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 08:57:45 BasicIcfg [2018-11-23 08:57:45,345 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 08:57:45,361 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 08:57:45,361 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 08:57:45,361 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 08:57:45,361 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:56:01" (3/4) ... [2018-11-23 08:57:45,364 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [507] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [374] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [468] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [521] L674-->L676: Formula: (= v_~__unbuffered_p2_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [364] L676-->L678: Formula: (= v_~__unbuffered_p2_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 [446] L678-->L679: Formula: (= v_~a~0_3 0) InVars {} OutVars{~a~0=v_~a~0_3} AuxVars[] AssignedVars[~a~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 [552] L679-->L680: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 [474] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [539] L682-->L684: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [397] L684-->L685: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [520] L685-->L686: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [450] L686-->L687: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [389] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_20 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_20} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [514] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [444] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [551] L690-->L691: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [472] L691-->L692: Formula: (= v_~y$r_buff1_thd0~0_12 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_12} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [400] L692-->L693: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [537] L693-->L694: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [466] L694-->L695: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [396] L695-->L696: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [519] L696-->L697: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [449] L697-->L698: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [388] L698-->L699: Formula: (= v_~y$w_buff0_used~0_42 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_42} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [513] L699-->L700: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [443] L700-->L702: Formula: (= v_~y$w_buff1_used~0_26 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [471] L702-->L703: Formula: (= v_~z~0_2 0) InVars {} OutVars{~z~0=v_~z~0_2} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [433] L703-->L704: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [536] L704-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [538] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [535] L-1-2-->L786: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_3|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_3|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1210~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_~#t1210~0.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1211~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1212~0.base, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [380] L786-->L786-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1210~0.offset_4|) (not (= 0 |v_ULTIMATE.start_main_~#t1210~0.base_4|)) (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1210~0.base_4| 1) |v_#valid_9|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1210~0.base_4|) 0) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1210~0.base_4| 4) |v_#length_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1210~0.base, #valid, ULTIMATE.start_main_~#t1210~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [382] L786-1-->L787: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1210~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1210~0.base_5|) |v_ULTIMATE.start_main_~#t1210~0.offset_5| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_5|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1210~0.offset=|v_ULTIMATE.start_main_~#t1210~0.offset_5|, ULTIMATE.start_main_~#t1210~0.base=|v_ULTIMATE.start_main_~#t1210~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [613] L787-->P0ENTRY: Formula: (and (= 0 |v_Thread2_P0_#in~arg.base_3|) (= |v_Thread2_P0_#in~arg.offset_3| 0) (= v_Thread2_P0_thidvar0_2 0)) InVars {} OutVars{Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_3|, Thread2_P0_thidvar0=v_Thread2_P0_thidvar0_2, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P0_#in~arg.base, Thread2_P0_thidvar0, Thread2_P0_#in~arg.offset] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [509] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [434] L788-->L788-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1211~0.offset_4|) (not (= 0 |v_ULTIMATE.start_main_~#t1211~0.base_4|)) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1211~0.base_4|)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1211~0.base_4| 1)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1211~0.base_4| 4))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_4|, #valid=|v_#valid_11|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_4|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_~#t1211~0.base] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [437] L788-1-->L789: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1211~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1211~0.base_5|) |v_ULTIMATE.start_main_~#t1211~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_5|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_5|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [611] L789-->P1ENTRY: Formula: (and (= 0 |v_Thread0_P1_#in~arg.offset_3|) (= 1 v_Thread0_P1_thidvar0_2) (= 0 |v_Thread0_P1_#in~arg.base_3|)) InVars {} OutVars{Thread0_P1_thidvar0=v_Thread0_P1_thidvar0_2, Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_3|, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P1_thidvar0, Thread0_P1_#in~arg.base, Thread0_P1_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [544] L789-1-->L790: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [494] L790-->L790-1: Formula: (and (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t1212~0.base_4|)) (not (= 0 |v_ULTIMATE.start_main_~#t1212~0.base_4|)) (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t1212~0.base_4| 4) |v_#length_5|) (= 0 |v_ULTIMATE.start_main_~#t1212~0.offset_4|) (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t1212~0.base_4| 1))) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_5|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_4|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #length] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [497] L790-1-->L791: Formula: (= |v_#memory_int_5| (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1212~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1212~0.base_5|) |v_ULTIMATE.start_main_~#t1212~0.offset_5| 2))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_5|} OutVars{#memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_5|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P1_thidvar0=1, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [612] L791-->P2ENTRY: Formula: (and (= |v_Thread1_P2_#in~arg.offset_3| 0) (= 2 v_Thread1_P2_thidvar0_2) (= 0 |v_Thread1_P2_#in~arg.base_3|)) InVars {} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_3|, Thread1_P2_thidvar0=v_Thread1_P2_thidvar0_2, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P2_#in~arg.base, Thread1_P2_thidvar0, Thread1_P2_#in~arg.offset] VAL [Thread0_P1_thidvar0=1, Thread1_P2_thidvar0=2, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [584] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread1_P2_~arg.offset_1 |v_Thread1_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread1_P2___VERIFIER_assert_~expression_1 |v_Thread1_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread1_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread1_P2_~arg.base_1 |v_Thread1_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_4, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|} OutVars{Thread1_P2_#in~arg.base=|v_Thread1_P2_#in~arg.base_1|, Thread1_P2_~arg.offset=v_Thread1_P2_~arg.offset_1, Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread1_P2___VERIFIER_assert_#in~expression=|v_Thread1_P2___VERIFIER_assert_#in~expression_1|, Thread1_P2_~arg.base=v_Thread1_P2_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread1_P2_#in~arg.offset=|v_Thread1_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread1_P2_~arg.offset, Thread1_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P2___VERIFIER_assert_#in~expression, Thread1_P2_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [586] L4-->L4-3: Formula: (not (= 0 v_Thread1_P2___VERIFIER_assert_~expression_3)) InVars {Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_3} OutVars{Thread1_P2___VERIFIER_assert_~expression=v_Thread1_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [589] L4-3-->L764: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~z~0_1 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~__unbuffered_p2_EBX~0_1 v_~a~0_2) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~__unbuffered_p2_EAX~0_1 v_~z~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13)) InVars {~a~0=v_~a~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_1, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~a~0=v_~a~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, ~z~0=v_~z~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [590] L764-->L764-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread1_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread1_P2_#t~ite12] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [558] P0ENTRY-->L718: Formula: (and (= v_~a~0_1 1) (= v_Thread2_P0_~arg.base_1 |v_Thread2_P0_#in~arg.base_1|) (= v_Thread2_P0_~arg.offset_1 |v_Thread2_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~x~0_1 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|} OutVars{~a~0=v_~a~0_1, Thread2_P0_#in~arg.base=|v_Thread2_P0_#in~arg.base_1|, Thread2_P0_~arg.offset=v_Thread2_P0_~arg.offset_1, Thread2_P0_~arg.base=v_Thread2_P0_~arg.base_1, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~x~0=v_~x~0_1, Thread2_P0_#in~arg.offset=|v_Thread2_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[~a~0, Thread2_P0_~arg.offset, Thread2_P0_~arg.base, ~__unbuffered_cnt~0, ~x~0] VAL [Thread0_P1_thidvar0=1, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 [562] P1ENTRY-->L729: Formula: (and (= v_Thread0_P1_~arg.offset_1 |v_Thread0_P1_#in~arg.offset_1|) (= v_Thread0_P1_~arg.base_1 |v_Thread0_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} OutVars{Thread0_P1_#in~arg.base=|v_Thread0_P1_#in~arg.base_1|, Thread0_P1_~arg.offset=v_Thread0_P1_~arg.offset_1, Thread0_P1_~arg.base=v_Thread0_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread0_P1_#in~arg.offset=|v_Thread0_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread0_P1_~arg.offset, Thread0_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite12|=2, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [592] L764-5-->L765: Formula: (= v_~y~0_5 |v_Thread1_P2_#t~ite12_2|) InVars {Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_2|} OutVars{Thread1_P2_#t~ite11=|v_Thread1_P2_#t~ite11_1|, Thread1_P2_#t~ite12=|v_Thread1_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread1_P2_#t~ite11, Thread1_P2_#t~ite12, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [595] L765-->L765-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread1_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread1_P2_#t~ite13] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite13|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [564] L729-->L729-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite13|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [598] L765-2-->L766: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread1_P2_#t~ite13_3|) InVars {Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread1_P2_#t~ite13=|v_Thread1_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P2_#t~ite13] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [567] L729-2-->L729-4: Formula: (and (= |v_Thread0_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_3|, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread0_P1_#t~ite4] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [600] L766-->L766-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread1_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread1_P2_#t~ite14] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite14|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [601] L766-2-->L767: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread1_P2_#t~ite14_3|) InVars {Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_3|} OutVars{Thread1_P2_#t~ite14=|v_Thread1_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread1_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [570] L729-4-->L729-5: Formula: (= |v_Thread0_P1_#t~ite5_4| |v_Thread0_P1_#t~ite4_4|) InVars {Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_4|} OutVars{Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_4|, Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread0_P1_#t~ite5] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite4|=2, |Thread0_P1_#t~ite5|=2, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [565] L729-5-->L730: Formula: (= v_~y~0_3 |v_Thread0_P1_#t~ite5_2|) InVars {Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_2|} OutVars{Thread0_P1_#t~ite4=|v_Thread0_P1_#t~ite4_1|, ~y~0=v_~y~0_3, Thread0_P1_#t~ite5=|v_Thread0_P1_#t~ite5_3|} AuxVars[] AssignedVars[Thread0_P1_#t~ite4, ~y~0, Thread0_P1_#t~ite5] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [569] L730-->L730-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread0_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} AuxVars[] AssignedVars[Thread0_P1_#t~ite6] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite6|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [603] L767-->L767-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread1_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} AuxVars[] AssignedVars[Thread1_P2_#t~ite15] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite6|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite15|=1, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [571] L730-2-->L731: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread0_P1_#t~ite6_3|) InVars {Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread0_P1_#t~ite6=|v_Thread0_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P1_#t~ite6] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite15|=1, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [604] L767-2-->L768: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread1_P2_#t~ite15_3|) InVars {Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_3|} OutVars{Thread1_P2_#t~ite15=|v_Thread1_P2_#t~ite15_4|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread1_P2_#t~ite15] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [573] L731-->L731-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread0_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread0_P1_#t~ite7] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite7|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [606] L768-->L768-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread1_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread1_P2_#t~ite16] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite7|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [574] L731-2-->L732: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread0_P1_#t~ite7_3|) InVars {Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_3|} OutVars{Thread0_P1_#t~ite7=|v_Thread0_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread0_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [576] L732-->L732-2: Formula: (and (= |v_Thread0_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread0_P1_#t~ite8] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite8|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [577] L732-2-->L733: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread0_P1_#t~ite8_3|) InVars {Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_3|} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4, Thread0_P1_#t~ite8=|v_Thread0_P1_#t~ite8_4|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread0_P1_#t~ite8] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [579] L733-->L733-2: Formula: (and (= |v_Thread0_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread0_P1_#t~ite9] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread0_P1_#t~ite9|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [580] L733-2-->L738: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread0_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread0_P1_#t~ite9=|v_Thread0_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread0_P1_#t~ite9, ~__unbuffered_cnt~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2_#t~ite16|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [607] L768-2-->L773: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread1_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread1_P2_#t~ite16=|v_Thread1_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread1_P2_#t~ite16] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [430] L791-1-->L795: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [527] L795-->L797: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [379] L797-->L797-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_22 256)) (= 0 (mod v_~y$w_buff0_used~0_44 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_22} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_22} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [386] L797-2-->L797-4: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_28 256)) (= 0 (mod v_~y$r_buff1_thd0~0_14 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_14, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [366] L797-4-->L797-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [368] L797-5-->L798: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [506] L798-->L798-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_46) (or (= (mod v_~y$w_buff0_used~0_46 256) 0) (= (mod v_~y$r_buff0_thd0~0_24 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_24} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_24, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [512] L798-2-->L799: Formula: (= v_~y$w_buff0_used~0_47 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_47, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [455] L799-->L799-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_30 256)) (= 0 (mod v_~y$r_buff1_thd0~0_16 256))) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_30) (or (= (mod v_~y$r_buff0_thd0~0_26 256) 0) (= 0 (mod v_~y$w_buff0_used~0_49 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_16, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_26, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [440] L799-2-->L800: Formula: (= v_~y$w_buff1_used~0_31 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_31} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [372] L800-->L800-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_28 256) 0) (= (mod v_~y$w_buff0_used~0_51 256) 0)) (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_28)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [549] L800-2-->L801: Formula: (= v_~y$r_buff0_thd0~0_29 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_29} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [492] L801-->L801-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (= 0 (mod v_~y$r_buff0_thd0~0_31 256))) (or (= 0 (mod v_~y$r_buff1_thd0~0_18 256)) (= (mod v_~y$w_buff1_used~0_33 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_18)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [500] L801-2-->L808: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12) (= v_~y$r_buff1_thd0~0_19 |v_ULTIMATE.start_main_#t~ite26_5|)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [376] L808-->L808-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_32 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_54 256)) (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_34 256))) (and .cse0 (= 0 (mod v_~y$r_buff1_thd0~0_20 256))))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_54, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_54, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_32, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_20, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [367] L808-5-->L809: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [502] L809-->L809-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [493] L809-8-->L810: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [452] L810-->L810-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [427] L810-8-->L811: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [369] L811-->L811-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_66) (not (= (mod v_~weak$$choice2~0_13 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [532] L811-8-->L812: Formula: (= v_~y$w_buff0_used~0_29 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_29, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [489] L812-->L812-8: Formula: (and (not (= (mod v_~weak$$choice2~0_1 256) 0)) (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_18)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [462] L812-8-->L813: Formula: (= v_~y$w_buff1_used~0_21 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_21} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [425] L813-->L813-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_10) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [418] L813-8-->L814: Formula: (= v_~y$r_buff0_thd0~0_15 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_15, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [530] L814-->L814-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_8) (not (= 0 (mod v_~weak$$choice2~0_5 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [524] L814-8-->L816: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 2 v_~x~0_3) (= v_~__unbuffered_p2_EBX~0_2 0) (= 2 v_~y~0_6) (= v_~__unbuffered_p2_EAX~0_2 1))) 1 0) 0) 0 1)) (= v_~y$r_buff1_thd0~0_11 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_2, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [414] L816-->L816-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [393] L816-2-->L819: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [375] L819-->L819-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [381] L819-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [421] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [416] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [410] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P1_thidvar0=1, Thread0_P1_~arg.base=0, Thread0_P1_~arg.offset=0, Thread1_P2___VERIFIER_assert_~expression=1, Thread1_P2_thidvar0=2, Thread1_P2_~arg.base=0, Thread1_P2_~arg.offset=0, Thread2_P0_thidvar0=0, Thread2_P0_~arg.base=0, Thread2_P0_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P1_#in~arg.base|=0, |Thread0_P1_#in~arg.offset|=0, |Thread1_P2_#in~arg.base|=0, |Thread1_P2_#in~arg.offset|=0, |Thread1_P2___VERIFIER_assert_#in~expression|=1, |Thread2_P0_#in~arg.base|=0, |Thread2_P0_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 ~a~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); srcloc: L790 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); srcloc: L790-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0;~__unbuffered_p2_EBX~0 := ~a~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~a~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite12;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite33;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite34;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite39;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite42;havoc main_#t~ite40;havoc main_#t~ite41; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite48;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [?] -1 ~a~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); srcloc: L786 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); srcloc: L786-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); srcloc: L788 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); srcloc: L788-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); srcloc: L790 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); srcloc: L790-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0;~__unbuffered_p2_EBX~0 := ~a~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~a~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite12;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite33;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite34;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite39;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite42;havoc main_#t~ite40;havoc main_#t~ite41; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite48;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1210~0.base|=5, |ULTIMATE.start_main_~#t1210~0.offset|=0, |ULTIMATE.start_main_~#t1211~0.base|=7, |ULTIMATE.start_main_~#t1211~0.offset|=0, |ULTIMATE.start_main_~#t1212~0.base|=6, |ULTIMATE.start_main_~#t1212~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] -1 call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] -1 call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] -1 call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] -1 call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L765] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L804] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L805] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 assume 0 != ~weak$$choice2~0 % 256; [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 assume 0 != ~y$flush_delayed~0 % 256; [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0.base, main_~#t1210~0.offset, main_~#t1211~0.base, main_~#t1211~0.offset, main_~#t1212~0.base, main_~#t1212~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] -1 call main_~#t1210~0.base, main_~#t1210~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 call write~int(0, main_~#t1210~0.base, main_~#t1210~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] -1 call main_~#t1211~0.base, main_~#t1211~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 call write~int(1, main_~#t1211~0.base, main_~#t1211~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] -1 call main_~#t1212~0.base, main_~#t1212~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] -1 call write~int(2, main_~#t1212~0.base, main_~#t1212~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L765] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L804] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L805] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 assume 0 != ~weak$$choice2~0 % 256; [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 assume 0 != ~weak$$choice2~0 % 256; [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 assume 0 != ~weak$$choice2~0 % 256; [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 assume 0 != ~weak$$choice2~0 % 256; [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 assume 0 != ~weak$$choice2~0 % 256; [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 assume 0 != ~weak$$choice2~0 % 256; [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 assume 0 != ~y$flush_delayed~0 % 256; [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0.base=5, main_~#t1210~0.offset=0, main_~#t1211~0.base=7, main_~#t1211~0.offset=0, main_~#t1212~0.base=6, main_~#t1212~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0, main_~#t1211~0, main_~#t1212~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call main_~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, main_~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call main_~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, main_~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call main_~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, main_~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L804] -1 havoc main_#t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L805] -1 havoc main_#t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1210~0, main_~#t1211~0, main_~#t1212~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call main_~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, main_~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call main_~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, main_~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call main_~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, main_~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L747] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc main_#t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := main_#t~ite22; [L797] -1 havoc main_#t~ite21; [L797] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L798] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L799] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L800] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L801] -1 havoc main_#t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L804] -1 havoc main_#t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L805] -1 havoc main_#t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := main_#t~ite30; [L808] -1 havoc main_#t~ite30; [L808] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := main_#t~ite33; [L809] -1 havoc main_#t~ite32; [L809] -1 havoc main_#t~ite33; [L809] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := main_#t~ite36; [L810] -1 havoc main_#t~ite35; [L810] -1 havoc main_#t~ite34; [L810] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L811] -1 havoc main_#t~ite37; [L811] -1 havoc main_#t~ite39; [L811] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L812] -1 havoc main_#t~ite42; [L812] -1 havoc main_#t~ite40; [L812] -1 havoc main_#t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L813] -1 havoc main_#t~ite45; [L813] -1 havoc main_#t~ite43; [L813] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L814] -1 havoc main_#t~ite47; [L814] -1 havoc main_#t~ite48; [L814] -1 havoc main_#t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := main_#t~ite49; [L816] -1 havoc main_#t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L819] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1210~0!base=5, main_~#t1210~0!offset=0, main_~#t1211~0!base=7, main_~#t1211~0!offset=0, main_~#t1212~0!base=6, main_~#t1212~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call ~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, ~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call ~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, ~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call ~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, ~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc #t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := #t~ite22; [L797] -1 havoc #t~ite21; [L797] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := #t~ite23; [L798] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := #t~ite24; [L799] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L800] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L801] -1 havoc #t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L804] -1 havoc #t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L805] -1 havoc #t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := #t~ite30; [L808] -1 havoc #t~ite30; [L808] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := #t~ite33; [L809] -1 havoc #t~ite32; [L809] -1 havoc #t~ite33; [L809] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := #t~ite36; [L810] -1 havoc #t~ite35; [L810] -1 havoc #t~ite34; [L810] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := #t~ite39; [L811] -1 havoc #t~ite37; [L811] -1 havoc #t~ite39; [L811] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := #t~ite42; [L812] -1 havoc #t~ite42; [L812] -1 havoc #t~ite40; [L812] -1 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L813] -1 havoc #t~ite45; [L813] -1 havoc #t~ite43; [L813] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L814] -1 havoc #t~ite47; [L814] -1 havoc #t~ite48; [L814] -1 havoc #t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := #t~ite49; [L816] -1 havoc #t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L676] -1 ~__unbuffered_p2_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0] [L678] -1 ~a~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L703] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L704] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L786] FCALL -1 call ~#t1210~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FCALL -1 call write~int(0, ~#t1210~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L787] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L788] FCALL -1 call ~#t1211~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FCALL -1 call write~int(1, ~#t1211~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L789] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L790] FCALL -1 call ~#t1212~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FCALL -1 call write~int(2, ~#t1212~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L791] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L740-L774] 0 ~arg := #in~arg; [L743] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 0 ~y$w_buff0~0 := 2; [L745] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L748] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 0 ~y$r_buff0_thd3~0 := 1; [L755] 0 ~z~0 := 1; [L758] 0 ~__unbuffered_p2_EAX~0 := ~z~0; [L761] 0 ~__unbuffered_p2_EBX~0 := ~a~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L764] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L764] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~a~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L705-L719] 1 ~arg := #in~arg; [L708] 1 ~a~0 := 1; [L711] 1 ~x~0 := 1; [L716] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720-L739] 2 ~arg := #in~arg; [L723] 2 ~x~0 := 2; [L726] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L764] 0 ~y~0 := #t~ite12; [L764] 0 havoc #t~ite12; [L764] 0 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L765] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L765] 0 ~y$w_buff0_used~0 := #t~ite13; [L765] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L729] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L766] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L766] 0 ~y$w_buff1_used~0 := #t~ite14; [L766] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y~0 := #t~ite5; [L729] 2 havoc #t~ite5; [L729] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L730] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L767] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L730] 2 ~y$w_buff0_used~0 := #t~ite6; [L730] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L767] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L767] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L731] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L768] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L731] 2 ~y$w_buff1_used~0 := #t~ite7; [L731] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L732] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L732] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L732] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L733] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L733] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L733] 2 havoc #t~ite9; [L736] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L768] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L768] 0 havoc #t~ite16; [L771] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 havoc #t~nondet20; [L793] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L795] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L797] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L797] -1 ~y~0 := #t~ite22; [L797] -1 havoc #t~ite21; [L797] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L798] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y$w_buff0_used~0 := #t~ite23; [L798] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L799] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff1_used~0 := #t~ite24; [L799] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L800] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L800] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L801] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L801] -1 havoc #t~ite26; [L804] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L804] -1 havoc #t~nondet27; [L805] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L805] -1 havoc #t~nondet28; [L806] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L807] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L808] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L808] -1 ~y~0 := #t~ite30; [L808] -1 havoc #t~ite30; [L808] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L809] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 ~y$w_buff0~0 := #t~ite33; [L809] -1 havoc #t~ite32; [L809] -1 havoc #t~ite33; [L809] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L810] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L810] -1 ~y$w_buff1~0 := #t~ite36; [L810] -1 havoc #t~ite35; [L810] -1 havoc #t~ite34; [L810] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L811] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L811] -1 ~y$w_buff0_used~0 := #t~ite39; [L811] -1 havoc #t~ite37; [L811] -1 havoc #t~ite39; [L811] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L812] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L812] -1 ~y$w_buff1_used~0 := #t~ite42; [L812] -1 havoc #t~ite42; [L812] -1 havoc #t~ite40; [L812] -1 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L813] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L813] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L813] -1 havoc #t~ite45; [L813] -1 havoc #t~ite43; [L813] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L814] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L814] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L814] -1 havoc #t~ite47; [L814] -1 havoc #t~ite48; [L814] -1 havoc #t~ite46; [L815] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p2_EAX~0) && 0 == ~__unbuffered_p2_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L816] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L816] -1 ~y~0 := #t~ite49; [L816] -1 havoc #t~ite49; [L817] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=1, ~__unbuffered_p2_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~a~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L676] -1 int __unbuffered_p2_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0] [L678] -1 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L691] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L692] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L693] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L694] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L695] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L696] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L697] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L698] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L699] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L700] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L702] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L703] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L704] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L786] -1 pthread_t t1210; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L787] FCALL, FORK -1 pthread_create(&t1210, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] -1 pthread_t t1211; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L789] FCALL, FORK -1 pthread_create(&t1211, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L790] -1 pthread_t t1212; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK -1 pthread_create(&t1212, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L743] 0 y$w_buff1 = y$w_buff0 [L744] 0 y$w_buff0 = 2 [L745] 0 y$w_buff1_used = y$w_buff0_used [L746] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L748] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 0 y$r_buff0_thd3 = (_Bool)1 [L755] 0 z = 1 [L758] 0 __unbuffered_p2_EAX = z [L761] 0 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L708] 1 a = 1 [L711] 1 x = 1 [L716] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 2 x = 2 [L726] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L729] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L730] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L767] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L731] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L732] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L733] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L736] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L805] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L806] -1 y$flush_delayed = weak$$choice2 [L807] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] -1 y = y$flush_delayed ? y$mem_tmp : y [L817] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-23 08:57:52,236 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_e81353d8-4e0a-4dad-a341-992503192a06/bin-2019/uautomizer/witness.graphml [2018-11-23 08:57:52,236 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 08:57:52,237 INFO L168 Benchmark]: Toolchain (without parser) took 111823.90 ms. Allocated memory was 1.0 GB in the beginning and 6.7 GB in the end (delta: 5.7 GB). Free memory was 950.4 MB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,238 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 08:57:52,239 INFO L168 Benchmark]: CACSL2BoogieTranslator took 453.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 152.0 MB). Free memory was 950.4 MB in the beginning and 1.1 GB in the end (delta: -177.2 MB). Peak memory consumption was 32.9 MB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,239 INFO L168 Benchmark]: Boogie Procedure Inliner took 45.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,239 INFO L168 Benchmark]: Boogie Preprocessor took 28.38 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 08:57:52,239 INFO L168 Benchmark]: RCFGBuilder took 507.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.8 MB). Peak memory consumption was 51.8 MB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,239 INFO L168 Benchmark]: TraceAbstraction took 103910.36 ms. Allocated memory was 1.2 GB in the beginning and 8.1 GB in the end (delta: 6.9 GB). Free memory was 1.1 GB in the beginning and 4.2 GB in the end (delta: -3.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,240 INFO L168 Benchmark]: Witness Printer took 6875.35 ms. Allocated memory was 8.1 GB in the beginning and 6.7 GB in the end (delta: -1.4 GB). Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 93.0 MB). Peak memory consumption was 94.7 MB. Max. memory is 11.5 GB. [2018-11-23 08:57:52,241 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 453.21 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 152.0 MB). Free memory was 950.4 MB in the beginning and 1.1 GB in the end (delta: -177.2 MB). Peak memory consumption was 32.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 45.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.38 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 507.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.8 MB). Peak memory consumption was 51.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 103910.36 ms. Allocated memory was 1.2 GB in the beginning and 8.1 GB in the end (delta: 6.9 GB). Free memory was 1.1 GB in the beginning and 4.2 GB in the end (delta: -3.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 6875.35 ms. Allocated memory was 8.1 GB in the beginning and 6.7 GB in the end (delta: -1.4 GB). Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 93.0 MB). Peak memory consumption was 94.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L676] -1 int __unbuffered_p2_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0] [L678] -1 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L691] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L692] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L693] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L694] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L695] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L696] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L697] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L698] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L699] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L700] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L702] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L703] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L704] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L786] -1 pthread_t t1210; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L787] FCALL, FORK -1 pthread_create(&t1210, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] -1 pthread_t t1211; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L789] FCALL, FORK -1 pthread_create(&t1211, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L790] -1 pthread_t t1212; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L791] FCALL, FORK -1 pthread_create(&t1212, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L743] 0 y$w_buff1 = y$w_buff0 [L744] 0 y$w_buff0 = 2 [L745] 0 y$w_buff1_used = y$w_buff0_used [L746] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L748] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 0 y$r_buff0_thd3 = (_Bool)1 [L755] 0 z = 1 [L758] 0 __unbuffered_p2_EAX = z [L761] 0 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L708] 1 a = 1 [L711] 1 x = 1 [L716] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 2 x = 2 [L726] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L764] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L765] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L765] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L766] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=1] [L729] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L730] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L767] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L731] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L732] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L732] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L733] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L733] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L736] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L771] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L797] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L804] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L805] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L806] -1 y$flush_delayed = weak$$choice2 [L807] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L808] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L809] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L810] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L810] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L811] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L812] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L812] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L813] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L813] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L814] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L816] -1 y = y$flush_delayed ? y$mem_tmp : y [L817] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 200 locations, 3 error locations. UNSAFE Result, 103.7s OverallTime, 26 OverallIterations, 1 TraceHistogramMax, 25.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6158 SDtfs, 5822 SDslu, 13974 SDs, 0 SdLazy, 4661 SolverSat, 291 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 252 GetRequests, 77 SyntacticMatches, 22 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=194884occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 55.0s AutomataMinimizationTime, 25 MinimizatonAttempts, 456171 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 2195 NumberOfCodeBlocks, 2195 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 2066 ConstructedInterpolants, 0 QuantifiedInterpolants, 431399 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...