./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_tso.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_tso.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bb399b49d562562005292857f055e3a5f2e4f47f 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-22 22:58:35,455 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-22 22:58:35,456 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-22 22:58:35,463 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-22 22:58:35,463 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-22 22:58:35,464 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-22 22:58:35,464 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-22 22:58:35,465 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-22 22:58:35,466 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-22 22:58:35,467 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-22 22:58:35,467 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-22 22:58:35,468 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-22 22:58:35,468 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-22 22:58:35,469 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-22 22:58:35,470 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-22 22:58:35,470 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-22 22:58:35,471 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-22 22:58:35,472 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-22 22:58:35,473 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-22 22:58:35,474 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-22 22:58:35,475 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-22 22:58:35,476 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-22 22:58:35,477 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-22 22:58:35,478 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-22 22:58:35,478 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-22 22:58:35,479 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-22 22:58:35,479 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-22 22:58:35,480 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-22 22:58:35,480 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-22 22:58:35,481 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-22 22:58:35,481 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-22 22:58:35,482 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-22 22:58:35,482 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-22 22:58:35,482 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-22 22:58:35,482 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-22 22:58:35,483 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-22 22:58:35,483 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-22 22:58:35,489 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-22 22:58:35,490 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-22 22:58:35,490 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-22 22:58:35,490 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-22 22:58:35,491 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-22 22:58:35,491 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-22 22:58:35,491 INFO L133 SettingsManager]: * Use SBE=true [2018-11-22 22:58:35,491 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-22 22:58:35,491 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-22 22:58:35,492 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-22 22:58:35,493 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-22 22:58:35,493 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:58:35,494 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-22 22:58:35,494 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-22 22:58:35,494 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-22 22:58:35,494 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-22 22:58:35,494 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-22 22:58:35,494 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-22 22:58:35,497 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bb399b49d562562005292857f055e3a5f2e4f47f [2018-11-22 22:58:35,520 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-22 22:58:35,529 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-22 22:58:35,532 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-22 22:58:35,533 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-22 22:58:35,533 INFO L276 PluginConnector]: CDTParser initialized [2018-11-22 22:58:35,534 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix056_tso.opt_false-unreach-call.i [2018-11-22 22:58:35,574 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/data/afb4d6585/5e09e1a58f384c29a4f2f22f1cfc636c/FLAGfe597c104 [2018-11-22 22:58:36,021 INFO L307 CDTParser]: Found 1 translation units. [2018-11-22 22:58:36,022 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/sv-benchmarks/c/pthread-wmm/mix056_tso.opt_false-unreach-call.i [2018-11-22 22:58:36,031 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/data/afb4d6585/5e09e1a58f384c29a4f2f22f1cfc636c/FLAGfe597c104 [2018-11-22 22:58:36,042 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/data/afb4d6585/5e09e1a58f384c29a4f2f22f1cfc636c [2018-11-22 22:58:36,044 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-22 22:58:36,044 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-22 22:58:36,045 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-22 22:58:36,045 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-22 22:58:36,048 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-22 22:58:36,049 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,051 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d05c556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36, skipping insertion in model container [2018-11-22 22:58:36,051 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,056 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-22 22:58:36,089 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-22 22:58:36,308 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:58:36,317 INFO L191 MainTranslator]: Completed pre-run [2018-11-22 22:58:36,406 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:58:36,438 INFO L195 MainTranslator]: Completed translation [2018-11-22 22:58:36,438 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36 WrapperNode [2018-11-22 22:58:36,438 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-22 22:58:36,439 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-22 22:58:36,439 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-22 22:58:36,439 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-22 22:58:36,444 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,457 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,480 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-22 22:58:36,481 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-22 22:58:36,481 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-22 22:58:36,481 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-22 22:58:36,487 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,488 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,492 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,492 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,500 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,503 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,505 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... [2018-11-22 22:58:36,508 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-22 22:58:36,509 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-22 22:58:36,509 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-22 22:58:36,509 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-22 22:58:36,510 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:58:36,549 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-22 22:58:36,549 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-22 22:58:36,549 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-22 22:58:36,549 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-22 22:58:36,549 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-22 22:58:36,550 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-22 22:58:36,550 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-22 22:58:36,550 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-22 22:58:36,550 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-22 22:58:36,550 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-22 22:58:36,550 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-22 22:58:36,550 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-22 22:58:36,550 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-22 22:58:36,552 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-22 22:58:36,952 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-22 22:58:36,952 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-22 22:58:36,952 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:58:36 BoogieIcfgContainer [2018-11-22 22:58:36,952 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-22 22:58:36,953 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-22 22:58:36,953 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-22 22:58:36,955 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-22 22:58:36,956 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 10:58:36" (1/3) ... [2018-11-22 22:58:36,956 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fe00c06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:58:36, skipping insertion in model container [2018-11-22 22:58:36,956 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:58:36" (2/3) ... [2018-11-22 22:58:36,957 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fe00c06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:58:36, skipping insertion in model container [2018-11-22 22:58:36,957 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:58:36" (3/3) ... [2018-11-22 22:58:36,958 INFO L112 eAbstractionObserver]: Analyzing ICFG mix056_tso.opt_false-unreach-call.i [2018-11-22 22:58:36,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,984 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,984 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,984 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,985 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,986 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,986 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,986 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,986 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,986 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,988 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,988 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,988 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,988 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,989 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,990 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,990 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,990 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,990 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,992 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,992 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,993 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,994 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,994 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,994 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,994 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,996 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,996 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:36,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,001 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:58:37,016 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-22 22:58:37,016 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-22 22:58:37,022 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-22 22:58:37,036 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-22 22:58:37,055 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-22 22:58:37,056 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-22 22:58:37,056 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-22 22:58:37,056 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-22 22:58:37,056 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-22 22:58:37,056 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-22 22:58:37,056 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-22 22:58:37,056 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-22 22:58:37,056 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-22 22:58:37,064 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 155places, 192 transitions [2018-11-22 22:58:52,499 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 128912 states. [2018-11-22 22:58:52,501 INFO L276 IsEmpty]: Start isEmpty. Operand 128912 states. [2018-11-22 22:58:52,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-22 22:58:52,510 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:58:52,510 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:58:52,512 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:58:52,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:58:52,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1928541482, now seen corresponding path program 1 times [2018-11-22 22:58:52,518 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:58:52,518 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:58:52,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:58:52,553 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:58:52,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:58:52,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:58:52,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:58:52,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:58:52,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:58:52,694 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:58:52,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:58:52,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:58:52,704 INFO L87 Difference]: Start difference. First operand 128912 states. Second operand 4 states. [2018-11-22 22:58:54,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:58:54,403 INFO L93 Difference]: Finished difference Result 233472 states and 1098324 transitions. [2018-11-22 22:58:54,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:58:54,404 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2018-11-22 22:58:54,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:58:55,177 INFO L225 Difference]: With dead ends: 233472 [2018-11-22 22:58:55,177 INFO L226 Difference]: Without dead ends: 203722 [2018-11-22 22:58:55,179 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:58:59,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203722 states. [2018-11-22 22:59:01,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203722 to 118892. [2018-11-22 22:59:01,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-11-22 22:59:02,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 559775 transitions. [2018-11-22 22:59:02,733 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 559775 transitions. Word has length 43 [2018-11-22 22:59:02,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:02,734 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 559775 transitions. [2018-11-22 22:59:02,734 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:02,735 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 559775 transitions. [2018-11-22 22:59:02,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-22 22:59:02,744 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:02,745 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:02,745 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:02,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:02,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1195634893, now seen corresponding path program 1 times [2018-11-22 22:59:02,746 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:02,746 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:02,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:02,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:02,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:02,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:02,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:02,810 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:02,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:59:02,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:59:02,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:59:02,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:59:02,812 INFO L87 Difference]: Start difference. First operand 118892 states and 559775 transitions. Second operand 3 states. [2018-11-22 22:59:03,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:03,541 INFO L93 Difference]: Finished difference Result 118892 states and 557815 transitions. [2018-11-22 22:59:03,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:59:03,541 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2018-11-22 22:59:03,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:03,893 INFO L225 Difference]: With dead ends: 118892 [2018-11-22 22:59:03,893 INFO L226 Difference]: Without dead ends: 118892 [2018-11-22 22:59:03,894 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:59:04,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118892 states. [2018-11-22 22:59:06,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118892 to 118892. [2018-11-22 22:59:06,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-11-22 22:59:07,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 557815 transitions. [2018-11-22 22:59:07,339 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 557815 transitions. Word has length 50 [2018-11-22 22:59:07,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:07,340 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 557815 transitions. [2018-11-22 22:59:07,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:59:07,340 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 557815 transitions. [2018-11-22 22:59:07,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-22 22:59:07,344 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:07,344 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:07,345 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:07,345 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:07,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1302381044, now seen corresponding path program 1 times [2018-11-22 22:59:07,345 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:07,345 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:07,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:07,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:07,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:07,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:07,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:07,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:07,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:07,420 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:07,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:07,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:07,420 INFO L87 Difference]: Start difference. First operand 118892 states and 557815 transitions. Second operand 5 states. [2018-11-22 22:59:13,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:13,253 INFO L93 Difference]: Finished difference Result 325272 states and 1468249 transitions. [2018-11-22 22:59:13,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:13,254 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-11-22 22:59:13,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:14,164 INFO L225 Difference]: With dead ends: 325272 [2018-11-22 22:59:14,164 INFO L226 Difference]: Without dead ends: 324272 [2018-11-22 22:59:14,164 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:59:15,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324272 states. [2018-11-22 22:59:19,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324272 to 186422. [2018-11-22 22:59:19,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186422 states. [2018-11-22 22:59:20,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186422 states to 186422 states and 840914 transitions. [2018-11-22 22:59:20,592 INFO L78 Accepts]: Start accepts. Automaton has 186422 states and 840914 transitions. Word has length 50 [2018-11-22 22:59:20,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:20,593 INFO L480 AbstractCegarLoop]: Abstraction has 186422 states and 840914 transitions. [2018-11-22 22:59:20,593 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:20,593 INFO L276 IsEmpty]: Start isEmpty. Operand 186422 states and 840914 transitions. [2018-11-22 22:59:20,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-22 22:59:20,601 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:20,601 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:20,602 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:20,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:20,602 INFO L82 PathProgramCache]: Analyzing trace with hash 1678185933, now seen corresponding path program 1 times [2018-11-22 22:59:20,602 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:20,602 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:20,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:20,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:20,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:20,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:20,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:20,674 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:20,674 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:59:20,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:59:20,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:59:20,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:20,674 INFO L87 Difference]: Start difference. First operand 186422 states and 840914 transitions. Second operand 4 states. [2018-11-22 22:59:21,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:21,515 INFO L93 Difference]: Finished difference Result 163598 states and 725472 transitions. [2018-11-22 22:59:21,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:59:21,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2018-11-22 22:59:21,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:21,960 INFO L225 Difference]: With dead ends: 163598 [2018-11-22 22:59:21,960 INFO L226 Difference]: Without dead ends: 160993 [2018-11-22 22:59:21,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:22,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160993 states. [2018-11-22 22:59:29,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160993 to 160993. [2018-11-22 22:59:29,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160993 states. [2018-11-22 22:59:29,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160993 states to 160993 states and 716800 transitions. [2018-11-22 22:59:29,828 INFO L78 Accepts]: Start accepts. Automaton has 160993 states and 716800 transitions. Word has length 51 [2018-11-22 22:59:29,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:29,828 INFO L480 AbstractCegarLoop]: Abstraction has 160993 states and 716800 transitions. [2018-11-22 22:59:29,828 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:29,828 INFO L276 IsEmpty]: Start isEmpty. Operand 160993 states and 716800 transitions. [2018-11-22 22:59:29,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-22 22:59:29,836 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:29,836 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:29,837 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:29,837 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:29,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1667665363, now seen corresponding path program 1 times [2018-11-22 22:59:29,837 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:29,837 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:29,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:29,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:29,840 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:29,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:29,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:29,902 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:29,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:29,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:29,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:29,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:29,903 INFO L87 Difference]: Start difference. First operand 160993 states and 716800 transitions. Second operand 5 states. [2018-11-22 22:59:30,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:30,178 INFO L93 Difference]: Finished difference Result 51405 states and 209121 transitions. [2018-11-22 22:59:30,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:59:30,178 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2018-11-22 22:59:30,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:30,302 INFO L225 Difference]: With dead ends: 51405 [2018-11-22 22:59:30,303 INFO L226 Difference]: Without dead ends: 49093 [2018-11-22 22:59:30,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:30,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49093 states. [2018-11-22 22:59:31,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49093 to 49093. [2018-11-22 22:59:31,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49093 states. [2018-11-22 22:59:31,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49093 states to 49093 states and 200467 transitions. [2018-11-22 22:59:31,659 INFO L78 Accepts]: Start accepts. Automaton has 49093 states and 200467 transitions. Word has length 52 [2018-11-22 22:59:31,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:31,659 INFO L480 AbstractCegarLoop]: Abstraction has 49093 states and 200467 transitions. [2018-11-22 22:59:31,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:31,660 INFO L276 IsEmpty]: Start isEmpty. Operand 49093 states and 200467 transitions. [2018-11-22 22:59:31,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-22 22:59:31,669 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:31,669 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:31,669 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:31,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:31,670 INFO L82 PathProgramCache]: Analyzing trace with hash 503624572, now seen corresponding path program 1 times [2018-11-22 22:59:31,670 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:31,670 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:31,671 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:31,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:31,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:31,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:31,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:31,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:31,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:59:31,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:59:31,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:59:31,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:31,775 INFO L87 Difference]: Start difference. First operand 49093 states and 200467 transitions. Second operand 4 states. [2018-11-22 22:59:32,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:32,237 INFO L93 Difference]: Finished difference Result 70361 states and 282256 transitions. [2018-11-22 22:59:32,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:59:32,238 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2018-11-22 22:59:32,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:32,437 INFO L225 Difference]: With dead ends: 70361 [2018-11-22 22:59:32,437 INFO L226 Difference]: Without dead ends: 70361 [2018-11-22 22:59:32,437 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:32,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70361 states. [2018-11-22 22:59:33,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70361 to 53657. [2018-11-22 22:59:33,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53657 states. [2018-11-22 22:59:33,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53657 states to 53657 states and 217408 transitions. [2018-11-22 22:59:33,433 INFO L78 Accepts]: Start accepts. Automaton has 53657 states and 217408 transitions. Word has length 65 [2018-11-22 22:59:33,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:33,434 INFO L480 AbstractCegarLoop]: Abstraction has 53657 states and 217408 transitions. [2018-11-22 22:59:33,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:33,434 INFO L276 IsEmpty]: Start isEmpty. Operand 53657 states and 217408 transitions. [2018-11-22 22:59:33,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-22 22:59:33,448 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:33,448 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:33,448 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:33,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:33,449 INFO L82 PathProgramCache]: Analyzing trace with hash -2048532389, now seen corresponding path program 1 times [2018-11-22 22:59:33,449 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:33,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:33,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:33,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:33,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:33,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:33,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:33,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:33,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:33,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:33,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:33,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:33,523 INFO L87 Difference]: Start difference. First operand 53657 states and 217408 transitions. Second operand 6 states. [2018-11-22 22:59:33,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:33,603 INFO L93 Difference]: Finished difference Result 11001 states and 37616 transitions. [2018-11-22 22:59:33,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:59:33,603 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-11-22 22:59:33,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:33,616 INFO L225 Difference]: With dead ends: 11001 [2018-11-22 22:59:33,617 INFO L226 Difference]: Without dead ends: 9289 [2018-11-22 22:59:33,617 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:59:33,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9289 states. [2018-11-22 22:59:33,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9289 to 8774. [2018-11-22 22:59:33,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8774 states. [2018-11-22 22:59:33,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8774 states to 8774 states and 29920 transitions. [2018-11-22 22:59:33,723 INFO L78 Accepts]: Start accepts. Automaton has 8774 states and 29920 transitions. Word has length 65 [2018-11-22 22:59:33,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:33,723 INFO L480 AbstractCegarLoop]: Abstraction has 8774 states and 29920 transitions. [2018-11-22 22:59:33,723 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:33,723 INFO L276 IsEmpty]: Start isEmpty. Operand 8774 states and 29920 transitions. [2018-11-22 22:59:33,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:33,734 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:33,734 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:33,734 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:33,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:33,735 INFO L82 PathProgramCache]: Analyzing trace with hash 877472604, now seen corresponding path program 1 times [2018-11-22 22:59:33,735 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:33,735 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:33,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:33,737 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:33,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:33,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:33,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:33,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:33,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:59:33,779 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:59:33,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:59:33,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:59:33,779 INFO L87 Difference]: Start difference. First operand 8774 states and 29920 transitions. Second operand 3 states. [2018-11-22 22:59:33,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:33,888 INFO L93 Difference]: Finished difference Result 9194 states and 31201 transitions. [2018-11-22 22:59:33,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:59:33,890 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-11-22 22:59:33,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:33,902 INFO L225 Difference]: With dead ends: 9194 [2018-11-22 22:59:33,902 INFO L226 Difference]: Without dead ends: 9194 [2018-11-22 22:59:33,902 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:59:33,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9194 states. [2018-11-22 22:59:33,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9194 to 8964. [2018-11-22 22:59:33,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8964 states. [2018-11-22 22:59:34,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8964 states to 8964 states and 30502 transitions. [2018-11-22 22:59:34,515 INFO L78 Accepts]: Start accepts. Automaton has 8964 states and 30502 transitions. Word has length 98 [2018-11-22 22:59:34,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:34,516 INFO L480 AbstractCegarLoop]: Abstraction has 8964 states and 30502 transitions. [2018-11-22 22:59:34,516 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:59:34,516 INFO L276 IsEmpty]: Start isEmpty. Operand 8964 states and 30502 transitions. [2018-11-22 22:59:34,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:34,527 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:34,527 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:34,527 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:34,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:34,528 INFO L82 PathProgramCache]: Analyzing trace with hash -255717989, now seen corresponding path program 1 times [2018-11-22 22:59:34,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:34,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:34,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:34,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:34,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:34,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:34,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:34,583 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:34,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:59:34,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:59:34,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:59:34,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:34,584 INFO L87 Difference]: Start difference. First operand 8964 states and 30502 transitions. Second operand 4 states. [2018-11-22 22:59:34,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:34,756 INFO L93 Difference]: Finished difference Result 13969 states and 47679 transitions. [2018-11-22 22:59:34,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:59:34,757 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-11-22 22:59:34,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:34,776 INFO L225 Difference]: With dead ends: 13969 [2018-11-22 22:59:34,776 INFO L226 Difference]: Without dead ends: 13969 [2018-11-22 22:59:34,776 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:34,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13969 states. [2018-11-22 22:59:34,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13969 to 9164. [2018-11-22 22:59:34,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9164 states. [2018-11-22 22:59:34,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9164 states to 9164 states and 31112 transitions. [2018-11-22 22:59:34,912 INFO L78 Accepts]: Start accepts. Automaton has 9164 states and 31112 transitions. Word has length 98 [2018-11-22 22:59:34,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:34,912 INFO L480 AbstractCegarLoop]: Abstraction has 9164 states and 31112 transitions. [2018-11-22 22:59:34,912 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:34,913 INFO L276 IsEmpty]: Start isEmpty. Operand 9164 states and 31112 transitions. [2018-11-22 22:59:34,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:34,924 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:34,924 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:34,924 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:34,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:34,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1050811619, now seen corresponding path program 2 times [2018-11-22 22:59:34,924 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:34,925 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:34,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:34,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:34,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:34,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:34,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:34,995 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:34,995 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:34,996 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:34,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:34,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:34,996 INFO L87 Difference]: Start difference. First operand 9164 states and 31112 transitions. Second operand 5 states. [2018-11-22 22:59:35,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:35,199 INFO L93 Difference]: Finished difference Result 13300 states and 44194 transitions. [2018-11-22 22:59:35,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:59:35,199 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-22 22:59:35,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:35,217 INFO L225 Difference]: With dead ends: 13300 [2018-11-22 22:59:35,217 INFO L226 Difference]: Without dead ends: 13300 [2018-11-22 22:59:35,217 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:35,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13300 states. [2018-11-22 22:59:35,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13300 to 9784. [2018-11-22 22:59:35,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9784 states. [2018-11-22 22:59:35,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9784 states to 9784 states and 33183 transitions. [2018-11-22 22:59:35,352 INFO L78 Accepts]: Start accepts. Automaton has 9784 states and 33183 transitions. Word has length 98 [2018-11-22 22:59:35,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:35,352 INFO L480 AbstractCegarLoop]: Abstraction has 9784 states and 33183 transitions. [2018-11-22 22:59:35,352 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:35,352 INFO L276 IsEmpty]: Start isEmpty. Operand 9784 states and 33183 transitions. [2018-11-22 22:59:35,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:35,364 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:35,365 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:35,365 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:35,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:35,365 INFO L82 PathProgramCache]: Analyzing trace with hash 26117698, now seen corresponding path program 1 times [2018-11-22 22:59:35,365 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:35,365 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:35,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:35,367 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:59:35,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:35,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:35,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:35,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:35,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:35,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:35,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:35,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:35,454 INFO L87 Difference]: Start difference. First operand 9784 states and 33183 transitions. Second operand 7 states. [2018-11-22 22:59:35,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:35,803 INFO L93 Difference]: Finished difference Result 12224 states and 40725 transitions. [2018-11-22 22:59:35,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:35,803 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 98 [2018-11-22 22:59:35,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:35,818 INFO L225 Difference]: With dead ends: 12224 [2018-11-22 22:59:35,818 INFO L226 Difference]: Without dead ends: 12179 [2018-11-22 22:59:35,819 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:59:35,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12179 states. [2018-11-22 22:59:35,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12179 to 11114. [2018-11-22 22:59:35,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11114 states. [2018-11-22 22:59:35,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11114 states to 11114 states and 37497 transitions. [2018-11-22 22:59:35,954 INFO L78 Accepts]: Start accepts. Automaton has 11114 states and 37497 transitions. Word has length 98 [2018-11-22 22:59:35,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:35,954 INFO L480 AbstractCegarLoop]: Abstraction has 11114 states and 37497 transitions. [2018-11-22 22:59:35,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:35,954 INFO L276 IsEmpty]: Start isEmpty. Operand 11114 states and 37497 transitions. [2018-11-22 22:59:35,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:35,968 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:35,968 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:35,968 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:35,968 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:35,968 INFO L82 PathProgramCache]: Analyzing trace with hash -813781119, now seen corresponding path program 3 times [2018-11-22 22:59:35,968 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:35,969 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:35,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:35,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:35,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:35,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:36,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:36,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:36,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:36,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:36,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:36,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:36,050 INFO L87 Difference]: Start difference. First operand 11114 states and 37497 transitions. Second operand 5 states. [2018-11-22 22:59:36,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:36,194 INFO L93 Difference]: Finished difference Result 12159 states and 40613 transitions. [2018-11-22 22:59:36,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:59:36,194 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-22 22:59:36,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:36,209 INFO L225 Difference]: With dead ends: 12159 [2018-11-22 22:59:36,209 INFO L226 Difference]: Without dead ends: 12159 [2018-11-22 22:59:36,210 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:36,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12159 states. [2018-11-22 22:59:36,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12159 to 11234. [2018-11-22 22:59:36,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11234 states. [2018-11-22 22:59:36,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11234 states to 11234 states and 37833 transitions. [2018-11-22 22:59:36,349 INFO L78 Accepts]: Start accepts. Automaton has 11234 states and 37833 transitions. Word has length 98 [2018-11-22 22:59:36,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:36,349 INFO L480 AbstractCegarLoop]: Abstraction has 11234 states and 37833 transitions. [2018-11-22 22:59:36,350 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:36,350 INFO L276 IsEmpty]: Start isEmpty. Operand 11234 states and 37833 transitions. [2018-11-22 22:59:36,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-22 22:59:36,363 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:36,363 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:36,364 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:36,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:36,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1997057155, now seen corresponding path program 1 times [2018-11-22 22:59:36,364 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:36,364 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:36,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:36,366 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:59:36,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:36,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:36,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:36,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:36,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:36,438 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:36,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:36,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:36,438 INFO L87 Difference]: Start difference. First operand 11234 states and 37833 transitions. Second operand 5 states. [2018-11-22 22:59:36,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:36,607 INFO L93 Difference]: Finished difference Result 15305 states and 50373 transitions. [2018-11-22 22:59:36,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:36,607 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-22 22:59:36,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:36,627 INFO L225 Difference]: With dead ends: 15305 [2018-11-22 22:59:36,627 INFO L226 Difference]: Without dead ends: 15165 [2018-11-22 22:59:36,628 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:59:36,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15165 states. [2018-11-22 22:59:36,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15165 to 11494. [2018-11-22 22:59:36,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11494 states. [2018-11-22 22:59:36,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11494 states to 11494 states and 38501 transitions. [2018-11-22 22:59:36,783 INFO L78 Accepts]: Start accepts. Automaton has 11494 states and 38501 transitions. Word has length 98 [2018-11-22 22:59:36,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:36,783 INFO L480 AbstractCegarLoop]: Abstraction has 11494 states and 38501 transitions. [2018-11-22 22:59:36,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:36,783 INFO L276 IsEmpty]: Start isEmpty. Operand 11494 states and 38501 transitions. [2018-11-22 22:59:36,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:36,795 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:36,795 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:36,795 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:36,795 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:36,796 INFO L82 PathProgramCache]: Analyzing trace with hash -1564298, now seen corresponding path program 1 times [2018-11-22 22:59:36,796 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:36,796 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:36,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:36,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:36,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:36,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:36,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:36,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:36,852 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:59:36,852 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:59:36,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:59:36,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:36,853 INFO L87 Difference]: Start difference. First operand 11494 states and 38501 transitions. Second operand 4 states. [2018-11-22 22:59:37,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:37,031 INFO L93 Difference]: Finished difference Result 17920 states and 60397 transitions. [2018-11-22 22:59:37,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:59:37,031 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-11-22 22:59:37,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:37,056 INFO L225 Difference]: With dead ends: 17920 [2018-11-22 22:59:37,056 INFO L226 Difference]: Without dead ends: 17920 [2018-11-22 22:59:37,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:37,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17920 states. [2018-11-22 22:59:37,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17920 to 9819. [2018-11-22 22:59:37,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9819 states. [2018-11-22 22:59:37,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9819 states to 9819 states and 32796 transitions. [2018-11-22 22:59:37,217 INFO L78 Accepts]: Start accepts. Automaton has 9819 states and 32796 transitions. Word has length 100 [2018-11-22 22:59:37,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:37,217 INFO L480 AbstractCegarLoop]: Abstraction has 9819 states and 32796 transitions. [2018-11-22 22:59:37,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:37,217 INFO L276 IsEmpty]: Start isEmpty. Operand 9819 states and 32796 transitions. [2018-11-22 22:59:37,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:37,228 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:37,228 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:37,228 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:37,228 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:37,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1184911595, now seen corresponding path program 1 times [2018-11-22 22:59:37,228 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:37,228 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:37,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:37,230 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:37,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:37,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:37,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:37,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:37,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:37,326 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:37,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:37,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:37,326 INFO L87 Difference]: Start difference. First operand 9819 states and 32796 transitions. Second operand 6 states. [2018-11-22 22:59:37,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:37,579 INFO L93 Difference]: Finished difference Result 11694 states and 38496 transitions. [2018-11-22 22:59:37,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:59:37,579 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-22 22:59:37,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:37,593 INFO L225 Difference]: With dead ends: 11694 [2018-11-22 22:59:37,593 INFO L226 Difference]: Without dead ends: 11694 [2018-11-22 22:59:37,594 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:37,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11694 states. [2018-11-22 22:59:37,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11694 to 10164. [2018-11-22 22:59:37,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10164 states. [2018-11-22 22:59:37,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10164 states to 10164 states and 33907 transitions. [2018-11-22 22:59:37,719 INFO L78 Accepts]: Start accepts. Automaton has 10164 states and 33907 transitions. Word has length 100 [2018-11-22 22:59:37,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:37,719 INFO L480 AbstractCegarLoop]: Abstraction has 10164 states and 33907 transitions. [2018-11-22 22:59:37,719 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:37,719 INFO L276 IsEmpty]: Start isEmpty. Operand 10164 states and 33907 transitions. [2018-11-22 22:59:37,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:37,729 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:37,729 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:37,730 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:37,730 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:37,730 INFO L82 PathProgramCache]: Analyzing trace with hash -215330572, now seen corresponding path program 1 times [2018-11-22 22:59:37,730 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:37,730 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:37,731 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:37,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:37,731 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:37,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:37,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:37,804 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:37,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:37,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:37,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:37,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:37,805 INFO L87 Difference]: Start difference. First operand 10164 states and 33907 transitions. Second operand 6 states. [2018-11-22 22:59:37,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:37,995 INFO L93 Difference]: Finished difference Result 9333 states and 30729 transitions. [2018-11-22 22:59:37,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:37,995 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-22 22:59:37,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:38,007 INFO L225 Difference]: With dead ends: 9333 [2018-11-22 22:59:38,007 INFO L226 Difference]: Without dead ends: 9333 [2018-11-22 22:59:38,007 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:59:38,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9333 states. [2018-11-22 22:59:38,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9333 to 8974. [2018-11-22 22:59:38,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8974 states. [2018-11-22 22:59:38,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8974 states to 8974 states and 29675 transitions. [2018-11-22 22:59:38,110 INFO L78 Accepts]: Start accepts. Automaton has 8974 states and 29675 transitions. Word has length 100 [2018-11-22 22:59:38,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:38,110 INFO L480 AbstractCegarLoop]: Abstraction has 8974 states and 29675 transitions. [2018-11-22 22:59:38,110 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:38,110 INFO L276 IsEmpty]: Start isEmpty. Operand 8974 states and 29675 transitions. [2018-11-22 22:59:38,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:38,120 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:38,120 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:38,120 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:38,121 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:38,121 INFO L82 PathProgramCache]: Analyzing trace with hash 866833783, now seen corresponding path program 1 times [2018-11-22 22:59:38,121 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:38,121 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:38,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:38,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:38,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:38,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:38,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:38,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:38,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:38,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:38,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:38,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:38,309 INFO L87 Difference]: Start difference. First operand 8974 states and 29675 transitions. Second operand 6 states. [2018-11-22 22:59:38,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:38,556 INFO L93 Difference]: Finished difference Result 10194 states and 32931 transitions. [2018-11-22 22:59:38,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:59:38,557 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-22 22:59:38,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:38,568 INFO L225 Difference]: With dead ends: 10194 [2018-11-22 22:59:38,568 INFO L226 Difference]: Without dead ends: 9839 [2018-11-22 22:59:38,568 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:38,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9839 states. [2018-11-22 22:59:38,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9839 to 9154. [2018-11-22 22:59:38,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9154 states. [2018-11-22 22:59:38,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9154 states to 9154 states and 30059 transitions. [2018-11-22 22:59:38,671 INFO L78 Accepts]: Start accepts. Automaton has 9154 states and 30059 transitions. Word has length 100 [2018-11-22 22:59:38,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:38,671 INFO L480 AbstractCegarLoop]: Abstraction has 9154 states and 30059 transitions. [2018-11-22 22:59:38,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:38,671 INFO L276 IsEmpty]: Start isEmpty. Operand 9154 states and 30059 transitions. [2018-11-22 22:59:38,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:38,679 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:38,680 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:38,680 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:38,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:38,680 INFO L82 PathProgramCache]: Analyzing trace with hash -1727393034, now seen corresponding path program 1 times [2018-11-22 22:59:38,680 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:38,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:38,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:38,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:38,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:38,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:38,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:38,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:38,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:38,818 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:38,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:38,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:38,819 INFO L87 Difference]: Start difference. First operand 9154 states and 30059 transitions. Second operand 7 states. [2018-11-22 22:59:39,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:39,141 INFO L93 Difference]: Finished difference Result 10117 states and 33155 transitions. [2018-11-22 22:59:39,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:59:39,141 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-11-22 22:59:39,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:39,153 INFO L225 Difference]: With dead ends: 10117 [2018-11-22 22:59:39,153 INFO L226 Difference]: Without dead ends: 10117 [2018-11-22 22:59:39,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:39,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10117 states. [2018-11-22 22:59:39,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10117 to 9069. [2018-11-22 22:59:39,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9069 states. [2018-11-22 22:59:39,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9069 states to 9069 states and 29811 transitions. [2018-11-22 22:59:39,259 INFO L78 Accepts]: Start accepts. Automaton has 9069 states and 29811 transitions. Word has length 100 [2018-11-22 22:59:39,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:39,259 INFO L480 AbstractCegarLoop]: Abstraction has 9069 states and 29811 transitions. [2018-11-22 22:59:39,259 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:39,259 INFO L276 IsEmpty]: Start isEmpty. Operand 9069 states and 29811 transitions. [2018-11-22 22:59:39,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:39,268 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:39,268 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:39,268 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:39,268 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:39,268 INFO L82 PathProgramCache]: Analyzing trace with hash -316513514, now seen corresponding path program 1 times [2018-11-22 22:59:39,269 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:39,269 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:39,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:39,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:39,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:39,392 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:39,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:39,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:39,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:39,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:39,392 INFO L87 Difference]: Start difference. First operand 9069 states and 29811 transitions. Second operand 5 states. [2018-11-22 22:59:39,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:39,500 INFO L93 Difference]: Finished difference Result 8217 states and 26961 transitions. [2018-11-22 22:59:39,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:59:39,500 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 100 [2018-11-22 22:59:39,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:39,510 INFO L225 Difference]: With dead ends: 8217 [2018-11-22 22:59:39,510 INFO L226 Difference]: Without dead ends: 8217 [2018-11-22 22:59:39,510 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:39,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8217 states. [2018-11-22 22:59:39,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8217 to 8032. [2018-11-22 22:59:39,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8032 states. [2018-11-22 22:59:39,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8032 states to 8032 states and 26443 transitions. [2018-11-22 22:59:39,600 INFO L78 Accepts]: Start accepts. Automaton has 8032 states and 26443 transitions. Word has length 100 [2018-11-22 22:59:39,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:39,600 INFO L480 AbstractCegarLoop]: Abstraction has 8032 states and 26443 transitions. [2018-11-22 22:59:39,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:39,601 INFO L276 IsEmpty]: Start isEmpty. Operand 8032 states and 26443 transitions. [2018-11-22 22:59:39,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:39,609 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:39,609 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:39,609 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:39,609 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:39,609 INFO L82 PathProgramCache]: Analyzing trace with hash 705286743, now seen corresponding path program 1 times [2018-11-22 22:59:39,610 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:39,610 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:39,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:39,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:39,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:39,704 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:39,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:59:39,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:59:39,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:59:39,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:39,705 INFO L87 Difference]: Start difference. First operand 8032 states and 26443 transitions. Second operand 4 states. [2018-11-22 22:59:39,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:39,812 INFO L93 Difference]: Finished difference Result 9376 states and 31131 transitions. [2018-11-22 22:59:39,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:59:39,812 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-11-22 22:59:39,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:39,824 INFO L225 Difference]: With dead ends: 9376 [2018-11-22 22:59:39,824 INFO L226 Difference]: Without dead ends: 9376 [2018-11-22 22:59:39,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:59:39,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9376 states. [2018-11-22 22:59:39,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9376 to 9248. [2018-11-22 22:59:39,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9248 states. [2018-11-22 22:59:39,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9248 states to 9248 states and 30715 transitions. [2018-11-22 22:59:39,932 INFO L78 Accepts]: Start accepts. Automaton has 9248 states and 30715 transitions. Word has length 100 [2018-11-22 22:59:39,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:39,932 INFO L480 AbstractCegarLoop]: Abstraction has 9248 states and 30715 transitions. [2018-11-22 22:59:39,932 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:59:39,933 INFO L276 IsEmpty]: Start isEmpty. Operand 9248 states and 30715 transitions. [2018-11-22 22:59:39,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-22 22:59:39,942 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:39,942 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:39,942 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:39,943 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:39,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1371922600, now seen corresponding path program 1 times [2018-11-22 22:59:39,943 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:39,943 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:39,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:39,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:39,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:40,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:40,065 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:40,065 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:40,065 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:40,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:40,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:40,066 INFO L87 Difference]: Start difference. First operand 9248 states and 30715 transitions. Second operand 6 states. [2018-11-22 22:59:40,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:40,204 INFO L93 Difference]: Finished difference Result 8096 states and 26267 transitions. [2018-11-22 22:59:40,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:59:40,205 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-11-22 22:59:40,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:40,214 INFO L225 Difference]: With dead ends: 8096 [2018-11-22 22:59:40,215 INFO L226 Difference]: Without dead ends: 8096 [2018-11-22 22:59:40,215 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:40,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8096 states. [2018-11-22 22:59:40,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8096 to 6671. [2018-11-22 22:59:40,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6671 states. [2018-11-22 22:59:40,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6671 states to 6671 states and 21861 transitions. [2018-11-22 22:59:40,303 INFO L78 Accepts]: Start accepts. Automaton has 6671 states and 21861 transitions. Word has length 100 [2018-11-22 22:59:40,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:40,303 INFO L480 AbstractCegarLoop]: Abstraction has 6671 states and 21861 transitions. [2018-11-22 22:59:40,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:40,303 INFO L276 IsEmpty]: Start isEmpty. Operand 6671 states and 21861 transitions. [2018-11-22 22:59:40,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:40,311 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:40,311 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:40,311 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:40,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:40,312 INFO L82 PathProgramCache]: Analyzing trace with hash -497599059, now seen corresponding path program 1 times [2018-11-22 22:59:40,312 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:40,312 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:40,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:40,313 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:40,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:40,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:40,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:40,375 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:40,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:40,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:40,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:40,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:40,376 INFO L87 Difference]: Start difference. First operand 6671 states and 21861 transitions. Second operand 7 states. [2018-11-22 22:59:40,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:40,784 INFO L93 Difference]: Finished difference Result 12218 states and 39640 transitions. [2018-11-22 22:59:40,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-22 22:59:40,785 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-22 22:59:40,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:40,807 INFO L225 Difference]: With dead ends: 12218 [2018-11-22 22:59:40,807 INFO L226 Difference]: Without dead ends: 12218 [2018-11-22 22:59:40,808 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-22 22:59:40,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12218 states. [2018-11-22 22:59:40,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12218 to 9653. [2018-11-22 22:59:40,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9653 states. [2018-11-22 22:59:40,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9653 states to 9653 states and 31719 transitions. [2018-11-22 22:59:40,974 INFO L78 Accepts]: Start accepts. Automaton has 9653 states and 31719 transitions. Word has length 102 [2018-11-22 22:59:40,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:40,975 INFO L480 AbstractCegarLoop]: Abstraction has 9653 states and 31719 transitions. [2018-11-22 22:59:40,975 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:40,975 INFO L276 IsEmpty]: Start isEmpty. Operand 9653 states and 31719 transitions. [2018-11-22 22:59:40,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:40,984 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:40,984 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:40,984 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:40,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:40,984 INFO L82 PathProgramCache]: Analyzing trace with hash 747165422, now seen corresponding path program 1 times [2018-11-22 22:59:40,985 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:40,985 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:40,985 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:40,986 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:40,986 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:40,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:41,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:41,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:41,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:41,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:41,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:41,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:41,093 INFO L87 Difference]: Start difference. First operand 9653 states and 31719 transitions. Second operand 6 states. [2018-11-22 22:59:41,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:41,217 INFO L93 Difference]: Finished difference Result 9843 states and 32066 transitions. [2018-11-22 22:59:41,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:59:41,218 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-11-22 22:59:41,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:41,233 INFO L225 Difference]: With dead ends: 9843 [2018-11-22 22:59:41,233 INFO L226 Difference]: Without dead ends: 9843 [2018-11-22 22:59:41,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:59:41,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9843 states. [2018-11-22 22:59:41,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9843 to 9578. [2018-11-22 22:59:41,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9578 states. [2018-11-22 22:59:41,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9578 states to 9578 states and 31339 transitions. [2018-11-22 22:59:41,379 INFO L78 Accepts]: Start accepts. Automaton has 9578 states and 31339 transitions. Word has length 102 [2018-11-22 22:59:41,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:41,379 INFO L480 AbstractCegarLoop]: Abstraction has 9578 states and 31339 transitions. [2018-11-22 22:59:41,380 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:41,380 INFO L276 IsEmpty]: Start isEmpty. Operand 9578 states and 31339 transitions. [2018-11-22 22:59:41,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:41,392 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:41,393 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:41,393 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:41,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:41,393 INFO L82 PathProgramCache]: Analyzing trace with hash -167833298, now seen corresponding path program 1 times [2018-11-22 22:59:41,393 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:41,393 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:41,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:41,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:41,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:41,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:41,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:41,483 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:41,483 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:59:41,484 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:59:41,484 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:59:41,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:59:41,486 INFO L87 Difference]: Start difference. First operand 9578 states and 31339 transitions. Second operand 6 states. [2018-11-22 22:59:41,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:41,687 INFO L93 Difference]: Finished difference Result 12122 states and 38989 transitions. [2018-11-22 22:59:41,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:41,687 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-11-22 22:59:41,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:41,702 INFO L225 Difference]: With dead ends: 12122 [2018-11-22 22:59:41,702 INFO L226 Difference]: Without dead ends: 12122 [2018-11-22 22:59:41,703 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:59:41,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12122 states. [2018-11-22 22:59:41,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12122 to 9828. [2018-11-22 22:59:41,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9828 states. [2018-11-22 22:59:41,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9828 states to 9828 states and 31959 transitions. [2018-11-22 22:59:41,832 INFO L78 Accepts]: Start accepts. Automaton has 9828 states and 31959 transitions. Word has length 102 [2018-11-22 22:59:41,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:41,832 INFO L480 AbstractCegarLoop]: Abstraction has 9828 states and 31959 transitions. [2018-11-22 22:59:41,832 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:59:41,832 INFO L276 IsEmpty]: Start isEmpty. Operand 9828 states and 31959 transitions. [2018-11-22 22:59:41,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:41,842 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:41,843 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:41,843 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:41,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:41,843 INFO L82 PathProgramCache]: Analyzing trace with hash -597334546, now seen corresponding path program 2 times [2018-11-22 22:59:41,843 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:41,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:41,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:41,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:41,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:41,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:41,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:41,918 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:41,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:41,918 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:41,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:41,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:41,918 INFO L87 Difference]: Start difference. First operand 9828 states and 31959 transitions. Second operand 7 states. [2018-11-22 22:59:42,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:42,115 INFO L93 Difference]: Finished difference Result 9928 states and 32214 transitions. [2018-11-22 22:59:42,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-22 22:59:42,116 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-22 22:59:42,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:42,128 INFO L225 Difference]: With dead ends: 9928 [2018-11-22 22:59:42,128 INFO L226 Difference]: Without dead ends: 9928 [2018-11-22 22:59:42,128 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2018-11-22 22:59:42,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9928 states. [2018-11-22 22:59:42,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9928 to 9828. [2018-11-22 22:59:42,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9828 states. [2018-11-22 22:59:42,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9828 states to 9828 states and 31944 transitions. [2018-11-22 22:59:42,243 INFO L78 Accepts]: Start accepts. Automaton has 9828 states and 31944 transitions. Word has length 102 [2018-11-22 22:59:42,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:42,243 INFO L480 AbstractCegarLoop]: Abstraction has 9828 states and 31944 transitions. [2018-11-22 22:59:42,243 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:42,243 INFO L276 IsEmpty]: Start isEmpty. Operand 9828 states and 31944 transitions. [2018-11-22 22:59:42,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:42,253 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:42,253 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:42,253 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:42,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:42,254 INFO L82 PathProgramCache]: Analyzing trace with hash 1996892271, now seen corresponding path program 1 times [2018-11-22 22:59:42,254 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:42,254 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:42,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:42,255 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:59:42,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:42,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:42,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:42,332 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:42,332 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:59:42,334 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:59:42,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:59:42,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:59:42,334 INFO L87 Difference]: Start difference. First operand 9828 states and 31944 transitions. Second operand 5 states. [2018-11-22 22:59:42,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:42,510 INFO L93 Difference]: Finished difference Result 11108 states and 36104 transitions. [2018-11-22 22:59:42,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:59:42,511 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-11-22 22:59:42,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:42,524 INFO L225 Difference]: With dead ends: 11108 [2018-11-22 22:59:42,524 INFO L226 Difference]: Without dead ends: 11108 [2018-11-22 22:59:42,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:42,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11108 states. [2018-11-22 22:59:42,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11108 to 8660. [2018-11-22 22:59:42,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8660 states. [2018-11-22 22:59:42,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8660 states to 8660 states and 28255 transitions. [2018-11-22 22:59:42,646 INFO L78 Accepts]: Start accepts. Automaton has 8660 states and 28255 transitions. Word has length 102 [2018-11-22 22:59:42,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:42,647 INFO L480 AbstractCegarLoop]: Abstraction has 8660 states and 28255 transitions. [2018-11-22 22:59:42,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:59:42,647 INFO L276 IsEmpty]: Start isEmpty. Operand 8660 states and 28255 transitions. [2018-11-22 22:59:42,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:42,656 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:42,656 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:42,656 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:42,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:42,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1053310544, now seen corresponding path program 1 times [2018-11-22 22:59:42,657 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:42,657 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:42,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:42,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:42,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:42,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:42,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:42,819 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:42,819 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-22 22:59:42,819 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-22 22:59:42,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-22 22:59:42,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-22 22:59:42,820 INFO L87 Difference]: Start difference. First operand 8660 states and 28255 transitions. Second operand 10 states. [2018-11-22 22:59:43,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:43,143 INFO L93 Difference]: Finished difference Result 16320 states and 53652 transitions. [2018-11-22 22:59:43,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:59:43,143 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 102 [2018-11-22 22:59:43,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:43,154 INFO L225 Difference]: With dead ends: 16320 [2018-11-22 22:59:43,154 INFO L226 Difference]: Without dead ends: 8000 [2018-11-22 22:59:43,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=171, Unknown=0, NotChecked=0, Total=240 [2018-11-22 22:59:43,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8000 states. [2018-11-22 22:59:43,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8000 to 8000. [2018-11-22 22:59:43,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8000 states. [2018-11-22 22:59:43,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8000 states to 8000 states and 26319 transitions. [2018-11-22 22:59:43,248 INFO L78 Accepts]: Start accepts. Automaton has 8000 states and 26319 transitions. Word has length 102 [2018-11-22 22:59:43,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:43,248 INFO L480 AbstractCegarLoop]: Abstraction has 8000 states and 26319 transitions. [2018-11-22 22:59:43,248 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-22 22:59:43,248 INFO L276 IsEmpty]: Start isEmpty. Operand 8000 states and 26319 transitions. [2018-11-22 22:59:43,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:43,256 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:43,256 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:43,256 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:43,256 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:43,257 INFO L82 PathProgramCache]: Analyzing trace with hash -863716684, now seen corresponding path program 2 times [2018-11-22 22:59:43,257 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:43,257 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:43,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:43,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:43,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:43,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:43,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:43,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:43,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:43,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:43,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:43,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:43,345 INFO L87 Difference]: Start difference. First operand 8000 states and 26319 transitions. Second operand 7 states. [2018-11-22 22:59:43,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:43,560 INFO L93 Difference]: Finished difference Result 14610 states and 48898 transitions. [2018-11-22 22:59:43,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:59:43,561 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-22 22:59:43,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:43,571 INFO L225 Difference]: With dead ends: 14610 [2018-11-22 22:59:43,571 INFO L226 Difference]: Without dead ends: 6821 [2018-11-22 22:59:43,571 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-22 22:59:43,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6821 states. [2018-11-22 22:59:43,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6821 to 6821. [2018-11-22 22:59:43,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6821 states. [2018-11-22 22:59:43,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6821 states to 6821 states and 23131 transitions. [2018-11-22 22:59:43,654 INFO L78 Accepts]: Start accepts. Automaton has 6821 states and 23131 transitions. Word has length 102 [2018-11-22 22:59:43,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:43,655 INFO L480 AbstractCegarLoop]: Abstraction has 6821 states and 23131 transitions. [2018-11-22 22:59:43,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:43,655 INFO L276 IsEmpty]: Start isEmpty. Operand 6821 states and 23131 transitions. [2018-11-22 22:59:43,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:43,663 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:43,663 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:43,664 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:43,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1340703688, now seen corresponding path program 1 times [2018-11-22 22:59:43,664 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:43,664 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:43,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:43,665 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:59:43,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:43,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:43,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:43,752 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:43,753 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:43,753 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:43,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:43,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:43,753 INFO L87 Difference]: Start difference. First operand 6821 states and 23131 transitions. Second operand 7 states. [2018-11-22 22:59:44,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:44,046 INFO L93 Difference]: Finished difference Result 8957 states and 29585 transitions. [2018-11-22 22:59:44,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-22 22:59:44,046 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-22 22:59:44,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:44,057 INFO L225 Difference]: With dead ends: 8957 [2018-11-22 22:59:44,058 INFO L226 Difference]: Without dead ends: 8821 [2018-11-22 22:59:44,058 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:59:44,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8821 states. [2018-11-22 22:59:44,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8821 to 6805. [2018-11-22 22:59:44,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6805 states. [2018-11-22 22:59:44,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6805 states to 6805 states and 23039 transitions. [2018-11-22 22:59:44,149 INFO L78 Accepts]: Start accepts. Automaton has 6805 states and 23039 transitions. Word has length 102 [2018-11-22 22:59:44,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:44,149 INFO L480 AbstractCegarLoop]: Abstraction has 6805 states and 23039 transitions. [2018-11-22 22:59:44,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:44,149 INFO L276 IsEmpty]: Start isEmpty. Operand 6805 states and 23039 transitions. [2018-11-22 22:59:44,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:44,158 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:44,159 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:44,159 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:44,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:44,159 INFO L82 PathProgramCache]: Analyzing trace with hash 1018603321, now seen corresponding path program 1 times [2018-11-22 22:59:44,159 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:44,159 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:44,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:44,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:44,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:44,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:44,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:44,283 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:44,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:59:44,284 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:59:44,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:59:44,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:59:44,284 INFO L87 Difference]: Start difference. First operand 6805 states and 23039 transitions. Second operand 7 states. [2018-11-22 22:59:44,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:44,507 INFO L93 Difference]: Finished difference Result 13593 states and 46438 transitions. [2018-11-22 22:59:44,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:59:44,507 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-22 22:59:44,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:44,527 INFO L225 Difference]: With dead ends: 13593 [2018-11-22 22:59:44,527 INFO L226 Difference]: Without dead ends: 13593 [2018-11-22 22:59:44,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2018-11-22 22:59:44,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13593 states. [2018-11-22 22:59:44,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13593 to 6965. [2018-11-22 22:59:44,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6965 states. [2018-11-22 22:59:44,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6965 states to 6965 states and 23455 transitions. [2018-11-22 22:59:44,638 INFO L78 Accepts]: Start accepts. Automaton has 6965 states and 23455 transitions. Word has length 102 [2018-11-22 22:59:44,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:44,638 INFO L480 AbstractCegarLoop]: Abstraction has 6965 states and 23455 transitions. [2018-11-22 22:59:44,638 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:59:44,638 INFO L276 IsEmpty]: Start isEmpty. Operand 6965 states and 23455 transitions. [2018-11-22 22:59:44,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:44,645 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:44,645 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:44,646 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:44,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:44,646 INFO L82 PathProgramCache]: Analyzing trace with hash -682137158, now seen corresponding path program 3 times [2018-11-22 22:59:44,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:44,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:44,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:44,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:59:44,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:44,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:59:44,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:59:44,801 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:59:44,802 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-22 22:59:44,802 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-22 22:59:44,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-22 22:59:44,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:59:44,804 INFO L87 Difference]: Start difference. First operand 6965 states and 23455 transitions. Second operand 12 states. [2018-11-22 22:59:45,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:59:45,154 INFO L93 Difference]: Finished difference Result 13529 states and 45706 transitions. [2018-11-22 22:59:45,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-22 22:59:45,154 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 102 [2018-11-22 22:59:45,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:59:45,167 INFO L225 Difference]: With dead ends: 13529 [2018-11-22 22:59:45,167 INFO L226 Difference]: Without dead ends: 9625 [2018-11-22 22:59:45,167 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-11-22 22:59:45,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9625 states. [2018-11-22 22:59:45,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9625 to 9017. [2018-11-22 22:59:45,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9017 states. [2018-11-22 22:59:45,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9017 states to 9017 states and 29626 transitions. [2018-11-22 22:59:45,277 INFO L78 Accepts]: Start accepts. Automaton has 9017 states and 29626 transitions. Word has length 102 [2018-11-22 22:59:45,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:59:45,277 INFO L480 AbstractCegarLoop]: Abstraction has 9017 states and 29626 transitions. [2018-11-22 22:59:45,277 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-22 22:59:45,277 INFO L276 IsEmpty]: Start isEmpty. Operand 9017 states and 29626 transitions. [2018-11-22 22:59:45,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-22 22:59:45,286 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:59:45,286 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:59:45,286 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:59:45,286 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:59:45,286 INFO L82 PathProgramCache]: Analyzing trace with hash 1730295936, now seen corresponding path program 4 times [2018-11-22 22:59:45,286 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:59:45,286 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:59:45,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:45,287 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:59:45,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:59:45,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:59:45,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:59:45,352 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [495] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [376] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [462] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [517] L674-->L675: Formula: (= v_~__unbuffered_p2_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [439] L675-->L676: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [362] L676-->L678: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [435] L678-->L680: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [467] L680-->L681: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [394] L681-->L682: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [537] L682-->L683: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [460] L683-->L684: Formula: (= v_~y$r_buff0_thd0~0_19 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [390] L684-->L685: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [516] L685-->L686: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [438] L686-->L687: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [381] L687-->L688: Formula: (= v_~y$r_buff1_thd0~0_11 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [508] L688-->L689: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [434] L689-->L690: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [547] L690-->L691: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [466] L691-->L692: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [393] L692-->L693: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [535] L693-->L694: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [459] L694-->L695: Formula: (= v_~y$w_buff0_used~0_41 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [389] L695-->L696: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [515] L696-->L698: Formula: (= v_~y$w_buff1_used~0_25 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [380] L698-->L699: Formula: (= v_~z~0_3 0) InVars {} OutVars{~z~0=v_~z~0_3} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [507] L699-->L700: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [433] L700-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [536] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [534] L-1-2-->L776: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_3|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_3|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_3|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_3|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_~#t1514~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1513~0.base, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_~#t1512~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_~#t1514~0.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1513~0.offset, ULTIMATE.start_main_~#t1512~0.offset, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [498] L776-->L776-1: Formula: (and (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1512~0.base_4| 1) |v_#valid_9|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1512~0.base_4| 4) |v_#length_1|) (not (= 0 |v_ULTIMATE.start_main_~#t1512~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1512~0.offset_4|) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1512~0.base_4|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_4|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_4|, #length=|v_#length_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1512~0.base, #valid, ULTIMATE.start_main_~#t1512~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [501] L776-1-->L777: Formula: (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1512~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1512~0.base_5|) |v_ULTIMATE.start_main_~#t1512~0.offset_5| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_5|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_5|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [608] L777-->P0ENTRY: Formula: (and (= 0 |v_Thread1_P0_#in~arg.base_3|) (= 0 v_Thread1_P0_thidvar0_2) (= 0 |v_Thread1_P0_#in~arg.offset_3|)) InVars {} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_3|, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_3|, Thread1_P0_thidvar0=v_Thread1_P0_thidvar0_2} AuxVars[] AssignedVars[Thread1_P0_#in~arg.base, Thread1_P0_#in~arg.offset, Thread1_P0_thidvar0] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [428] L777-1-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [375] L778-->L778-1: Formula: (and (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1513~0.base_4| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1513~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1513~0.offset_4|) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1513~0.base_4| 4)) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1513~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_4|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1513~0.offset, #valid, ULTIMATE.start_main_~#t1513~0.base, #length] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [540] L778-1-->L779: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1513~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1513~0.base_5|) |v_ULTIMATE.start_main_~#t1513~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [609] L779-->P1ENTRY: Formula: (and (= |v_Thread2_P1_#in~arg.base_3| 0) (= v_Thread2_P1_thidvar0_2 1) (= 0 |v_Thread2_P1_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_3|, Thread2_P1_thidvar0=v_Thread2_P1_thidvar0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P1_#in~arg.base, Thread2_P1_thidvar0, Thread2_P1_#in~arg.offset] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [487] L779-1-->L780: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [415] L780-->L780-1: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t1514~0.base_4| 4) |v_#length_5|) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t1514~0.base_4|)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t1514~0.base_4| 1) |v_#valid_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1514~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1514~0.offset_4|)) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_5|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_4|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1514~0.base, ULTIMATE.start_main_~#t1514~0.offset, #valid, #length] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [416] L780-1-->L781: Formula: (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1514~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1514~0.base_5|) |v_ULTIMATE.start_main_~#t1514~0.offset_5| 2)) |v_#memory_int_5|) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_5|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_5|} OutVars{#memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_5|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [607] L781-->P2ENTRY: Formula: (and (= |v_Thread0_P2_#in~arg.offset_3| 0) (= 0 |v_Thread0_P2_#in~arg.base_3|) (= 2 v_Thread0_P2_thidvar0_2)) InVars {} OutVars{Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_3|, Thread0_P2_thidvar0=v_Thread0_P2_thidvar0_2, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P2_#in~arg.base, Thread0_P2_thidvar0, Thread0_P2_#in~arg.offset] VAL [Thread0_P2_thidvar0=2, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [580] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread0_P2_~arg.offset_1 |v_Thread0_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread0_P2___VERIFIER_assert_~expression_1 |v_Thread0_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread0_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread0_P2_~arg.base_1 |v_Thread0_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, ~y$w_buff0~0=v_~y$w_buff0~0_4} OutVars{Thread0_P2_~arg.offset=v_Thread0_P2_~arg.offset_1, Thread0_P2_~arg.base=v_Thread0_P2_~arg.base_1, Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread0_P2___VERIFIER_assert_#in~expression=|v_Thread0_P2___VERIFIER_assert_#in~expression_1|, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread0_P2_~arg.offset, Thread0_P2_~arg.base, Thread0_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread0_P2___VERIFIER_assert_#in~expression, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [582] L4-->L4-3: Formula: (not (= 0 v_Thread0_P2___VERIFIER_assert_~expression_3)) InVars {Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} OutVars{Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [585] L4-3-->L754: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13) (= v_~__unbuffered_p2_EAX~0_1 v_~z~0_2)) InVars {~z~0=v_~z~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, ~z~0=v_~z~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 [554] P0ENTRY-->L714: Formula: (and (= v_Thread1_P0_~arg.base_1 |v_Thread1_P0_#in~arg.base_1|) (= v_Thread1_P0_~arg.offset_1 |v_Thread1_P0_#in~arg.offset_1|) (= v_~z~0_1 1) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~x~0_1 1)) InVars {Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, Thread1_P0_~arg.offset=v_Thread1_P0_~arg.offset_1, Thread1_P0_~arg.base=v_Thread1_P0_~arg.base_1, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[Thread1_P0_~arg.offset, Thread1_P0_~arg.base, ~__unbuffered_cnt~0, ~z~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [586] L754-->L754-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread0_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread0_P2_#t~ite12] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 [558] P1ENTRY-->L725: Formula: (and (= v_Thread2_P1_~arg.offset_1 |v_Thread2_P1_#in~arg.offset_1|) (= v_Thread2_P1_~arg.base_1 |v_Thread2_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_~arg.offset=v_Thread2_P1_~arg.offset_1, Thread2_P1_~arg.base=v_Thread2_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread2_P1_~arg.offset, Thread2_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [560] L725-->L725-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [563] L725-2-->L725-4: Formula: (and (= |v_Thread2_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread2_P1_#t~ite4] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [566] L725-4-->L725-5: Formula: (= |v_Thread2_P1_#t~ite5_4| |v_Thread2_P1_#t~ite4_4|) InVars {Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|} OutVars{Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=1, |Thread2_P1_#t~ite5|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [561] L725-5-->L726: Formula: (= v_~y~0_3 |v_Thread2_P1_#t~ite5_2|) InVars {Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_2|} OutVars{~y~0=v_~y~0_3, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_1|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_3|} AuxVars[] AssignedVars[~y~0, Thread2_P1_#t~ite4, Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [565] L726-->L726-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread2_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_2|} AuxVars[] AssignedVars[Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite6|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [567] L726-2-->L727: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread2_P1_#t~ite6_3|) InVars {Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [569] L727-->L727-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread2_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread2_P1_#t~ite7] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite7|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [570] L727-2-->L728: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread2_P1_#t~ite7_3|) InVars {Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_3|} OutVars{Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread2_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [572] L728-->L728-2: Formula: (and (= |v_Thread2_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [588] L754-5-->L755: Formula: (= v_~y~0_5 |v_Thread0_P2_#t~ite12_2|) InVars {Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_2|} OutVars{Thread0_P2_#t~ite11=|v_Thread0_P2_#t~ite11_1|, Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread0_P2_#t~ite11, Thread0_P2_#t~ite12, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [573] L728-2-->L729: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread2_P1_#t~ite8_3|) InVars {Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_3|} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [575] L729-->L729-2: Formula: (and (= |v_Thread2_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite9|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [576] L729-2-->L734: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread2_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [591] L755-->L755-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread0_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite13|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [594] L755-2-->L756: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread0_P2_#t~ite13_3|) InVars {Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [596] L756-->L756-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread0_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread0_P2_#t~ite14] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite14|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [597] L756-2-->L757: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread0_P2_#t~ite14_3|) InVars {Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_3|} OutVars{Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread0_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [599] L757-->L757-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread0_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_2|} AuxVars[] AssignedVars[Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite15|=1, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [600] L757-2-->L758: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread0_P2_#t~ite15_3|) InVars {Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [602] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread0_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite16|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [603] L758-2-->L763: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread0_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [531] L781-1-->L785: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [450] L785-->L787: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [497] L787-->L787-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd0~0_21 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [505] L787-2-->L787-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_13 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [511] L787-4-->L787-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [480] L787-5-->L788: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [426] L788-->L788-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_45 256)) (= 0 (mod v_~y$r_buff0_thd0~0_23 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_45)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [432] L788-2-->L789: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [372] L789-->L789-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= 0 (mod v_~y$r_buff1_thd0~0_15 256))) (or (= (mod v_~y$r_buff0_thd0~0_25 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_29)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [543] L789-2-->L790: Formula: (= v_~y$w_buff1_used~0_30 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [485] L790-->L790-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_27) (or (= 0 (mod v_~y$r_buff0_thd0~0_27 256)) (= 0 (mod v_~y$w_buff0_used~0_50 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [465] L790-2-->L791: Formula: (= v_~y$r_buff0_thd0~0_28 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [413] L791-->L791-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_17) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= 0 (mod v_~y$r_buff1_thd0~0_17 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [419] L791-2-->L798: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~y$r_buff1_thd0~0_18 |v_ULTIMATE.start_main_#t~ite26_5|) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [493] L798-->L798-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_31 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (and (= (mod v_~y$r_buff1_thd0~0_19 256) 0) .cse0) (and .cse0 (= (mod v_~y$w_buff1_used~0_33 256) 0)))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [478] L798-5-->L799: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [445] L799-->L799-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [414] L799-8-->L800: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [369] L800-->L800-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [529] L800-8-->L801: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [482] L801-->L801-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_65)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [455] L801-8-->L802: Formula: (= v_~y$w_buff0_used~0_28 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [410] L802-->L802-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_17) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [406] L802-8-->L803: Formula: (= v_~y$w_buff1_used~0_20 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [527] L803-->L803-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_9) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [523] L803-8-->L804: Formula: (= v_~y$r_buff0_thd0~0_14 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [453] L804-->L804-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [449] L804-8-->L806: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= v_~__unbuffered_p2_EAX~0_2 0) (= 2 v_~y~0_6))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_10 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [521] L806-->L806-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [512] L806-2-->L809: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [492] L809-->L809-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [499] L809-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [407] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [404] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [401] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P1_#t~ite5|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite22;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite31;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite36;havoc main_#t~ite34; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite38;havoc main_#t~ite39;havoc main_#t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite42;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite45;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P1_#t~ite5|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite22;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite31;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite36;havoc main_#t~ite34; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite38;havoc main_#t~ite39;havoc main_#t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite42;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite45;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L755] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L794] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L795] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 assume 0 != ~weak$$choice2~0 % 256; [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 assume 0 != ~weak$$choice2~0 % 256; [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 assume 0 != ~y$flush_delayed~0 % 256; [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L755] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L794] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L795] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 assume 0 != ~weak$$choice2~0 % 256; [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 assume 0 != ~weak$$choice2~0 % 256; [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 assume 0 != ~y$flush_delayed~0 % 256; [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0, main_~#t1513~0, main_~#t1514~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, main_~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, main_~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, main_~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L794] -1 havoc main_#t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L795] -1 havoc main_#t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0, main_~#t1513~0, main_~#t1514~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, main_~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, main_~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, main_~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L794] -1 havoc main_#t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L795] -1 havoc main_#t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, ~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, ~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, ~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, #t~ite5=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc #t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := #t~ite22; [L787] -1 havoc #t~ite22; [L787] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite23; [L788] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite24; [L789] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L790] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L791] -1 havoc #t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L794] -1 havoc #t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L795] -1 havoc #t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := #t~ite30; [L798] -1 havoc #t~ite29; [L798] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := #t~ite33; [L799] -1 havoc #t~ite31; [L799] -1 havoc #t~ite32; [L799] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := #t~ite36; [L800] -1 havoc #t~ite35; [L800] -1 havoc #t~ite36; [L800] -1 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := #t~ite39; [L801] -1 havoc #t~ite38; [L801] -1 havoc #t~ite39; [L801] -1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := #t~ite42; [L802] -1 havoc #t~ite41; [L802] -1 havoc #t~ite42; [L802] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L803] -1 havoc #t~ite43; [L803] -1 havoc #t~ite45; [L803] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L804] -1 havoc #t~ite48; [L804] -1 havoc #t~ite47; [L804] -1 havoc #t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := #t~ite49; [L806] -1 havoc #t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, ~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, ~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, ~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, #t~ite5=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc #t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := #t~ite22; [L787] -1 havoc #t~ite22; [L787] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite23; [L788] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite24; [L789] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L790] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L791] -1 havoc #t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L794] -1 havoc #t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L795] -1 havoc #t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := #t~ite30; [L798] -1 havoc #t~ite29; [L798] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := #t~ite33; [L799] -1 havoc #t~ite31; [L799] -1 havoc #t~ite32; [L799] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := #t~ite36; [L800] -1 havoc #t~ite35; [L800] -1 havoc #t~ite36; [L800] -1 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := #t~ite39; [L801] -1 havoc #t~ite38; [L801] -1 havoc #t~ite39; [L801] -1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := #t~ite42; [L802] -1 havoc #t~ite41; [L802] -1 havoc #t~ite42; [L802] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L803] -1 havoc #t~ite43; [L803] -1 havoc #t~ite45; [L803] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L804] -1 havoc #t~ite48; [L804] -1 havoc #t~ite47; [L804] -1 havoc #t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := #t~ite49; [L806] -1 havoc #t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L675] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L676] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L678] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L681] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L682] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L683] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L684] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L685] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L686] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L691] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L692] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L693] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L694] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L695] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L696] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L698] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t1512; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t1512, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1513; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1513, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1514; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1514, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L739] 0 y$w_buff1 = y$w_buff0 [L740] 0 y$w_buff0 = 2 [L741] 0 y$w_buff1_used = y$w_buff0_used [L742] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L744] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L745] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L746] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L747] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L748] 0 y$r_buff0_thd3 = (_Bool)1 [L751] 0 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L704] 1 z = 1 [L707] 1 x = 1 [L712] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 2 x = 2 [L722] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L727] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L728] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L732] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L761] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L795] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L796] -1 y$flush_delayed = weak$$choice2 [L797] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L802] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L803] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L804] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] -1 y = y$flush_delayed ? y$mem_tmp : y [L807] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-22 22:59:47,961 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-22 22:59:47,962 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.11 10:59:47 BasicIcfg [2018-11-22 22:59:47,963 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-22 22:59:47,963 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-22 22:59:47,963 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-22 22:59:47,963 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-22 22:59:47,964 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:58:36" (3/4) ... [2018-11-22 22:59:47,966 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [495] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [376] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [462] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [517] L674-->L675: Formula: (= v_~__unbuffered_p2_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [439] L675-->L676: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [362] L676-->L678: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [435] L678-->L680: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [467] L680-->L681: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [394] L681-->L682: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [537] L682-->L683: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [460] L683-->L684: Formula: (= v_~y$r_buff0_thd0~0_19 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [390] L684-->L685: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [516] L685-->L686: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [438] L686-->L687: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [381] L687-->L688: Formula: (= v_~y$r_buff1_thd0~0_11 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [508] L688-->L689: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [434] L689-->L690: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [547] L690-->L691: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [466] L691-->L692: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [393] L692-->L693: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [535] L693-->L694: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [459] L694-->L695: Formula: (= v_~y$w_buff0_used~0_41 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [389] L695-->L696: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [515] L696-->L698: Formula: (= v_~y$w_buff1_used~0_25 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [380] L698-->L699: Formula: (= v_~z~0_3 0) InVars {} OutVars{~z~0=v_~z~0_3} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [507] L699-->L700: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [433] L700-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [536] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [534] L-1-2-->L776: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_3|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_3|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_3|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_3|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_~#t1514~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1513~0.base, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_~#t1512~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_~#t1514~0.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1513~0.offset, ULTIMATE.start_main_~#t1512~0.offset, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [498] L776-->L776-1: Formula: (and (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1512~0.base_4| 1) |v_#valid_9|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1512~0.base_4| 4) |v_#length_1|) (not (= 0 |v_ULTIMATE.start_main_~#t1512~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1512~0.offset_4|) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1512~0.base_4|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_4|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_4|, #length=|v_#length_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1512~0.base, #valid, ULTIMATE.start_main_~#t1512~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [501] L776-1-->L777: Formula: (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1512~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1512~0.base_5|) |v_ULTIMATE.start_main_~#t1512~0.offset_5| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_5|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1512~0.base=|v_ULTIMATE.start_main_~#t1512~0.base_5|, ULTIMATE.start_main_~#t1512~0.offset=|v_ULTIMATE.start_main_~#t1512~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [608] L777-->P0ENTRY: Formula: (and (= 0 |v_Thread1_P0_#in~arg.base_3|) (= 0 v_Thread1_P0_thidvar0_2) (= 0 |v_Thread1_P0_#in~arg.offset_3|)) InVars {} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_3|, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_3|, Thread1_P0_thidvar0=v_Thread1_P0_thidvar0_2} AuxVars[] AssignedVars[Thread1_P0_#in~arg.base, Thread1_P0_#in~arg.offset, Thread1_P0_thidvar0] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [428] L777-1-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [375] L778-->L778-1: Formula: (and (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1513~0.base_4| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1513~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1513~0.offset_4|) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1513~0.base_4| 4)) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1513~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_4|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1513~0.offset, #valid, ULTIMATE.start_main_~#t1513~0.base, #length] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [540] L778-1-->L779: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1513~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1513~0.base_5|) |v_ULTIMATE.start_main_~#t1513~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1513~0.base=|v_ULTIMATE.start_main_~#t1513~0.base_5|, ULTIMATE.start_main_~#t1513~0.offset=|v_ULTIMATE.start_main_~#t1513~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [609] L779-->P1ENTRY: Formula: (and (= |v_Thread2_P1_#in~arg.base_3| 0) (= v_Thread2_P1_thidvar0_2 1) (= 0 |v_Thread2_P1_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_3|, Thread2_P1_thidvar0=v_Thread2_P1_thidvar0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P1_#in~arg.base, Thread2_P1_thidvar0, Thread2_P1_#in~arg.offset] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [487] L779-1-->L780: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [415] L780-->L780-1: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t1514~0.base_4| 4) |v_#length_5|) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t1514~0.base_4|)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t1514~0.base_4| 1) |v_#valid_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1514~0.base_4|)) (= 0 |v_ULTIMATE.start_main_~#t1514~0.offset_4|)) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_5|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_4|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1514~0.base, ULTIMATE.start_main_~#t1514~0.offset, #valid, #length] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [416] L780-1-->L781: Formula: (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1514~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t1514~0.base_5|) |v_ULTIMATE.start_main_~#t1514~0.offset_5| 2)) |v_#memory_int_5|) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_5|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_5|} OutVars{#memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t1514~0.base=|v_ULTIMATE.start_main_~#t1514~0.base_5|, ULTIMATE.start_main_~#t1514~0.offset=|v_ULTIMATE.start_main_~#t1514~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [607] L781-->P2ENTRY: Formula: (and (= |v_Thread0_P2_#in~arg.offset_3| 0) (= 0 |v_Thread0_P2_#in~arg.base_3|) (= 2 v_Thread0_P2_thidvar0_2)) InVars {} OutVars{Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_3|, Thread0_P2_thidvar0=v_Thread0_P2_thidvar0_2, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P2_#in~arg.base, Thread0_P2_thidvar0, Thread0_P2_#in~arg.offset] VAL [Thread0_P2_thidvar0=2, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [580] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread0_P2_~arg.offset_1 |v_Thread0_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread0_P2___VERIFIER_assert_~expression_1 |v_Thread0_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread0_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread0_P2_~arg.base_1 |v_Thread0_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, ~y$w_buff0~0=v_~y$w_buff0~0_4} OutVars{Thread0_P2_~arg.offset=v_Thread0_P2_~arg.offset_1, Thread0_P2_~arg.base=v_Thread0_P2_~arg.base_1, Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread0_P2___VERIFIER_assert_#in~expression=|v_Thread0_P2___VERIFIER_assert_#in~expression_1|, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread0_P2_~arg.offset, Thread0_P2_~arg.base, Thread0_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread0_P2___VERIFIER_assert_#in~expression, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [582] L4-->L4-3: Formula: (not (= 0 v_Thread0_P2___VERIFIER_assert_~expression_3)) InVars {Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} OutVars{Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [585] L4-3-->L754: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13) (= v_~__unbuffered_p2_EAX~0_1 v_~z~0_2)) InVars {~z~0=v_~z~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, ~z~0=v_~z~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 [554] P0ENTRY-->L714: Formula: (and (= v_Thread1_P0_~arg.base_1 |v_Thread1_P0_#in~arg.base_1|) (= v_Thread1_P0_~arg.offset_1 |v_Thread1_P0_#in~arg.offset_1|) (= v_~z~0_1 1) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~x~0_1 1)) InVars {Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, Thread1_P0_~arg.offset=v_Thread1_P0_~arg.offset_1, Thread1_P0_~arg.base=v_Thread1_P0_~arg.base_1, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[Thread1_P0_~arg.offset, Thread1_P0_~arg.base, ~__unbuffered_cnt~0, ~z~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [586] L754-->L754-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread0_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread0_P2_#t~ite12] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 [558] P1ENTRY-->L725: Formula: (and (= v_Thread2_P1_~arg.offset_1 |v_Thread2_P1_#in~arg.offset_1|) (= v_Thread2_P1_~arg.base_1 |v_Thread2_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_~arg.offset=v_Thread2_P1_~arg.offset_1, Thread2_P1_~arg.base=v_Thread2_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread2_P1_~arg.offset, Thread2_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [560] L725-->L725-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [563] L725-2-->L725-4: Formula: (and (= |v_Thread2_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread2_P1_#t~ite4] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [566] L725-4-->L725-5: Formula: (= |v_Thread2_P1_#t~ite5_4| |v_Thread2_P1_#t~ite4_4|) InVars {Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|} OutVars{Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=1, |Thread2_P1_#t~ite5|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [561] L725-5-->L726: Formula: (= v_~y~0_3 |v_Thread2_P1_#t~ite5_2|) InVars {Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_2|} OutVars{~y~0=v_~y~0_3, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_1|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_3|} AuxVars[] AssignedVars[~y~0, Thread2_P1_#t~ite4, Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [565] L726-->L726-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread2_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_2|} AuxVars[] AssignedVars[Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite6|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [567] L726-2-->L727: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread2_P1_#t~ite6_3|) InVars {Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [569] L727-->L727-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread2_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread2_P1_#t~ite7] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite7|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [570] L727-2-->L728: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread2_P1_#t~ite7_3|) InVars {Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_3|} OutVars{Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread2_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 [572] L728-->L728-2: Formula: (and (= |v_Thread2_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [588] L754-5-->L755: Formula: (= v_~y~0_5 |v_Thread0_P2_#t~ite12_2|) InVars {Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_2|} OutVars{Thread0_P2_#t~ite11=|v_Thread0_P2_#t~ite11_1|, Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread0_P2_#t~ite11, Thread0_P2_#t~ite12, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [573] L728-2-->L729: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread2_P1_#t~ite8_3|) InVars {Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_3|} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [575] L729-->L729-2: Formula: (and (= |v_Thread2_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite9|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 [576] L729-2-->L734: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread2_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [591] L755-->L755-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread0_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite13|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [594] L755-2-->L756: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread0_P2_#t~ite13_3|) InVars {Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [596] L756-->L756-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread0_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread0_P2_#t~ite14] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite14|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [597] L756-2-->L757: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread0_P2_#t~ite14_3|) InVars {Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_3|} OutVars{Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread0_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [599] L757-->L757-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread0_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_2|} AuxVars[] AssignedVars[Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite15|=1, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [600] L757-2-->L758: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread0_P2_#t~ite15_3|) InVars {Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [602] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread0_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite16|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 [603] L758-2-->L763: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread0_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [531] L781-1-->L785: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [450] L785-->L787: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [497] L787-->L787-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd0~0_21 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [505] L787-2-->L787-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_13 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [511] L787-4-->L787-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [480] L787-5-->L788: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [426] L788-->L788-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_45 256)) (= 0 (mod v_~y$r_buff0_thd0~0_23 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_45)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [432] L788-2-->L789: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [372] L789-->L789-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= 0 (mod v_~y$r_buff1_thd0~0_15 256))) (or (= (mod v_~y$r_buff0_thd0~0_25 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_29)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [543] L789-2-->L790: Formula: (= v_~y$w_buff1_used~0_30 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [485] L790-->L790-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_27) (or (= 0 (mod v_~y$r_buff0_thd0~0_27 256)) (= 0 (mod v_~y$w_buff0_used~0_50 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [465] L790-2-->L791: Formula: (= v_~y$r_buff0_thd0~0_28 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [413] L791-->L791-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_17) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= 0 (mod v_~y$r_buff1_thd0~0_17 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [419] L791-2-->L798: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~y$r_buff1_thd0~0_18 |v_ULTIMATE.start_main_#t~ite26_5|) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [493] L798-->L798-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_31 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (and (= (mod v_~y$r_buff1_thd0~0_19 256) 0) .cse0) (and .cse0 (= (mod v_~y$w_buff1_used~0_33 256) 0)))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [478] L798-5-->L799: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [445] L799-->L799-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [414] L799-8-->L800: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [369] L800-->L800-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [529] L800-8-->L801: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [482] L801-->L801-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_65)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [455] L801-8-->L802: Formula: (= v_~y$w_buff0_used~0_28 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [410] L802-->L802-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_17) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [406] L802-8-->L803: Formula: (= v_~y$w_buff1_used~0_20 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [527] L803-->L803-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_9) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [523] L803-8-->L804: Formula: (= v_~y$r_buff0_thd0~0_14 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [453] L804-->L804-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [449] L804-8-->L806: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= v_~__unbuffered_p2_EAX~0_2 0) (= 2 v_~y~0_6))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_10 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [521] L806-->L806-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [512] L806-2-->L809: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [492] L809-->L809-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [499] L809-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [407] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [404] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 [401] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P1_#t~ite5|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite22;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite31;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite36;havoc main_#t~ite34; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite38;havoc main_#t~ite39;havoc main_#t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite42;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite45;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~__unbuffered_p2_EAX~0 := ~z~0; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 1;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=1, |P1_#t~ite5|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite22;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite31;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite35;havoc main_#t~ite36;havoc main_#t~ite34; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite38;havoc main_#t~ite39;havoc main_#t~ite37; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite42;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite43;havoc main_#t~ite45;havoc main_#t~ite44; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite48;havoc main_#t~ite47;havoc main_#t~ite46;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1512~0.base|=6, |ULTIMATE.start_main_~#t1512~0.offset|=0, |ULTIMATE.start_main_~#t1513~0.base|=5, |ULTIMATE.start_main_~#t1513~0.offset|=0, |ULTIMATE.start_main_~#t1514~0.base|=7, |ULTIMATE.start_main_~#t1514~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L755] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L794] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L795] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 assume 0 != ~weak$$choice2~0 % 256; [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 assume 0 != ~weak$$choice2~0 % 256; [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 assume 0 != ~y$flush_delayed~0 % 256; [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0.base, main_~#t1512~0.offset, main_~#t1513~0.base, main_~#t1513~0.offset, main_~#t1514~0.base, main_~#t1514~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t1512~0.base, main_~#t1512~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(0, main_~#t1512~0.base, main_~#t1512~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1513~0.base, main_~#t1513~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(1, main_~#t1513~0.base, main_~#t1513~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1514~0.base, main_~#t1514~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(2, main_~#t1514~0.base, main_~#t1514~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L755] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L794] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L795] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 assume 0 != ~weak$$choice2~0 % 256; [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 assume 0 != ~weak$$choice2~0 % 256; [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 assume 0 != ~y$flush_delayed~0 % 256; [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0.base=6, main_~#t1512~0.offset=0, main_~#t1513~0.base=5, main_~#t1513~0.offset=0, main_~#t1514~0.base=7, main_~#t1514~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0, main_~#t1513~0, main_~#t1514~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, main_~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, main_~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, main_~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L794] -1 havoc main_#t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L795] -1 havoc main_#t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t1512~0, main_~#t1513~0, main_~#t1514~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, main_~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, main_~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, main_~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L743] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L743] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite4=1, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc main_#t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite22; [L787] -1 havoc main_#t~ite22; [L787] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L788] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L789] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L790] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L791] -1 havoc main_#t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L794] -1 havoc main_#t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L795] -1 havoc main_#t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := main_#t~ite30; [L798] -1 havoc main_#t~ite29; [L798] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := main_#t~ite33; [L799] -1 havoc main_#t~ite31; [L799] -1 havoc main_#t~ite32; [L799] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := main_#t~ite36; [L800] -1 havoc main_#t~ite35; [L800] -1 havoc main_#t~ite36; [L800] -1 havoc main_#t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L801] -1 havoc main_#t~ite38; [L801] -1 havoc main_#t~ite39; [L801] -1 havoc main_#t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L802] -1 havoc main_#t~ite41; [L802] -1 havoc main_#t~ite42; [L802] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L803] -1 havoc main_#t~ite43; [L803] -1 havoc main_#t~ite45; [L803] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L804] -1 havoc main_#t~ite48; [L804] -1 havoc main_#t~ite47; [L804] -1 havoc main_#t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := main_#t~ite49; [L806] -1 havoc main_#t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L809] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1512~0!base=6, main_~#t1512~0!offset=0, main_~#t1513~0!base=5, main_~#t1513~0!offset=0, main_~#t1514~0!base=7, main_~#t1514~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, ~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, ~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, ~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, #t~ite5=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc #t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := #t~ite22; [L787] -1 havoc #t~ite22; [L787] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite23; [L788] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite24; [L789] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L790] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L791] -1 havoc #t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L794] -1 havoc #t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L795] -1 havoc #t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := #t~ite30; [L798] -1 havoc #t~ite29; [L798] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := #t~ite33; [L799] -1 havoc #t~ite31; [L799] -1 havoc #t~ite32; [L799] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := #t~ite36; [L800] -1 havoc #t~ite35; [L800] -1 havoc #t~ite36; [L800] -1 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := #t~ite39; [L801] -1 havoc #t~ite38; [L801] -1 havoc #t~ite39; [L801] -1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := #t~ite42; [L802] -1 havoc #t~ite41; [L802] -1 havoc #t~ite42; [L802] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L803] -1 havoc #t~ite43; [L803] -1 havoc #t~ite45; [L803] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L804] -1 havoc #t~ite48; [L804] -1 havoc #t~ite47; [L804] -1 havoc #t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := #t~ite49; [L806] -1 havoc #t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0] [L675] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L676] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L678] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L681] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L682] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L685] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L686] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L691] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L692] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L693] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L694] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L695] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L699] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L700] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t1512~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(0, ~#t1512~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1513~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(1, ~#t1513~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1514~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(2, ~#t1514~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L736-L764] 0 ~arg := #in~arg; [L739] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L740] 0 ~y$w_buff0~0 := 2; [L741] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L742] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L744] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L745] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L746] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L747] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L748] 0 ~y$r_buff0_thd3~0 := 1; [L751] 0 ~__unbuffered_p2_EAX~0 := ~z~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701-L715] 1 ~arg := #in~arg; [L704] 1 ~z~0 := 1; [L707] 1 ~x~0 := 1; [L712] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L754] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L754] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716-L735] 2 ~arg := #in~arg; [L719] 2 ~x~0 := 2; [L722] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L725] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, #t~ite5=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L725] 2 ~y~0 := #t~ite5; [L725] 2 havoc #t~ite5; [L725] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L726] 2 ~y$w_buff0_used~0 := #t~ite6; [L726] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L727] 2 ~y$w_buff1_used~0 := #t~ite7; [L727] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L728] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L728] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L754] 0 ~y~0 := #t~ite12; [L754] 0 havoc #t~ite11; [L754] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L728] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L728] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L729] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L729] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L729] 2 havoc #t~ite9; [L732] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L755] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite13; [L755] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite14; [L756] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L757] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L757] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L757] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L758] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L758] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L758] 0 havoc #t~ite16; [L761] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L781] -1 havoc #t~nondet20; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L787] -1 ~y~0 := #t~ite22; [L787] -1 havoc #t~ite22; [L787] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite23; [L788] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite24; [L789] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L790] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L791] -1 havoc #t~ite26; [L794] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L794] -1 havoc #t~nondet27; [L795] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L795] -1 havoc #t~nondet28; [L796] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L797] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L798] -1 ~y~0 := #t~ite30; [L798] -1 havoc #t~ite29; [L798] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L799] -1 ~y$w_buff0~0 := #t~ite33; [L799] -1 havoc #t~ite31; [L799] -1 havoc #t~ite32; [L799] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L800] -1 ~y$w_buff1~0 := #t~ite36; [L800] -1 havoc #t~ite35; [L800] -1 havoc #t~ite36; [L800] -1 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L801] -1 ~y$w_buff0_used~0 := #t~ite39; [L801] -1 havoc #t~ite38; [L801] -1 havoc #t~ite39; [L801] -1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L802] -1 ~y$w_buff1_used~0 := #t~ite42; [L802] -1 havoc #t~ite41; [L802] -1 havoc #t~ite42; [L802] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L803] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L803] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L803] -1 havoc #t~ite43; [L803] -1 havoc #t~ite45; [L803] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L804] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L804] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L804] -1 havoc #t~ite48; [L804] -1 havoc #t~ite47; [L804] -1 havoc #t~ite46; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 0 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L806] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L806] -1 ~y~0 := #t~ite49; [L806] -1 havoc #t~ite49; [L807] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L675] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L676] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L678] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L681] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L682] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L683] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L684] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L685] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L686] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L691] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L692] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L693] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L694] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L695] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L696] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L698] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t1512; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t1512, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1513; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1513, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1514; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1514, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L739] 0 y$w_buff1 = y$w_buff0 [L740] 0 y$w_buff0 = 2 [L741] 0 y$w_buff1_used = y$w_buff0_used [L742] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L744] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L745] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L746] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L747] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L748] 0 y$r_buff0_thd3 = (_Bool)1 [L751] 0 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L704] 1 z = 1 [L707] 1 x = 1 [L712] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 2 x = 2 [L722] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L727] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L728] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L732] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L761] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L795] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L796] -1 y$flush_delayed = weak$$choice2 [L797] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L802] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L803] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L804] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] -1 y = y$flush_delayed ? y$mem_tmp : y [L807] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-22 22:59:54,323 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_53556ed0-8ed3-463b-87af-0669b5438790/bin-2019/uautomizer/witness.graphml [2018-11-22 22:59:54,323 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-22 22:59:54,324 INFO L168 Benchmark]: Toolchain (without parser) took 78279.72 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 956.6 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,325 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 22:59:54,325 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.42 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.5 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -151.5 MB). Peak memory consumption was 38.1 MB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,325 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.80 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,326 INFO L168 Benchmark]: Boogie Preprocessor took 27.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,326 INFO L168 Benchmark]: RCFGBuilder took 443.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,326 INFO L168 Benchmark]: TraceAbstraction took 71009.74 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.1 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,326 INFO L168 Benchmark]: Witness Printer took 6359.94 ms. Allocated memory is still 7.0 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 148.1 MB). Peak memory consumption was 148.1 MB. Max. memory is 11.5 GB. [2018-11-22 22:59:54,328 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.42 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.5 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -151.5 MB). Peak memory consumption was 38.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.80 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 443.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 71009.74 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.1 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 6359.94 ms. Allocated memory is still 7.0 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 148.1 MB). Peak memory consumption was 148.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L675] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L676] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L678] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L681] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L682] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L683] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L684] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L685] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L686] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L691] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L692] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L693] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L694] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L695] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L696] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L698] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t1512; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t1512, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1513; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1513, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1514; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1514, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L739] 0 y$w_buff1 = y$w_buff0 [L740] 0 y$w_buff0 = 2 [L741] 0 y$w_buff1_used = y$w_buff0_used [L742] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L744] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L745] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L746] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L747] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L748] 0 y$r_buff0_thd3 = (_Bool)1 [L751] 0 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L704] 1 z = 1 [L707] 1 x = 1 [L712] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 2 x = 2 [L722] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=1] [L725] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L726] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L727] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L728] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L729] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L732] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L761] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L795] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L796] -1 y$flush_delayed = weak$$choice2 [L797] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L798] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L802] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L803] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L804] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L804] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L806] -1 y = y$flush_delayed ? y$mem_tmp : y [L807] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 198 locations, 3 error locations. UNSAFE Result, 70.9s OverallTime, 32 OverallIterations, 1 TraceHistogramMax, 18.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6787 SDtfs, 6676 SDslu, 15481 SDs, 0 SdLazy, 5811 SolverSat, 307 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 298 GetRequests, 90 SyntacticMatches, 21 SemanticMatches, 187 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 2.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=186422occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 31.0s AutomataMinimizationTime, 31 MinimizatonAttempts, 284496 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 2886 NumberOfCodeBlocks, 2886 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 2753 ConstructedInterpolants, 0 QuantifiedInterpolants, 593542 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...