./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash df684da5e5a56662a7be6091ec5bb0a21e1453c5 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-22 22:19:57,647 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-22 22:19:57,648 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-22 22:19:57,657 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-22 22:19:57,657 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-22 22:19:57,658 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-22 22:19:57,659 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-22 22:19:57,660 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-22 22:19:57,661 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-22 22:19:57,661 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-22 22:19:57,662 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-22 22:19:57,662 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-22 22:19:57,663 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-22 22:19:57,664 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-22 22:19:57,664 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-22 22:19:57,665 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-22 22:19:57,665 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-22 22:19:57,666 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-22 22:19:57,668 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-22 22:19:57,668 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-22 22:19:57,669 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-22 22:19:57,670 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-22 22:19:57,671 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-22 22:19:57,672 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-22 22:19:57,672 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-22 22:19:57,672 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-22 22:19:57,673 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-22 22:19:57,673 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-22 22:19:57,674 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-22 22:19:57,675 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-22 22:19:57,675 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-22 22:19:57,675 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-22 22:19:57,675 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-22 22:19:57,676 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-22 22:19:57,676 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-22 22:19:57,677 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-22 22:19:57,677 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-22 22:19:57,686 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-22 22:19:57,686 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-22 22:19:57,687 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-22 22:19:57,687 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-22 22:19:57,688 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-22 22:19:57,688 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-22 22:19:57,688 INFO L133 SettingsManager]: * Use SBE=true [2018-11-22 22:19:57,688 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-22 22:19:57,688 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-22 22:19:57,688 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-22 22:19:57,689 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-22 22:19:57,690 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-22 22:19:57,690 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:19:57,691 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-22 22:19:57,691 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df684da5e5a56662a7be6091ec5bb0a21e1453c5 [2018-11-22 22:19:57,715 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-22 22:19:57,722 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-22 22:19:57,724 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-22 22:19:57,725 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-22 22:19:57,725 INFO L276 PluginConnector]: CDTParser initialized [2018-11-22 22:19:57,725 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-22 22:19:57,764 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/data/0d1d8c49f/c4212d5b670f4167aaa45c211d11c825/FLAGdc3947ad9 [2018-11-22 22:19:58,087 INFO L307 CDTParser]: Found 1 translation units. [2018-11-22 22:19:58,088 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-22 22:19:58,095 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/data/0d1d8c49f/c4212d5b670f4167aaa45c211d11c825/FLAGdc3947ad9 [2018-11-22 22:19:58,106 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/data/0d1d8c49f/c4212d5b670f4167aaa45c211d11c825 [2018-11-22 22:19:58,108 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-22 22:19:58,109 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-22 22:19:58,110 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-22 22:19:58,110 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-22 22:19:58,112 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-22 22:19:58,113 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,114 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@651809fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58, skipping insertion in model container [2018-11-22 22:19:58,115 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,121 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-22 22:19:58,141 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-22 22:19:58,270 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:19:58,273 INFO L191 MainTranslator]: Completed pre-run [2018-11-22 22:19:58,298 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:19:58,309 INFO L195 MainTranslator]: Completed translation [2018-11-22 22:19:58,309 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58 WrapperNode [2018-11-22 22:19:58,309 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-22 22:19:58,310 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-22 22:19:58,310 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-22 22:19:58,310 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-22 22:19:58,318 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,324 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,370 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-22 22:19:58,371 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-22 22:19:58,371 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-22 22:19:58,371 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-22 22:19:58,380 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,381 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,382 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,382 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,389 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,397 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,398 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... [2018-11-22 22:19:58,401 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-22 22:19:58,401 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-22 22:19:58,401 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-22 22:19:58,401 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-22 22:19:58,402 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:19:58,441 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-22 22:19:58,441 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-22 22:19:58,441 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-22 22:19:58,441 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-22 22:19:58,441 INFO L130 BoogieDeclarations]: Found specification of procedure update_fifo_q [2018-11-22 22:19:58,442 INFO L138 BoogieDeclarations]: Found implementation of procedure update_fifo_q [2018-11-22 22:19:58,442 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-22 22:19:58,442 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-22 22:19:58,442 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-22 22:19:58,442 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-22 22:19:58,442 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-22 22:19:58,442 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-22 22:19:58,442 INFO L130 BoogieDeclarations]: Found specification of procedure do_write_p [2018-11-22 22:19:58,442 INFO L138 BoogieDeclarations]: Found implementation of procedure do_write_p [2018-11-22 22:19:58,443 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-22 22:19:58,443 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-22 22:19:58,443 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-22 22:19:58,443 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-22 22:19:58,443 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-22 22:19:58,443 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-22 22:19:58,443 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-22 22:19:58,443 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-22 22:19:58,443 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2018-11-22 22:19:58,444 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2018-11-22 22:19:58,444 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-22 22:19:58,444 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-22 22:19:58,444 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-22 22:19:58,444 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-22 22:19:58,444 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-22 22:19:58,444 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-22 22:19:58,444 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-22 22:19:58,444 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-22 22:19:58,445 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2018-11-22 22:19:58,445 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2018-11-22 22:19:58,445 INFO L130 BoogieDeclarations]: Found specification of procedure do_read_c [2018-11-22 22:19:58,445 INFO L138 BoogieDeclarations]: Found implementation of procedure do_read_c [2018-11-22 22:19:58,445 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-22 22:19:58,445 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-22 22:19:58,778 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-22 22:19:58,778 INFO L280 CfgBuilder]: Removed 4 assue(true) statements. [2018-11-22 22:19:58,779 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:19:58 BoogieIcfgContainer [2018-11-22 22:19:58,779 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-22 22:19:58,780 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-22 22:19:58,780 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-22 22:19:58,782 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-22 22:19:58,782 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 10:19:58" (1/3) ... [2018-11-22 22:19:58,783 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5744da68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:19:58, skipping insertion in model container [2018-11-22 22:19:58,783 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:19:58" (2/3) ... [2018-11-22 22:19:58,783 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5744da68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:19:58, skipping insertion in model container [2018-11-22 22:19:58,784 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:19:58" (3/3) ... [2018-11-22 22:19:58,785 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-22 22:19:58,791 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-22 22:19:58,797 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-22 22:19:58,808 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-22 22:19:58,833 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-22 22:19:58,833 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-22 22:19:58,833 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-22 22:19:58,834 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-22 22:19:58,834 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-22 22:19:58,834 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-22 22:19:58,834 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-22 22:19:58,834 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-22 22:19:58,834 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-22 22:19:58,853 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states. [2018-11-22 22:19:58,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:19:58,859 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:19:58,860 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:19:58,862 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:19:58,866 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:19:58,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1379244889, now seen corresponding path program 1 times [2018-11-22 22:19:58,868 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:19:58,869 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:19:58,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:19:58,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:19:58,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:19:58,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:19:59,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:19:59,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:19:59,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:19:59,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:19:59,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:19:59,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:19:59,091 INFO L87 Difference]: Start difference. First operand 131 states. Second operand 5 states. [2018-11-22 22:19:59,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:19:59,583 INFO L93 Difference]: Finished difference Result 382 states and 551 transitions. [2018-11-22 22:19:59,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:19:59,585 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-22 22:19:59,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:19:59,595 INFO L225 Difference]: With dead ends: 382 [2018-11-22 22:19:59,595 INFO L226 Difference]: Without dead ends: 254 [2018-11-22 22:19:59,600 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:19:59,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-11-22 22:19:59,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 234. [2018-11-22 22:19:59,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-11-22 22:19:59,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 306 transitions. [2018-11-22 22:19:59,666 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 306 transitions. Word has length 70 [2018-11-22 22:19:59,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:19:59,667 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 306 transitions. [2018-11-22 22:19:59,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:19:59,667 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 306 transitions. [2018-11-22 22:19:59,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:19:59,670 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:19:59,670 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:19:59,671 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:19:59,671 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:19:59,671 INFO L82 PathProgramCache]: Analyzing trace with hash 982618983, now seen corresponding path program 1 times [2018-11-22 22:19:59,671 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:19:59,672 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:19:59,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:19:59,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:19:59,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:19:59,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:19:59,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:19:59,785 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:19:59,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:19:59,788 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:19:59,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:19:59,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:19:59,789 INFO L87 Difference]: Start difference. First operand 234 states and 306 transitions. Second operand 6 states. [2018-11-22 22:20:00,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:20:00,369 INFO L93 Difference]: Finished difference Result 631 states and 846 transitions. [2018-11-22 22:20:00,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:20:00,370 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-22 22:20:00,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:20:00,374 INFO L225 Difference]: With dead ends: 631 [2018-11-22 22:20:00,374 INFO L226 Difference]: Without dead ends: 424 [2018-11-22 22:20:00,376 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:20:00,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2018-11-22 22:20:00,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 360. [2018-11-22 22:20:00,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2018-11-22 22:20:00,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 476 transitions. [2018-11-22 22:20:00,422 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 476 transitions. Word has length 70 [2018-11-22 22:20:00,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:20:00,423 INFO L480 AbstractCegarLoop]: Abstraction has 360 states and 476 transitions. [2018-11-22 22:20:00,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:20:00,423 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 476 transitions. [2018-11-22 22:20:00,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:20:00,425 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:20:00,426 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:20:00,426 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:20:00,426 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:20:00,427 INFO L82 PathProgramCache]: Analyzing trace with hash 629530601, now seen corresponding path program 1 times [2018-11-22 22:20:00,427 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:20:00,427 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:20:00,428 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:20:00,428 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:20:00,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:20:00,491 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:20:00,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:20:00,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:20:00,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:20:00,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:20:00,492 INFO L87 Difference]: Start difference. First operand 360 states and 476 transitions. Second operand 6 states. [2018-11-22 22:20:00,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:20:00,528 INFO L93 Difference]: Finished difference Result 687 states and 910 transitions. [2018-11-22 22:20:00,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:20:00,529 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-22 22:20:00,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:20:00,531 INFO L225 Difference]: With dead ends: 687 [2018-11-22 22:20:00,531 INFO L226 Difference]: Without dead ends: 370 [2018-11-22 22:20:00,532 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:20:00,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-11-22 22:20:00,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 365. [2018-11-22 22:20:00,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2018-11-22 22:20:00,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 479 transitions. [2018-11-22 22:20:00,573 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 479 transitions. Word has length 70 [2018-11-22 22:20:00,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:20:00,573 INFO L480 AbstractCegarLoop]: Abstraction has 365 states and 479 transitions. [2018-11-22 22:20:00,574 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:20:00,574 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 479 transitions. [2018-11-22 22:20:00,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:20:00,575 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:20:00,575 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:20:00,576 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:20:00,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:20:00,576 INFO L82 PathProgramCache]: Analyzing trace with hash -1614452697, now seen corresponding path program 1 times [2018-11-22 22:20:00,576 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:20:00,576 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:20:00,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:20:00,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:20:00,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:20:00,652 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:20:00,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:20:00,653 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:20:00,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:20:00,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:20:00,653 INFO L87 Difference]: Start difference. First operand 365 states and 479 transitions. Second operand 4 states. [2018-11-22 22:20:00,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:20:00,774 INFO L93 Difference]: Finished difference Result 994 states and 1322 transitions. [2018-11-22 22:20:00,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:20:00,774 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2018-11-22 22:20:00,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:20:00,777 INFO L225 Difference]: With dead ends: 994 [2018-11-22 22:20:00,777 INFO L226 Difference]: Without dead ends: 672 [2018-11-22 22:20:00,778 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:20:00,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 672 states. [2018-11-22 22:20:00,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 672 to 652. [2018-11-22 22:20:00,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 652 states. [2018-11-22 22:20:00,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 835 transitions. [2018-11-22 22:20:00,808 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 835 transitions. Word has length 70 [2018-11-22 22:20:00,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:20:00,808 INFO L480 AbstractCegarLoop]: Abstraction has 652 states and 835 transitions. [2018-11-22 22:20:00,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:20:00,808 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 835 transitions. [2018-11-22 22:20:00,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:20:00,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:20:00,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:20:00,810 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:20:00,810 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:20:00,810 INFO L82 PathProgramCache]: Analyzing trace with hash 909043624, now seen corresponding path program 1 times [2018-11-22 22:20:00,810 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:20:00,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:20:00,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:20:00,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:20:00,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:20:00,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:20:00,863 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:20:00,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:20:00,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:20:00,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:20:00,864 INFO L87 Difference]: Start difference. First operand 652 states and 835 transitions. Second operand 6 states. [2018-11-22 22:20:00,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:20:00,907 INFO L93 Difference]: Finished difference Result 1282 states and 1641 transitions. [2018-11-22 22:20:00,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:20:00,908 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-22 22:20:00,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:20:00,910 INFO L225 Difference]: With dead ends: 1282 [2018-11-22 22:20:00,910 INFO L226 Difference]: Without dead ends: 673 [2018-11-22 22:20:00,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:20:00,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 673 states. [2018-11-22 22:20:00,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 673 to 667. [2018-11-22 22:20:00,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 667 states. [2018-11-22 22:20:00,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 667 states to 667 states and 847 transitions. [2018-11-22 22:20:00,933 INFO L78 Accepts]: Start accepts. Automaton has 667 states and 847 transitions. Word has length 70 [2018-11-22 22:20:00,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:20:00,933 INFO L480 AbstractCegarLoop]: Abstraction has 667 states and 847 transitions. [2018-11-22 22:20:00,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:20:00,933 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 847 transitions. [2018-11-22 22:20:00,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:20:00,934 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:20:00,935 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:20:00,935 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:20:00,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:20:00,935 INFO L82 PathProgramCache]: Analyzing trace with hash 1049592234, now seen corresponding path program 1 times [2018-11-22 22:20:00,935 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:20:00,935 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:20:00,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:20:00,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:00,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:20:00,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:20:00,998 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:20:00,998 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:20:00,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:20:00,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:20:00,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:20:00,999 INFO L87 Difference]: Start difference. First operand 667 states and 847 transitions. Second operand 6 states. [2018-11-22 22:20:01,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:20:01,486 INFO L93 Difference]: Finished difference Result 1362 states and 1717 transitions. [2018-11-22 22:20:01,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-22 22:20:01,487 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-11-22 22:20:01,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:20:01,489 INFO L225 Difference]: With dead ends: 1362 [2018-11-22 22:20:01,490 INFO L226 Difference]: Without dead ends: 833 [2018-11-22 22:20:01,491 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-22 22:20:01,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2018-11-22 22:20:01,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 683. [2018-11-22 22:20:01,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 683 states. [2018-11-22 22:20:01,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 683 states to 683 states and 856 transitions. [2018-11-22 22:20:01,517 INFO L78 Accepts]: Start accepts. Automaton has 683 states and 856 transitions. Word has length 70 [2018-11-22 22:20:01,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:20:01,517 INFO L480 AbstractCegarLoop]: Abstraction has 683 states and 856 transitions. [2018-11-22 22:20:01,517 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:20:01,517 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states and 856 transitions. [2018-11-22 22:20:01,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:20:01,518 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:20:01,518 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:20:01,519 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:20:01,519 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:20:01,519 INFO L82 PathProgramCache]: Analyzing trace with hash 231943784, now seen corresponding path program 1 times [2018-11-22 22:20:01,519 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:20:01,519 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:20:01,520 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:01,520 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:20:01,520 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:20:01,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:20:01,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:20:01,569 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [?] ~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] assume true; VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET #359#return; VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] havoc ~__retres1~3; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call init_model(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #321#return; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call start_simulation(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~kernel_st~0;havoc ~tmp~4;~kernel_st~0 := 0; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call update_channels(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_req_up~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #335#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call init_threads(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #337#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call fire_delta_events(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 == ~q_read_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 == ~q_write_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #339#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call activate_threads(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~p_dw_pc~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~__retres1~0 := 0; VAL [is_do_write_p_triggered_~__retres1~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~0; VAL [is_do_write_p_triggered_~__retres1~0=0, |is_do_write_p_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [is_do_write_p_triggered_~__retres1~0=0, |is_do_write_p_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #317#return; VAL [|activate_threads_#t~ret3|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647;~tmp~1 := #t~ret3;havoc #t~ret3; VAL [activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~c_dr_pc~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~__retres1~1 := 0; VAL [is_do_read_c_triggered_~__retres1~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~1; VAL [is_do_read_c_triggered_~__retres1~1=0, |is_do_read_c_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [is_do_read_c_triggered_~__retres1~1=0, |is_do_read_c_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #319#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret4|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647;~tmp___0~1 := #t~ret4;havoc #t~ret4; VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp___0~1); VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #341#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call reset_delta_events(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_read_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_write_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #343#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~kernel_st~0 := 1; VAL [start_simulation_~kernel_st~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call eval(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~tmp~2;havoc ~tmp___0~2;havoc ~tmp___1~0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret5 := exists_runnable_thread(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~2; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 == ~p_dw_st~0;~__retres1~2 := 1; VAL [exists_runnable_thread_~__retres1~2=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~2; VAL [exists_runnable_thread_~__retres1~2=1, |exists_runnable_thread_#res|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [exists_runnable_thread_~__retres1~2=1, |exists_runnable_thread_#res|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #327#return; VAL [|eval_#t~ret5|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647;~tmp___1~0 := #t~ret5;havoc #t~ret5; VAL [eval_~tmp___1~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 != ~tmp___1~0; VAL [eval_~tmp___1~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 == ~p_dw_st~0;assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647;~tmp~2 := #t~nondet6;havoc #t~nondet6; VAL [eval_~tmp___1~0=1, eval_~tmp~2=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp~2); VAL [eval_~tmp___1~0=1, eval_~tmp~2=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call error(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ensures true; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L438-L454] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212-L218] assume !(1 == ~q_req_up~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L208-L222] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227-L231] assume 1 == ~p_dw_i~0; [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232-L236] assume 1 == ~c_dr_i~0; [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L223-L240] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265-L269] assume !(0 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270-L274] assume !(0 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L261-L278] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55-L64] assume !(1 == ~p_dw_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L51-L69] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] assume !(0 != ~tmp~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74-L83] assume !(1 == ~c_dr_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L70-L88] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] assume !(0 != ~tmp___0~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L297-L321] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283-L287] assume !(1 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288-L292] assume !(1 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L279-L296] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245-L255] assume 0 == ~p_dw_st~0; [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L241-L260] ensures true; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] assume 0 != ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339-L353] assume 0 == ~p_dw_st~0; [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] assume !(0 != ~tmp~2); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ensures true; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L438-L454] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212-L218] assume !(1 == ~q_req_up~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L208-L222] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227-L231] assume 1 == ~p_dw_i~0; [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232-L236] assume 1 == ~c_dr_i~0; [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L223-L240] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265-L269] assume !(0 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270-L274] assume !(0 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L261-L278] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55-L64] assume !(1 == ~p_dw_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L51-L69] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] assume !(0 != ~tmp~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74-L83] assume !(1 == ~c_dr_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L70-L88] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] assume !(0 != ~tmp___0~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L297-L321] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283-L287] assume !(1 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288-L292] assume !(1 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L279-L296] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245-L255] assume 0 == ~p_dw_st~0; [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L241-L260] ensures true; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] assume 0 != ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339-L353] assume 0 == ~p_dw_st~0; [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] assume !(0 != ~tmp~2); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] ----- [2018-11-22 22:20:02,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.11 10:20:02 BoogieIcfgContainer [2018-11-22 22:20:02,010 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-22 22:20:02,010 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-22 22:20:02,011 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-22 22:20:02,011 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-22 22:20:02,011 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:19:58" (3/4) ... [2018-11-22 22:20:02,013 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [?] ~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] assume true; VAL [|old(~a_t~0)|=11, |old(~c_dr_i~0)|=3, |old(~c_dr_pc~0)|=13, |old(~c_dr_st~0)|=17, |old(~c_last_read~0)|=5, |old(~c_num_read~0)|=6, |old(~p_dw_i~0)|=4, |old(~p_dw_pc~0)|=15, |old(~p_dw_st~0)|=9, |old(~p_last_write~0)|=19, |old(~p_num_write~0)|=7, |old(~q_buf_0~0)|=10, |old(~q_ev~0)|=16, |old(~q_free~0)|=18, |old(~q_read_ev~0)|=14, |old(~q_req_up~0)|=12, |old(~q_write_ev~0)|=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET #359#return; VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] havoc ~__retres1~3; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call init_model(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #321#return; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=0, |old(~q_read_ev~0)|=0, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call start_simulation(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~kernel_st~0;havoc ~tmp~4;~kernel_st~0 := 0; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call update_channels(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_req_up~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #335#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call init_threads(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #337#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call fire_delta_events(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 == ~q_read_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 == ~q_write_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #339#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call activate_threads(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~p_dw_pc~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~__retres1~0 := 0; VAL [is_do_write_p_triggered_~__retres1~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~0; VAL [is_do_write_p_triggered_~__retres1~0=0, |is_do_write_p_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [is_do_write_p_triggered_~__retres1~0=0, |is_do_write_p_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #317#return; VAL [|activate_threads_#t~ret3|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647;~tmp~1 := #t~ret3;havoc #t~ret3; VAL [activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~1; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~c_dr_pc~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~__retres1~1 := 0; VAL [is_do_read_c_triggered_~__retres1~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~1; VAL [is_do_read_c_triggered_~__retres1~1=0, |is_do_read_c_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [is_do_read_c_triggered_~__retres1~1=0, |is_do_read_c_triggered_#res|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #319#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret4|=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647;~tmp___0~1 := #t~ret4;havoc #t~ret4; VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp___0~1); VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [activate_threads_~tmp___0~1=0, activate_threads_~tmp~1=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #341#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call reset_delta_events(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_read_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(1 == ~q_write_ev~0); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #343#return; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [start_simulation_~kernel_st~0=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] ~kernel_st~0 := 1; VAL [start_simulation_~kernel_st~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call eval(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~tmp~2;havoc ~tmp___0~2;havoc ~tmp___1~0; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call #t~ret5 := exists_runnable_thread(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] havoc ~__retres1~2; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 == ~p_dw_st~0;~__retres1~2 := 1; VAL [exists_runnable_thread_~__retres1~2=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] #res := ~__retres1~2; VAL [exists_runnable_thread_~__retres1~2=1, |exists_runnable_thread_#res|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume true; VAL [exists_runnable_thread_~__retres1~2=1, |exists_runnable_thread_#res|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] RET #327#return; VAL [|eval_#t~ret5|=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647;~tmp___1~0 := #t~ret5;havoc #t~ret5; VAL [eval_~tmp___1~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 != ~tmp___1~0; VAL [eval_~tmp___1~0=1, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume 0 == ~p_dw_st~0;assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647;~tmp~2 := #t~nondet6;havoc #t~nondet6; VAL [eval_~tmp___1~0=1, eval_~tmp~2=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !(0 != ~tmp~2); VAL [eval_~tmp___1~0=1, eval_~tmp~2=0, |old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call error(); VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] assume !false; VAL [|old(~a_t~0)|=0, |old(~c_dr_i~0)|=0, |old(~c_dr_pc~0)|=0, |old(~c_dr_st~0)|=0, |old(~c_last_read~0)|=0, |old(~c_num_read~0)|=0, |old(~p_dw_i~0)|=0, |old(~p_dw_pc~0)|=0, |old(~p_dw_st~0)|=0, |old(~p_last_write~0)|=0, |old(~p_num_write~0)|=0, |old(~q_buf_0~0)|=0, |old(~q_ev~0)|=0, |old(~q_free~0)|=1, |old(~q_read_ev~0)|=2, |old(~q_req_up~0)|=0, |old(~q_write_ev~0)|=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ensures true; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L438-L454] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212-L218] assume !(1 == ~q_req_up~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L208-L222] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227-L231] assume 1 == ~p_dw_i~0; [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232-L236] assume 1 == ~c_dr_i~0; [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L223-L240] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265-L269] assume !(0 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270-L274] assume !(0 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L261-L278] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55-L64] assume !(1 == ~p_dw_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L51-L69] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] assume !(0 != ~tmp~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74-L83] assume !(1 == ~c_dr_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L70-L88] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] assume !(0 != ~tmp___0~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L297-L321] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283-L287] assume !(1 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288-L292] assume !(1 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L279-L296] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245-L255] assume 0 == ~p_dw_st~0; [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L241-L260] ensures true; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] assume 0 != ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339-L353] assume 0 == ~p_dw_st~0; [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] assume !(0 != ~tmp~2); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] ensures true; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L438-L454] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212-L218] assume !(1 == ~q_req_up~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L208-L222] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227-L231] assume 1 == ~p_dw_i~0; [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232-L236] assume 1 == ~c_dr_i~0; [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L223-L240] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265-L269] assume !(0 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270-L274] assume !(0 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L261-L278] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55-L64] assume !(1 == ~p_dw_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L51-L69] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] assume !(0 != ~tmp~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74-L83] assume !(1 == ~c_dr_pc~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L70-L88] ensures true; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] assume !(0 != ~tmp___0~1); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L297-L321] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283-L287] assume !(1 == ~q_read_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288-L292] assume !(1 == ~q_write_ev~0); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L279-L296] ensures true; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] assume !false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245-L255] assume 0 == ~p_dw_st~0; [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L241-L260] ensures true; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] assume 0 != ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339-L353] assume 0 == ~p_dw_st~0; [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] assume !(0 != ~tmp~2); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=11, ~c_dr_i~0=3, ~c_dr_pc~0=13, ~c_dr_st~0=17, ~c_last_read~0=5, ~c_num_read~0=6, ~p_dw_i~0=4, ~p_dw_pc~0=15, ~p_dw_st~0=9, ~p_last_write~0=19, ~p_num_write~0=7, ~q_buf_0~0=10, ~q_ev~0=16, ~q_free~0=18, ~q_read_ev~0=14, ~q_req_up~0=12, ~q_write_ev~0=8] [L15] ~q_buf_0~0 := 0; [L16] ~q_free~0 := 0; [L17] ~q_read_ev~0 := 0; [L18] ~q_write_ev~0 := 0; [L19] ~q_req_up~0 := 0; [L20] ~q_ev~0 := 0; [L41] ~p_num_write~0 := 0; [L42] ~p_last_write~0 := 0; [L43] ~p_dw_st~0 := 0; [L44] ~p_dw_pc~0 := 0; [L45] ~p_dw_i~0 := 0; [L46] ~c_num_read~0 := 0; [L47] ~c_last_read~0 := 0; [L48] ~c_dr_st~0 := 0; [L49] ~c_dr_pc~0 := 0; [L50] ~c_dr_i~0 := 0; [L154] ~a_t~0 := 0; VAL [old(~a_t~0)=11, old(~c_dr_i~0)=3, old(~c_dr_pc~0)=13, old(~c_dr_st~0)=17, old(~c_last_read~0)=5, old(~c_num_read~0)=6, old(~p_dw_i~0)=4, old(~p_dw_pc~0)=15, old(~p_dw_st~0)=9, old(~p_last_write~0)=19, old(~p_num_write~0)=7, old(~q_buf_0~0)=10, old(~q_ev~0)=16, old(~q_free~0)=18, old(~q_read_ev~0)=14, old(~q_req_up~0)=12, old(~q_write_ev~0)=8, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] RET call ULTIMATE.init(); VAL [~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [?] CALL call #t~ret10 := main(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L456] havoc ~__retres1~3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L460] CALL call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=0, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=0, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=0, ~q_read_ev~0=0, ~q_req_up~0=0, ~q_write_ev~0=0] [L442] ~q_free~0 := 1; [L443] ~q_write_ev~0 := 2; [L444] ~q_read_ev~0 := ~q_write_ev~0; [L445] ~p_num_write~0 := 0; [L446] ~p_dw_pc~0 := 0; [L447] ~p_dw_i~0 := 1; [L448] ~c_num_read~0 := 0; [L449] ~c_dr_pc~0 := 0; [L450] ~c_dr_i~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L460] RET call init_model(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=0, old(~q_read_ev~0)=0, old(~q_req_up~0)=0, old(~q_write_ev~0)=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L461] CALL call start_simulation(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L396] havoc ~kernel_st~0; [L397] havoc ~tmp~4; [L401] ~kernel_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] CALL call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L212] COND FALSE !(1 == ~q_req_up~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L402] RET call update_channels(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] CALL call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L227] COND TRUE 1 == ~p_dw_i~0 [L228] ~p_dw_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L232] COND TRUE 1 == ~c_dr_i~0 [L233] ~c_dr_st~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L403] RET call init_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] CALL call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L265] COND FALSE !(0 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L270] COND FALSE !(0 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L404] RET call fire_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L405] CALL call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L298] havoc ~tmp~1; [L299] havoc ~tmp___0~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] CALL call #t~ret3 := is_do_write_p_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L52] havoc ~__retres1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L55] COND FALSE !(1 == ~p_dw_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L65] ~__retres1~0 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L67] #res := ~__retres1~0; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~0=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] RET call #t~ret3 := is_do_write_p_triggered(); VAL [#t~ret3=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L303] assume -2147483648 <= #t~ret3 && #t~ret3 <= 2147483647; [L303] ~tmp~1 := #t~ret3; [L303] havoc #t~ret3; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L305-L309] COND FALSE !(0 != ~tmp~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] CALL call #t~ret4 := is_do_read_c_triggered(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L71] havoc ~__retres1~1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L74] COND FALSE !(1 == ~c_dr_pc~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L84] ~__retres1~1 := 0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L86] #res := ~__retres1~1; VAL [#res=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~1=0, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L311] RET call #t~ret4 := is_do_read_c_triggered(); VAL [#t~ret4=0, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp~1=0] [L311] assume -2147483648 <= #t~ret4 && #t~ret4 <= 2147483647; [L311] ~tmp___0~1 := #t~ret4; [L311] havoc #t~ret4; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L313-L317] COND FALSE !(0 != ~tmp___0~1) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___0~1=0, ~tmp~1=0] [L405] RET call activate_threads(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] CALL call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L283] COND FALSE !(1 == ~q_read_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L288] COND FALSE !(1 == ~q_write_ev~0) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L406] RET call reset_delta_events(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L409-L431] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L412] ~kernel_st~0 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~kernel_st~0=1, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L413] CALL call eval(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L323] havoc ~tmp~2; [L324] havoc ~tmp___0~2; [L325] havoc ~tmp___1~0; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L329-L369] COND FALSE !(false) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] CALL call #t~ret5 := exists_runnable_thread(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L242] havoc ~__retres1~2; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L245] COND TRUE 0 == ~p_dw_st~0 [L246] ~__retres1~2 := 1; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L258] #res := ~__retres1~2; VAL [#res=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~__retres1~2=1, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] RET call #t~ret5 := exists_runnable_thread(); VAL [#t~ret5=1, old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L332] assume -2147483648 <= #t~ret5 && #t~ret5 <= 2147483647; [L332] ~tmp___1~0 := #t~ret5; [L332] havoc #t~ret5; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L334-L338] COND TRUE 0 != ~tmp___1~0 VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1] [L339] COND TRUE 0 == ~p_dw_st~0 [L341] assume -2147483648 <= #t~nondet6 && #t~nondet6 <= 2147483647; [L341] ~tmp~2 := #t~nondet6; [L341] havoc #t~nondet6; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L343-L350] COND FALSE !(0 != ~tmp~2) VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2, ~tmp___1~0=1, ~tmp~2=0] [L349] CALL call error(); VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L10] assert false; VAL [old(~a_t~0)=0, old(~c_dr_i~0)=0, old(~c_dr_pc~0)=0, old(~c_dr_st~0)=0, old(~c_last_read~0)=0, old(~c_num_read~0)=0, old(~p_dw_i~0)=0, old(~p_dw_pc~0)=0, old(~p_dw_st~0)=0, old(~p_last_write~0)=0, old(~p_num_write~0)=0, old(~q_buf_0~0)=0, old(~q_ev~0)=0, old(~q_free~0)=1, old(~q_read_ev~0)=2, old(~q_req_up~0)=0, old(~q_write_ev~0)=2, ~a_t~0=0, ~c_dr_i~0=1, ~c_dr_pc~0=0, ~c_dr_st~0=0, ~c_last_read~0=0, ~c_num_read~0=0, ~p_dw_i~0=1, ~p_dw_pc~0=0, ~p_dw_st~0=0, ~p_last_write~0=0, ~p_num_write~0=0, ~q_buf_0~0=0, ~q_ev~0=0, ~q_free~0=1, ~q_read_ev~0=2, ~q_req_up~0=0, ~q_write_ev~0=2] [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] ----- [2018-11-22 22:20:03,029 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_dc1353f5-b0fb-4078-9831-a142ca8388ac/bin-2019/uautomizer/witness.graphml [2018-11-22 22:20:03,030 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-22 22:20:03,030 INFO L168 Benchmark]: Toolchain (without parser) took 4921.66 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 219.7 MB). Free memory was 954.8 MB in the beginning and 806.3 MB in the end (delta: 148.5 MB). Peak memory consumption was 368.2 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,032 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 22:20:03,032 INFO L168 Benchmark]: CACSL2BoogieTranslator took 199.81 ms. Allocated memory is still 1.0 GB. Free memory was 954.8 MB in the beginning and 938.7 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,032 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -204.4 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,033 INFO L168 Benchmark]: Boogie Preprocessor took 30.21 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 22:20:03,033 INFO L168 Benchmark]: RCFGBuilder took 378.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 33.0 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,033 INFO L168 Benchmark]: TraceAbstraction took 3230.42 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 71.3 MB). Free memory was 1.1 GB in the beginning and 860.7 MB in the end (delta: 249.4 MB). Peak memory consumption was 320.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,033 INFO L168 Benchmark]: Witness Printer took 1019.29 ms. Allocated memory is still 1.2 GB. Free memory was 860.7 MB in the beginning and 806.3 MB in the end (delta: 54.4 MB). Peak memory consumption was 54.4 MB. Max. memory is 11.5 GB. [2018-11-22 22:20:03,035 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 199.81 ms. Allocated memory is still 1.0 GB. Free memory was 954.8 MB in the beginning and 938.7 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 60.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 148.4 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -204.4 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.21 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 378.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 33.0 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 3230.42 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 71.3 MB). Free memory was 1.1 GB in the beginning and 860.7 MB in the end (delta: 249.4 MB). Peak memory consumption was 320.7 MB. Max. memory is 11.5 GB. * Witness Printer took 1019.29 ms. Allocated memory is still 1.2 GB. Free memory was 860.7 MB in the beginning and 806.3 MB in the end (delta: 54.4 MB). Peak memory consumption was 54.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 131 locations, 1 error locations. UNSAFE Result, 3.1s OverallTime, 7 OverallIterations, 1 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1187 SDtfs, 1360 SDslu, 1917 SDs, 0 SdLazy, 1730 SolverSat, 407 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 63 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=683occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 6 MinimizatonAttempts, 265 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.3s InterpolantComputationTime, 490 NumberOfCodeBlocks, 490 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 414 ConstructedInterpolants, 0 QuantifiedInterpolants, 43608 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...