./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-races/race-1_3-join_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-races/race-1_3-join_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8f76f5ea0883ff227335123ffc2cfa3ca3daa441 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 15:06:49,698 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 15:06:49,700 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 15:06:49,707 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 15:06:49,708 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 15:06:49,708 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 15:06:49,709 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 15:06:49,711 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 15:06:49,712 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 15:06:49,713 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 15:06:49,713 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 15:06:49,714 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 15:06:49,714 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 15:06:49,715 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 15:06:49,716 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 15:06:49,717 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 15:06:49,717 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 15:06:49,719 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 15:06:49,720 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 15:06:49,721 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 15:06:49,722 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 15:06:49,723 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 15:06:49,725 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 15:06:49,725 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 15:06:49,725 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 15:06:49,726 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 15:06:49,726 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 15:06:49,727 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 15:06:49,727 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 15:06:49,728 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 15:06:49,728 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 15:06:49,729 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 15:06:49,729 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 15:06:49,729 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 15:06:49,730 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 15:06:49,730 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 15:06:49,731 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 15:06:49,741 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 15:06:49,741 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 15:06:49,742 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 15:06:49,742 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 15:06:49,743 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 15:06:49,743 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 15:06:49,743 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 15:06:49,743 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 15:06:49,743 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 15:06:49,743 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 15:06:49,743 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 15:06:49,744 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 15:06:49,745 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 15:06:49,745 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 15:06:49,745 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 15:06:49,745 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 15:06:49,745 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 15:06:49,745 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:06:49,746 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 15:06:49,746 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8f76f5ea0883ff227335123ffc2cfa3ca3daa441 [2018-11-23 15:06:49,771 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 15:06:49,781 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 15:06:49,783 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 15:06:49,785 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 15:06:49,785 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 15:06:49,785 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-races/race-1_3-join_false-unreach-call.i [2018-11-23 15:06:49,824 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/data/dd35ec492/45bb7f8e052e4428afc627efe3cfd4f5/FLAG6dab405c2 [2018-11-23 15:06:50,340 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 15:06:50,340 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/sv-benchmarks/c/ldv-races/race-1_3-join_false-unreach-call.i [2018-11-23 15:06:50,355 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/data/dd35ec492/45bb7f8e052e4428afc627efe3cfd4f5/FLAG6dab405c2 [2018-11-23 15:06:50,803 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/data/dd35ec492/45bb7f8e052e4428afc627efe3cfd4f5 [2018-11-23 15:06:50,805 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 15:06:50,806 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 15:06:50,807 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 15:06:50,807 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 15:06:50,810 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 15:06:50,811 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:06:50" (1/1) ... [2018-11-23 15:06:50,813 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75e0a746 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:50, skipping insertion in model container [2018-11-23 15:06:50,814 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:06:50" (1/1) ... [2018-11-23 15:06:50,822 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 15:06:50,870 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 15:06:51,438 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:06:51,450 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 15:06:51,574 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:06:51,727 INFO L195 MainTranslator]: Completed translation [2018-11-23 15:06:51,728 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51 WrapperNode [2018-11-23 15:06:51,728 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 15:06:51,728 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 15:06:51,728 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 15:06:51,729 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 15:06:51,734 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,751 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,767 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 15:06:51,767 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 15:06:51,767 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 15:06:51,767 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 15:06:51,773 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,773 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,777 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,777 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,784 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,786 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,789 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... [2018-11-23 15:06:51,792 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 15:06:51,793 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 15:06:51,793 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 15:06:51,793 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 15:06:51,793 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:06:51,831 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 15:06:51,831 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 15:06:51,831 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 15:06:51,831 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2018-11-23 15:06:51,831 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 15:06:51,832 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 15:06:51,832 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 15:06:51,832 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 15:06:51,832 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2018-11-23 15:06:51,832 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2018-11-23 15:06:51,832 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 15:06:51,832 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 15:06:51,833 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 15:06:52,240 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 15:06:52,241 INFO L280 CfgBuilder]: Removed 16 assue(true) statements. [2018-11-23 15:06:52,241 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:06:52 BoogieIcfgContainer [2018-11-23 15:06:52,241 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 15:06:52,242 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 15:06:52,242 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 15:06:52,244 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 15:06:52,244 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:06:50" (1/3) ... [2018-11-23 15:06:52,245 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e3c37e6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:06:52, skipping insertion in model container [2018-11-23 15:06:52,245 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:06:51" (2/3) ... [2018-11-23 15:06:52,245 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e3c37e6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:06:52, skipping insertion in model container [2018-11-23 15:06:52,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:06:52" (3/3) ... [2018-11-23 15:06:52,247 INFO L112 eAbstractionObserver]: Analyzing ICFG race-1_3-join_false-unreach-call.i [2018-11-23 15:06:52,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,271 WARN L317 ript$VariableManager]: TermVariabe Thread0_thread1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,272 WARN L317 ript$VariableManager]: TermVariabe Thread0_thread1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#t~nondet30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#t~nondet30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:06:52,278 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 15:06:52,278 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 15:06:52,285 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-11-23 15:06:52,296 INFO L257 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2018-11-23 15:06:52,314 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 15:06:52,314 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 15:06:52,315 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 15:06:52,315 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 15:06:52,315 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 15:06:52,315 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 15:06:52,315 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 15:06:52,315 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 15:06:52,315 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 15:06:52,323 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82places, 86 transitions [2018-11-23 15:06:52,337 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 248 states. [2018-11-23 15:06:52,339 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states. [2018-11-23 15:06:52,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 15:06:52,345 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:06:52,345 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:06:52,348 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:06:52,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:06:52,353 INFO L82 PathProgramCache]: Analyzing trace with hash 1071358446, now seen corresponding path program 1 times [2018-11-23 15:06:52,355 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:06:52,355 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:06:52,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:52,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:06:52,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:52,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:06:52,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:06:52,615 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:06:52,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:06:52,618 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:06:52,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:06:52,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:06:52,630 INFO L87 Difference]: Start difference. First operand 248 states. Second operand 5 states. [2018-11-23 15:06:52,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:06:52,756 INFO L93 Difference]: Finished difference Result 246 states and 393 transitions. [2018-11-23 15:06:52,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 15:06:52,757 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-11-23 15:06:52,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:06:52,766 INFO L225 Difference]: With dead ends: 246 [2018-11-23 15:06:52,767 INFO L226 Difference]: Without dead ends: 197 [2018-11-23 15:06:52,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:06:52,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-11-23 15:06:52,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2018-11-23 15:06:52,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-23 15:06:52,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 308 transitions. [2018-11-23 15:06:52,810 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 308 transitions. Word has length 25 [2018-11-23 15:06:52,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:06:52,810 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 308 transitions. [2018-11-23 15:06:52,810 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:06:52,811 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 308 transitions. [2018-11-23 15:06:52,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 15:06:52,811 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:06:52,812 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:06:52,812 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:06:52,812 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:06:52,812 INFO L82 PathProgramCache]: Analyzing trace with hash -1712126038, now seen corresponding path program 1 times [2018-11-23 15:06:52,812 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:06:52,813 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:06:52,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:52,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:06:52,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:52,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:06:52,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:06:52,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:06:52,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:06:52,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:06:52,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:06:52,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:06:52,961 INFO L87 Difference]: Start difference. First operand 197 states and 308 transitions. Second operand 8 states. [2018-11-23 15:06:53,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:06:53,136 INFO L93 Difference]: Finished difference Result 195 states and 306 transitions. [2018-11-23 15:06:53,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 15:06:53,138 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-11-23 15:06:53,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:06:53,140 INFO L225 Difference]: With dead ends: 195 [2018-11-23 15:06:53,140 INFO L226 Difference]: Without dead ends: 195 [2018-11-23 15:06:53,141 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2018-11-23 15:06:53,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-11-23 15:06:53,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2018-11-23 15:06:53,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-11-23 15:06:53,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 306 transitions. [2018-11-23 15:06:53,155 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 306 transitions. Word has length 33 [2018-11-23 15:06:53,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:06:53,155 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 306 transitions. [2018-11-23 15:06:53,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:06:53,156 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 306 transitions. [2018-11-23 15:06:53,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-23 15:06:53,157 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:06:53,157 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:06:53,158 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:06:53,158 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:06:53,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1763125735, now seen corresponding path program 1 times [2018-11-23 15:06:53,158 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:06:53,158 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:06:53,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:53,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:06:53,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:53,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:06:53,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:06:53,309 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:06:53,309 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:06:53,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:06:53,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:06:53,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:06:53,311 INFO L87 Difference]: Start difference. First operand 195 states and 306 transitions. Second operand 8 states. [2018-11-23 15:06:53,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:06:53,504 INFO L93 Difference]: Finished difference Result 239 states and 369 transitions. [2018-11-23 15:06:53,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 15:06:53,505 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 43 [2018-11-23 15:06:53,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:06:53,506 INFO L225 Difference]: With dead ends: 239 [2018-11-23 15:06:53,506 INFO L226 Difference]: Without dead ends: 221 [2018-11-23 15:06:53,507 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2018-11-23 15:06:53,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-11-23 15:06:53,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 183. [2018-11-23 15:06:53,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-23 15:06:53,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 298 transitions. [2018-11-23 15:06:53,517 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 298 transitions. Word has length 43 [2018-11-23 15:06:53,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:06:53,518 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 298 transitions. [2018-11-23 15:06:53,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:06:53,518 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 298 transitions. [2018-11-23 15:06:53,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 15:06:53,519 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:06:53,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:06:53,520 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:06:53,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:06:53,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1465592603, now seen corresponding path program 1 times [2018-11-23 15:06:53,520 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:06:53,520 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:06:53,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:53,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:06:53,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:06:53,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:06:53,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:06:53,580 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [141] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [127] L-1-->L3770: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [129] L3770-->L3768: Formula: (= v_~pdev~0_2 0) InVars {} OutVars{~pdev~0=v_~pdev~0_2} AuxVars[] AssignedVars[~pdev~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 [151] L3768-->L3768-1: Formula: (and (= (select |v_#valid_4| |v_~#t1~0.base_1|) 0) (not (= |v_~#t1~0.base_1| 0)) (= 0 |v_~#t1~0.offset_1|) (= |v_#length_1| (store |v_#length_2| |v_~#t1~0.base_1| 4)) (= (store |v_#valid_4| |v_~#t1~0.base_1| 1) |v_#valid_3|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_4|} OutVars{~#t1~0.offset=|v_~#t1~0.offset_1|, #length=|v_#length_1|, ~#t1~0.base=|v_~#t1~0.base_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[~#t1~0.base, #valid, ~#t1~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [153] L3768-1-->L3768-2: Formula: (= 0 (select (select |v_#memory_int_1| |v_~#t1~0.base_2|) |v_~#t1~0.offset_2|)) InVars {#memory_int=|v_#memory_int_1|, ~#t1~0.offset=|v_~#t1~0.offset_2|, ~#t1~0.base=|v_~#t1~0.base_2|} OutVars{#memory_int=|v_#memory_int_1|, ~#t1~0.offset=|v_~#t1~0.offset_2|, ~#t1~0.base=|v_~#t1~0.base_2|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [165] L3768-2-->L3769: Formula: (and (= (store |v_#valid_6| |v_~#mutex~0.base_3| 1) |v_#valid_5|) (= (store |v_#length_4| |v_~#mutex~0.base_3| 40) |v_#length_3|) (= (select |v_#valid_6| |v_~#mutex~0.base_3|) 0) (= |v_~#mutex~0.offset_3| 0) (not (= 0 |v_~#mutex~0.base_3|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_3|, #length=|v_#length_3|, ~#mutex~0.base=|v_~#mutex~0.base_3|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[~#mutex~0.base, #valid, ~#mutex~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [185] L3769-->L3769-1: Formula: (= (select (select |v_#memory_int_2| |v_~#mutex~0.base_4|) |v_~#mutex~0.offset_4|) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_2|, ~#mutex~0.base=|v_~#mutex~0.base_4|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_2|, ~#mutex~0.base=|v_~#mutex~0.base_4|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [180] L3769-1-->L3769-2: Formula: (= (select (select |v_#memory_int_3| |v_~#mutex~0.base_5|) (+ |v_~#mutex~0.offset_5| 4)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_3|, ~#mutex~0.base=|v_~#mutex~0.base_5|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_3|, ~#mutex~0.base=|v_~#mutex~0.base_5|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [183] L3769-2-->L3769-3: Formula: (= (select (select |v_#memory_int_4| |v_~#mutex~0.base_6|) (+ |v_~#mutex~0.offset_6| 8)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_4|, ~#mutex~0.base=|v_~#mutex~0.base_6|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_4|, ~#mutex~0.base=|v_~#mutex~0.base_6|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [191] L3769-3-->L3769-4: Formula: (= 0 (select (select |v_#memory_int_5| |v_~#mutex~0.base_7|) (+ |v_~#mutex~0.offset_7| 12))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_5|, ~#mutex~0.base=|v_~#mutex~0.base_7|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_5|, ~#mutex~0.base=|v_~#mutex~0.base_7|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [186] L3769-4-->L3769-5: Formula: (= (select (select |v_#memory_int_6| |v_~#mutex~0.base_8|) (+ |v_~#mutex~0.offset_8| 16)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_6|, ~#mutex~0.base=|v_~#mutex~0.base_8|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_6|, ~#mutex~0.base=|v_~#mutex~0.base_8|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [171] L3769-5-->L3769-6: Formula: (= (select (select |v_#memory_int_7| |v_~#mutex~0.base_9|) (+ |v_~#mutex~0.offset_9| 20)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_9|, #memory_int=|v_#memory_int_7|, ~#mutex~0.base=|v_~#mutex~0.base_9|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_9|, #memory_int=|v_#memory_int_7|, ~#mutex~0.base=|v_~#mutex~0.base_9|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [172] L3769-6-->L3769-7: Formula: (= (select (select |v_#memory_int_8| |v_~#mutex~0.base_10|) (+ |v_~#mutex~0.offset_10| 22)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_10|, #memory_int=|v_#memory_int_8|, ~#mutex~0.base=|v_~#mutex~0.base_10|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_10|, #memory_int=|v_#memory_int_8|, ~#mutex~0.base=|v_~#mutex~0.base_10|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [167] L3769-7-->L3769-8: Formula: (let ((.cse0 (+ |v_~#mutex~0.offset_11| 24))) (and (= (select (select |v_#memory_$Pointer$.offset_1| |v_~#mutex~0.base_11|) .cse0) 0) (= (select (select |v_#memory_$Pointer$.base_1| |v_~#mutex~0.base_11|) .cse0) 0))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_11|, ~#mutex~0.base=|v_~#mutex~0.base_11|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_1|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_1|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_11|, ~#mutex~0.base=|v_~#mutex~0.base_11|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_1|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_1|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [175] L3769-8-->L-1-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [190] L-1-1-->L3812: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [154] L3812-->L3812-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [156] L3812-1-->L3780: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_1|, ULTIMATE.start_module_init_#t~nondet32=|v_ULTIMATE.start_module_init_#t~nondet32_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet31, ULTIMATE.start_module_init_#t~nondet32] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [184] L3780-->L3782: Formula: (= |v_#pthreadsMutex_5| (store |v_#pthreadsMutex_6| |v_~#mutex~0.base_12| (store (select |v_#pthreadsMutex_6| |v_~#mutex~0.base_12|) |v_~#mutex~0.offset_12| 0))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_12|, #pthreadsMutex=|v_#pthreadsMutex_6|, ~#mutex~0.base=|v_~#mutex~0.base_12|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_12|, #pthreadsMutex=|v_#pthreadsMutex_5|, ~#mutex~0.base=|v_~#mutex~0.base_12|} AuxVars[] AssignedVars[#pthreadsMutex] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [149] L3782-->L3783: Formula: (= v_~pdev~0_3 1) InVars {} OutVars{~pdev~0=v_~pdev~0_3} AuxVars[] AssignedVars[~pdev~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [169] L3783-->L3783-1: Formula: (= |v_ULTIMATE.start_ldv_assert_#in~expression_1| (ite (= 1 v_~pdev~0_4) 1 0)) InVars {~pdev~0=v_~pdev~0_4} OutVars{~pdev~0=v_~pdev~0_4, ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [177] L3783-1-->L3766: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [126] L3766-->L3766-1: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_2 |v_ULTIMATE.start_ldv_assert_#in~expression_2|) InVars {ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_2|} OutVars{ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_2|, ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_2} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [125] L3766-1-->L3766-4: Formula: (not (= 0 v_ULTIMATE.start_ldv_assert_~expression_4)) InVars {ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_4} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_4} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [196] L3766-4-->L3784: Formula: (and (<= |v_ULTIMATE.start_module_init_#t~nondet31_2| 2147483647) (<= 0 (+ |v_ULTIMATE.start_module_init_#t~nondet31_2| 2147483648))) InVars {ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_2|} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_2|} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [194] L3784-->L3784-1: Formula: (not (= |v_ULTIMATE.start_module_init_#t~nondet31_3| 0)) InVars {ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_3|} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_3|} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [197] L3784-1-->L3786: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_4|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet31] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [160] L3786-->L3786-1: Formula: (and (= (store |v_#memory_int_10| |v_~#t1~0.base_3| (store (select |v_#memory_int_10| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| 0)) |v_#memory_int_9|) (= |v_#memory_$Pointer$.base_2| (store |v_#memory_$Pointer$.base_3| |v_~#t1~0.base_3| (store (select |v_#memory_$Pointer$.base_3| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| (select (select |v_#memory_$Pointer$.base_2| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3|)))) (= |v_#memory_$Pointer$.offset_2| (store |v_#memory_$Pointer$.offset_3| |v_~#t1~0.base_3| (store (select |v_#memory_$Pointer$.offset_3| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| (select (select |v_#memory_$Pointer$.offset_2| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3|))))) InVars {#memory_int=|v_#memory_int_10|, ~#t1~0.offset=|v_~#t1~0.offset_3|, ~#t1~0.base=|v_~#t1~0.base_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_3|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_3|} OutVars{#memory_int=|v_#memory_int_9|, ~#t1~0.offset=|v_~#t1~0.offset_3|, ~#t1~0.base=|v_~#t1~0.base_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_2|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_2|} AuxVars[] AssignedVars[#memory_$Pointer$.base, #memory_int, #memory_$Pointer$.offset] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 [214] L3786-1-->thread1ENTRY: Formula: (and (= |v_Thread0_thread1_#in~arg.offset_3| 0) (= 0 |v_Thread0_thread1_#in~arg.base_3|) (= v_Thread0_thread1_thidvar0_2 0)) InVars {} OutVars{Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_3|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_3|, Thread0_thread1_thidvar0=v_Thread0_thread1_thidvar0_2} AuxVars[] AssignedVars[Thread0_thread1_#in~arg.base, Thread0_thread1_#in~arg.offset, Thread0_thread1_thidvar0] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [140] L3786-2-->L3790: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet32=|v_ULTIMATE.start_module_init_#t~nondet32_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet32] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [155] L3790-->L3796: Formula: (= |v_ULTIMATE.start_module_init_#res_2| 0) InVars {} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [128] L3796-->L3812-2: Formula: (= |v_ULTIMATE.start_main_#t~ret35_2| |v_ULTIMATE.start_module_init_#res_4|) InVars {ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_4|} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_4|, ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [152] L3812-2-->L3812-3: Formula: (and (<= 0 (+ |v_ULTIMATE.start_main_#t~ret35_3| 2147483648)) (<= |v_ULTIMATE.start_main_#t~ret35_3| 2147483647)) InVars {ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_3|} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_3|} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [163] L3812-3-->L3812-6: Formula: (= |v_ULTIMATE.start_main_#t~ret35_6| 0) InVars {ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_6|} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_6|} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [144] L3812-6-->L3813: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [202] L3813-->L3800: Formula: true InVars {} OutVars{ULTIMATE.start_module_exit_~#status~0.base=|v_ULTIMATE.start_module_exit_~#status~0.base_1|, ULTIMATE.start_module_exit_~#status~0.offset=|v_ULTIMATE.start_module_exit_~#status~0.offset_1|, ULTIMATE.start_module_exit_#t~mem33=|v_ULTIMATE.start_module_exit_#t~mem33_1|, ULTIMATE.start_module_exit_#t~nondet34.base=|v_ULTIMATE.start_module_exit_#t~nondet34.base_1|, ULTIMATE.start_module_exit_#t~nondet34.offset=|v_ULTIMATE.start_module_exit_#t~nondet34.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_exit_~#status~0.base, ULTIMATE.start_module_exit_#t~mem33, ULTIMATE.start_module_exit_#t~nondet34.base, ULTIMATE.start_module_exit_#t~nondet34.offset, ULTIMATE.start_module_exit_~#status~0.offset] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [133] L3800-->L3800-1: Formula: (and (= |v_ULTIMATE.start_module_exit_~#status~0.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_module_exit_~#status~0.base_2| 1)) (= 0 (select |v_#valid_8| |v_ULTIMATE.start_module_exit_~#status~0.base_2|)) (= (store |v_#length_6| |v_ULTIMATE.start_module_exit_~#status~0.base_2| 4) |v_#length_5|) (not (= 0 |v_ULTIMATE.start_module_exit_~#status~0.base_2|))) InVars {#length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_module_exit_~#status~0.base=|v_ULTIMATE.start_module_exit_~#status~0.base_2|, ULTIMATE.start_module_exit_~#status~0.offset=|v_ULTIMATE.start_module_exit_~#status~0.offset_2|, #length=|v_#length_5|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_module_exit_~#status~0.base, #valid, ULTIMATE.start_module_exit_~#status~0.offset, #length] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [134] L3800-1-->L3803: Formula: (= v_~pdev~0_7 4) InVars {} OutVars{~pdev~0=v_~pdev~0_7} AuxVars[] AssignedVars[~pdev~0] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [207] thread1ENTRY-->L3773: Formula: (and (= v_Thread0_thread1_~arg.offset_1 |v_Thread0_thread1_#in~arg.offset_1|) (= v_Thread0_thread1_~arg.base_1 |v_Thread0_thread1_#in~arg.base_1|)) InVars {Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_1|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_1|} OutVars{Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_1|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_1|, Thread0_thread1_~arg.offset=v_Thread0_thread1_~arg.offset_1, Thread0_thread1_~arg.base=v_Thread0_thread1_~arg.base_1} AuxVars[] AssignedVars[Thread0_thread1_~arg.offset, Thread0_thread1_~arg.base] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [208] L3773-->L3773-1: Formula: (let ((.cse0 (select |v_#pthreadsMutex_2| |v_~#mutex~0.base_1|))) (and (= (store |v_#pthreadsMutex_2| |v_~#mutex~0.base_1| (store .cse0 |v_~#mutex~0.offset_1| 1)) |v_#pthreadsMutex_1|) (= 0 (select .cse0 |v_~#mutex~0.offset_1|)) (= 0 |v_Thread0_thread1_#t~nondet30_1|))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_1|, #pthreadsMutex=|v_#pthreadsMutex_2|, ~#mutex~0.base=|v_~#mutex~0.base_1|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_1|, #pthreadsMutex=|v_#pthreadsMutex_1|, ~#mutex~0.base=|v_~#mutex~0.base_1|, Thread0_thread1_#t~nondet30=|v_Thread0_thread1_#t~nondet30_1|} AuxVars[] AssignedVars[#pthreadsMutex, Thread0_thread1_#t~nondet30] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |Thread0_thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [209] L3773-1-->L3774: Formula: true InVars {} OutVars{Thread0_thread1_#t~nondet30=|v_Thread0_thread1_#t~nondet30_2|} AuxVars[] AssignedVars[Thread0_thread1_#t~nondet30] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [210] L3774-->L3775: Formula: (= v_~pdev~0_1 6) InVars {} OutVars{~pdev~0=v_~pdev~0_1} AuxVars[] AssignedVars[~pdev~0] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [132] L3803-->L3803-1: Formula: (= |v_ULTIMATE.start_ldv_assert_#in~expression_5| (ite (= 4 v_~pdev~0_8) 1 0)) InVars {~pdev~0=v_~pdev~0_8} OutVars{~pdev~0=v_~pdev~0_8, ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [130] L3803-1-->L3766-10: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_9} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [189] L3766-10-->L3766-11: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_10 |v_ULTIMATE.start_ldv_assert_#in~expression_6|) InVars {ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_6|} OutVars{ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_6|, ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_10} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [192] L3766-11-->L3766-12: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_11 0) InVars {ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_11} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_11} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [187] L3766-12-->ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~pdev~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L3768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); srcloc: L3768-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); srcloc: L3769 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); srcloc: L3769-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); srcloc: L3769-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); srcloc: L3769-3 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); srcloc: L3769-4 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); srcloc: L3769-5 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); srcloc: L3769-6 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); srcloc: L3769-7 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 ~pdev~0 := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc ldv_assert_~expression; VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 == ldv_assert_~expression); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume 0 != module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3786 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 fork 0 thread1(0, 0); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet32; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 module_init_#res := 0; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 main_#t~ret35 := module_init_#res; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 != main_#t~ret35); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc main_#t~ret35; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); srcloc: L3800 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ~pdev~0 := 4; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 SUMMARY for call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); srcloc: L3773 VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 havoc #t~nondet30; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~pdev~0 := 6; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 havoc ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume 0 == ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume !false; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~pdev~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L3768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); srcloc: L3768-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); srcloc: L3769 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); srcloc: L3769-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); srcloc: L3769-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); srcloc: L3769-3 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); srcloc: L3769-4 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); srcloc: L3769-5 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); srcloc: L3769-6 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); srcloc: L3769-7 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 ~pdev~0 := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc ldv_assert_~expression; VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 == ldv_assert_~expression); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume 0 != module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3786 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 fork 0 thread1(0, 0); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet32; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 module_init_#res := 0; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 main_#t~ret35 := module_init_#res; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 != main_#t~ret35); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc main_#t~ret35; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); srcloc: L3800 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ~pdev~0 := 4; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 SUMMARY for call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); srcloc: L3773 VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 havoc #t~nondet30; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~pdev~0 := 6; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 havoc ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume 0 == ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume !false; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~pdev~0=0] [L3768] -1 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3768] -1 call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 assume !(0 == ldv_assert_~expression); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784-L3791] -1 assume 0 != module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume !(0 != main_#t~ret35); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3800] -1 call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assume 0 == ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~pdev~0=0] [L3768] -1 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3768] -1 call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 assume !(0 == ldv_assert_~expression); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784-L3791] -1 assume 0 != module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume !(0 != main_#t~ret35); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3800] -1 call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assume 0 == ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ldv_assert_~expression) VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != module_init_#t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != main_#t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34, module_exit_~#status~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call module_exit_~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ldv_assert_~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ldv_assert_~expression) VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != module_init_#t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != main_#t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34, module_exit_~#status~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call module_exit_~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ldv_assert_~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != #t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc #t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc #t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 #res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= #t~ret35 && #t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != #t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc #t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call ~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != #t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc #t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc #t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 #res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= #t~ret35 && #t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != #t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc #t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call ~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3770] -1 int pdev; VAL [pdev=0] [L3768] -1 pthread_t t1; VAL [pdev=0, t1={45:0}] [L3769] -1 pthread_mutex_t mutex; VAL [mutex={42:0}, pdev=0, t1={45:0}] [L3782] -1 pdev = 1 VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3766] COND FALSE -1 !(!expression) VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3784] COND TRUE -1 __VERIFIER_nondet_int() VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3786] FCALL, FORK -1 pthread_create(&t1, ((void *)0), thread1, ((void *)0)) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3790] -1 return 0; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3812] COND FALSE -1 !(module_init()!=0) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3800] -1 void *status; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3802] -1 pdev = 4 VAL [arg={0:0}, mutex={42:0}, pdev=4, t1={45:0}] [L3774] 0 pdev = 6 VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] COND TRUE -1 !expression VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] -1 __VERIFIER_error() VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] ----- [2018-11-23 15:06:53,700 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 15:06:53,701 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:06:53 BasicIcfg [2018-11-23 15:06:53,702 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 15:06:53,702 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 15:06:53,702 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 15:06:53,702 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 15:06:53,705 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:06:52" (3/4) ... [2018-11-23 15:06:53,708 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [141] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [127] L-1-->L3770: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [129] L3770-->L3768: Formula: (= v_~pdev~0_2 0) InVars {} OutVars{~pdev~0=v_~pdev~0_2} AuxVars[] AssignedVars[~pdev~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 [151] L3768-->L3768-1: Formula: (and (= (select |v_#valid_4| |v_~#t1~0.base_1|) 0) (not (= |v_~#t1~0.base_1| 0)) (= 0 |v_~#t1~0.offset_1|) (= |v_#length_1| (store |v_#length_2| |v_~#t1~0.base_1| 4)) (= (store |v_#valid_4| |v_~#t1~0.base_1| 1) |v_#valid_3|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_4|} OutVars{~#t1~0.offset=|v_~#t1~0.offset_1|, #length=|v_#length_1|, ~#t1~0.base=|v_~#t1~0.base_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[~#t1~0.base, #valid, ~#t1~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [153] L3768-1-->L3768-2: Formula: (= 0 (select (select |v_#memory_int_1| |v_~#t1~0.base_2|) |v_~#t1~0.offset_2|)) InVars {#memory_int=|v_#memory_int_1|, ~#t1~0.offset=|v_~#t1~0.offset_2|, ~#t1~0.base=|v_~#t1~0.base_2|} OutVars{#memory_int=|v_#memory_int_1|, ~#t1~0.offset=|v_~#t1~0.offset_2|, ~#t1~0.base=|v_~#t1~0.base_2|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [165] L3768-2-->L3769: Formula: (and (= (store |v_#valid_6| |v_~#mutex~0.base_3| 1) |v_#valid_5|) (= (store |v_#length_4| |v_~#mutex~0.base_3| 40) |v_#length_3|) (= (select |v_#valid_6| |v_~#mutex~0.base_3|) 0) (= |v_~#mutex~0.offset_3| 0) (not (= 0 |v_~#mutex~0.base_3|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_3|, #length=|v_#length_3|, ~#mutex~0.base=|v_~#mutex~0.base_3|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[~#mutex~0.base, #valid, ~#mutex~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [185] L3769-->L3769-1: Formula: (= (select (select |v_#memory_int_2| |v_~#mutex~0.base_4|) |v_~#mutex~0.offset_4|) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_2|, ~#mutex~0.base=|v_~#mutex~0.base_4|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_2|, ~#mutex~0.base=|v_~#mutex~0.base_4|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [180] L3769-1-->L3769-2: Formula: (= (select (select |v_#memory_int_3| |v_~#mutex~0.base_5|) (+ |v_~#mutex~0.offset_5| 4)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_3|, ~#mutex~0.base=|v_~#mutex~0.base_5|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_3|, ~#mutex~0.base=|v_~#mutex~0.base_5|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [183] L3769-2-->L3769-3: Formula: (= (select (select |v_#memory_int_4| |v_~#mutex~0.base_6|) (+ |v_~#mutex~0.offset_6| 8)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_4|, ~#mutex~0.base=|v_~#mutex~0.base_6|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_4|, ~#mutex~0.base=|v_~#mutex~0.base_6|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [191] L3769-3-->L3769-4: Formula: (= 0 (select (select |v_#memory_int_5| |v_~#mutex~0.base_7|) (+ |v_~#mutex~0.offset_7| 12))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_5|, ~#mutex~0.base=|v_~#mutex~0.base_7|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_5|, ~#mutex~0.base=|v_~#mutex~0.base_7|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [186] L3769-4-->L3769-5: Formula: (= (select (select |v_#memory_int_6| |v_~#mutex~0.base_8|) (+ |v_~#mutex~0.offset_8| 16)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_6|, ~#mutex~0.base=|v_~#mutex~0.base_8|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_6|, ~#mutex~0.base=|v_~#mutex~0.base_8|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [171] L3769-5-->L3769-6: Formula: (= (select (select |v_#memory_int_7| |v_~#mutex~0.base_9|) (+ |v_~#mutex~0.offset_9| 20)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_9|, #memory_int=|v_#memory_int_7|, ~#mutex~0.base=|v_~#mutex~0.base_9|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_9|, #memory_int=|v_#memory_int_7|, ~#mutex~0.base=|v_~#mutex~0.base_9|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [172] L3769-6-->L3769-7: Formula: (= (select (select |v_#memory_int_8| |v_~#mutex~0.base_10|) (+ |v_~#mutex~0.offset_10| 22)) 0) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_10|, #memory_int=|v_#memory_int_8|, ~#mutex~0.base=|v_~#mutex~0.base_10|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_10|, #memory_int=|v_#memory_int_8|, ~#mutex~0.base=|v_~#mutex~0.base_10|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [167] L3769-7-->L3769-8: Formula: (let ((.cse0 (+ |v_~#mutex~0.offset_11| 24))) (and (= (select (select |v_#memory_$Pointer$.offset_1| |v_~#mutex~0.base_11|) .cse0) 0) (= (select (select |v_#memory_$Pointer$.base_1| |v_~#mutex~0.base_11|) .cse0) 0))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_11|, ~#mutex~0.base=|v_~#mutex~0.base_11|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_1|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_1|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_11|, ~#mutex~0.base=|v_~#mutex~0.base_11|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_1|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_1|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [175] L3769-8-->L-1-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [190] L-1-1-->L3812: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [154] L3812-->L3812-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [156] L3812-1-->L3780: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_1|, ULTIMATE.start_module_init_#t~nondet32=|v_ULTIMATE.start_module_init_#t~nondet32_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet31, ULTIMATE.start_module_init_#t~nondet32] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [184] L3780-->L3782: Formula: (= |v_#pthreadsMutex_5| (store |v_#pthreadsMutex_6| |v_~#mutex~0.base_12| (store (select |v_#pthreadsMutex_6| |v_~#mutex~0.base_12|) |v_~#mutex~0.offset_12| 0))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_12|, #pthreadsMutex=|v_#pthreadsMutex_6|, ~#mutex~0.base=|v_~#mutex~0.base_12|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_12|, #pthreadsMutex=|v_#pthreadsMutex_5|, ~#mutex~0.base=|v_~#mutex~0.base_12|} AuxVars[] AssignedVars[#pthreadsMutex] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 [149] L3782-->L3783: Formula: (= v_~pdev~0_3 1) InVars {} OutVars{~pdev~0=v_~pdev~0_3} AuxVars[] AssignedVars[~pdev~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [169] L3783-->L3783-1: Formula: (= |v_ULTIMATE.start_ldv_assert_#in~expression_1| (ite (= 1 v_~pdev~0_4) 1 0)) InVars {~pdev~0=v_~pdev~0_4} OutVars{~pdev~0=v_~pdev~0_4, ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [177] L3783-1-->L3766: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [126] L3766-->L3766-1: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_2 |v_ULTIMATE.start_ldv_assert_#in~expression_2|) InVars {ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_2|} OutVars{ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_2|, ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_2} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [125] L3766-1-->L3766-4: Formula: (not (= 0 v_ULTIMATE.start_ldv_assert_~expression_4)) InVars {ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_4} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_4} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [196] L3766-4-->L3784: Formula: (and (<= |v_ULTIMATE.start_module_init_#t~nondet31_2| 2147483647) (<= 0 (+ |v_ULTIMATE.start_module_init_#t~nondet31_2| 2147483648))) InVars {ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_2|} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_2|} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [194] L3784-->L3784-1: Formula: (not (= |v_ULTIMATE.start_module_init_#t~nondet31_3| 0)) InVars {ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_3|} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_3|} AuxVars[] AssignedVars[] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [197] L3784-1-->L3786: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet31=|v_ULTIMATE.start_module_init_#t~nondet31_4|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet31] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [160] L3786-->L3786-1: Formula: (and (= (store |v_#memory_int_10| |v_~#t1~0.base_3| (store (select |v_#memory_int_10| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| 0)) |v_#memory_int_9|) (= |v_#memory_$Pointer$.base_2| (store |v_#memory_$Pointer$.base_3| |v_~#t1~0.base_3| (store (select |v_#memory_$Pointer$.base_3| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| (select (select |v_#memory_$Pointer$.base_2| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3|)))) (= |v_#memory_$Pointer$.offset_2| (store |v_#memory_$Pointer$.offset_3| |v_~#t1~0.base_3| (store (select |v_#memory_$Pointer$.offset_3| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3| (select (select |v_#memory_$Pointer$.offset_2| |v_~#t1~0.base_3|) |v_~#t1~0.offset_3|))))) InVars {#memory_int=|v_#memory_int_10|, ~#t1~0.offset=|v_~#t1~0.offset_3|, ~#t1~0.base=|v_~#t1~0.base_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_3|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_3|} OutVars{#memory_int=|v_#memory_int_9|, ~#t1~0.offset=|v_~#t1~0.offset_3|, ~#t1~0.base=|v_~#t1~0.base_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_2|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_2|} AuxVars[] AssignedVars[#memory_$Pointer$.base, #memory_int, #memory_$Pointer$.offset] VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 [214] L3786-1-->thread1ENTRY: Formula: (and (= |v_Thread0_thread1_#in~arg.offset_3| 0) (= 0 |v_Thread0_thread1_#in~arg.base_3|) (= v_Thread0_thread1_thidvar0_2 0)) InVars {} OutVars{Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_3|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_3|, Thread0_thread1_thidvar0=v_Thread0_thread1_thidvar0_2} AuxVars[] AssignedVars[Thread0_thread1_#in~arg.base, Thread0_thread1_#in~arg.offset, Thread0_thread1_thidvar0] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [140] L3786-2-->L3790: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet32=|v_ULTIMATE.start_module_init_#t~nondet32_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet32] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [155] L3790-->L3796: Formula: (= |v_ULTIMATE.start_module_init_#res_2| 0) InVars {} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [128] L3796-->L3812-2: Formula: (= |v_ULTIMATE.start_main_#t~ret35_2| |v_ULTIMATE.start_module_init_#res_4|) InVars {ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_4|} OutVars{ULTIMATE.start_module_init_#res=|v_ULTIMATE.start_module_init_#res_4|, ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [152] L3812-2-->L3812-3: Formula: (and (<= 0 (+ |v_ULTIMATE.start_main_#t~ret35_3| 2147483648)) (<= |v_ULTIMATE.start_main_#t~ret35_3| 2147483647)) InVars {ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_3|} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_3|} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [163] L3812-3-->L3812-6: Formula: (= |v_ULTIMATE.start_main_#t~ret35_6| 0) InVars {ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_6|} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_6|} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [144] L3812-6-->L3813: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret35=|v_ULTIMATE.start_main_#t~ret35_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret35] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [202] L3813-->L3800: Formula: true InVars {} OutVars{ULTIMATE.start_module_exit_~#status~0.base=|v_ULTIMATE.start_module_exit_~#status~0.base_1|, ULTIMATE.start_module_exit_~#status~0.offset=|v_ULTIMATE.start_module_exit_~#status~0.offset_1|, ULTIMATE.start_module_exit_#t~mem33=|v_ULTIMATE.start_module_exit_#t~mem33_1|, ULTIMATE.start_module_exit_#t~nondet34.base=|v_ULTIMATE.start_module_exit_#t~nondet34.base_1|, ULTIMATE.start_module_exit_#t~nondet34.offset=|v_ULTIMATE.start_module_exit_#t~nondet34.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_module_exit_~#status~0.base, ULTIMATE.start_module_exit_#t~mem33, ULTIMATE.start_module_exit_#t~nondet34.base, ULTIMATE.start_module_exit_#t~nondet34.offset, ULTIMATE.start_module_exit_~#status~0.offset] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [133] L3800-->L3800-1: Formula: (and (= |v_ULTIMATE.start_module_exit_~#status~0.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_module_exit_~#status~0.base_2| 1)) (= 0 (select |v_#valid_8| |v_ULTIMATE.start_module_exit_~#status~0.base_2|)) (= (store |v_#length_6| |v_ULTIMATE.start_module_exit_~#status~0.base_2| 4) |v_#length_5|) (not (= 0 |v_ULTIMATE.start_module_exit_~#status~0.base_2|))) InVars {#length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_module_exit_~#status~0.base=|v_ULTIMATE.start_module_exit_~#status~0.base_2|, ULTIMATE.start_module_exit_~#status~0.offset=|v_ULTIMATE.start_module_exit_~#status~0.offset_2|, #length=|v_#length_5|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_module_exit_~#status~0.base, #valid, ULTIMATE.start_module_exit_~#status~0.offset, #length] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 [134] L3800-1-->L3803: Formula: (= v_~pdev~0_7 4) InVars {} OutVars{~pdev~0=v_~pdev~0_7} AuxVars[] AssignedVars[~pdev~0] VAL [Thread0_thread1_thidvar0=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [207] thread1ENTRY-->L3773: Formula: (and (= v_Thread0_thread1_~arg.offset_1 |v_Thread0_thread1_#in~arg.offset_1|) (= v_Thread0_thread1_~arg.base_1 |v_Thread0_thread1_#in~arg.base_1|)) InVars {Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_1|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_1|} OutVars{Thread0_thread1_#in~arg.base=|v_Thread0_thread1_#in~arg.base_1|, Thread0_thread1_#in~arg.offset=|v_Thread0_thread1_#in~arg.offset_1|, Thread0_thread1_~arg.offset=v_Thread0_thread1_~arg.offset_1, Thread0_thread1_~arg.base=v_Thread0_thread1_~arg.base_1} AuxVars[] AssignedVars[Thread0_thread1_~arg.offset, Thread0_thread1_~arg.base] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [208] L3773-->L3773-1: Formula: (let ((.cse0 (select |v_#pthreadsMutex_2| |v_~#mutex~0.base_1|))) (and (= (store |v_#pthreadsMutex_2| |v_~#mutex~0.base_1| (store .cse0 |v_~#mutex~0.offset_1| 1)) |v_#pthreadsMutex_1|) (= 0 (select .cse0 |v_~#mutex~0.offset_1|)) (= 0 |v_Thread0_thread1_#t~nondet30_1|))) InVars {~#mutex~0.offset=|v_~#mutex~0.offset_1|, #pthreadsMutex=|v_#pthreadsMutex_2|, ~#mutex~0.base=|v_~#mutex~0.base_1|} OutVars{~#mutex~0.offset=|v_~#mutex~0.offset_1|, #pthreadsMutex=|v_#pthreadsMutex_1|, ~#mutex~0.base=|v_~#mutex~0.base_1|, Thread0_thread1_#t~nondet30=|v_Thread0_thread1_#t~nondet30_1|} AuxVars[] AssignedVars[#pthreadsMutex, Thread0_thread1_#t~nondet30] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |Thread0_thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [209] L3773-1-->L3774: Formula: true InVars {} OutVars{Thread0_thread1_#t~nondet30=|v_Thread0_thread1_#t~nondet30_2|} AuxVars[] AssignedVars[Thread0_thread1_#t~nondet30] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 [210] L3774-->L3775: Formula: (= v_~pdev~0_1 6) InVars {} OutVars{~pdev~0=v_~pdev~0_1} AuxVars[] AssignedVars[~pdev~0] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [132] L3803-->L3803-1: Formula: (= |v_ULTIMATE.start_ldv_assert_#in~expression_5| (ite (= 4 v_~pdev~0_8) 1 0)) InVars {~pdev~0=v_~pdev~0_8} OutVars{~pdev~0=v_~pdev~0_8, ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [130] L3803-1-->L3766-10: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_9} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [189] L3766-10-->L3766-11: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_10 |v_ULTIMATE.start_ldv_assert_#in~expression_6|) InVars {ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_6|} OutVars{ULTIMATE.start_ldv_assert_#in~expression=|v_ULTIMATE.start_ldv_assert_#in~expression_6|, ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_10} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [192] L3766-11-->L3766-12: Formula: (= v_ULTIMATE.start_ldv_assert_~expression_11 0) InVars {ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_11} OutVars{ULTIMATE.start_ldv_assert_~expression=v_ULTIMATE.start_ldv_assert_~expression_11} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 [187] L3766-12-->ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread1_thidvar0=0, Thread0_thread1_~arg.base=0, Thread0_thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread1_#in~arg.base|=0, |Thread0_thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~pdev~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L3768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); srcloc: L3768-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); srcloc: L3769 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); srcloc: L3769-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); srcloc: L3769-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); srcloc: L3769-3 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); srcloc: L3769-4 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); srcloc: L3769-5 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); srcloc: L3769-6 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); srcloc: L3769-7 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 ~pdev~0 := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc ldv_assert_~expression; VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 == ldv_assert_~expression); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume 0 != module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3786 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 fork 0 thread1(0, 0); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet32; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 module_init_#res := 0; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 main_#t~ret35 := module_init_#res; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 != main_#t~ret35); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc main_#t~ret35; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); srcloc: L3800 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ~pdev~0 := 4; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 SUMMARY for call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); srcloc: L3773 VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 havoc #t~nondet30; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~pdev~0 := 6; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 havoc ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume 0 == ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume !false; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~pdev~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L3768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); srcloc: L3768-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); srcloc: L3769 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); srcloc: L3769-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); srcloc: L3769-2 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); srcloc: L3769-3 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); srcloc: L3769-4 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); srcloc: L3769-5 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); srcloc: L3769-6 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 SUMMARY for call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); srcloc: L3769-7 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=0] [?] -1 ~pdev~0 := 1; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc ldv_assert_~expression; VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 == ldv_assert_~expression); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume 0 != module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#t~nondet31|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet31; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L3786 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] FORK -1 fork 0 thread1(0, 0); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_init_#t~nondet32; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 module_init_#res := 0; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 main_#t~ret35 := module_init_#res; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 assume !(0 != main_#t~ret35); VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ret35|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc main_#t~ret35; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 SUMMARY for call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); srcloc: L3800 VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=1] [?] -1 ~pdev~0 := 4; VAL [ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 SUMMARY for call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); srcloc: L3773 VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~nondet30|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 havoc #t~nondet30; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=4] [?] 0 ~pdev~0 := 6; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=1, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=1, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 havoc ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume 0 == ldv_assert_~expression; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 assume !false; VAL [thread1_~arg.base=0, thread1_~arg.offset=0, ULTIMATE.start_ldv_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_ldv_assert_#in~expression|=0, |ULTIMATE.start_module_exit_~#status~0.base|=41, |ULTIMATE.start_module_exit_~#status~0.offset|=0, |ULTIMATE.start_module_init_#res|=0, |~#mutex~0.base|=42, |~#mutex~0.offset|=0, |~#t1~0.base|=45, |~#t1~0.offset|=0, ~pdev~0=6] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~pdev~0=0] [L3768] -1 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3768] -1 call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 assume !(0 == ldv_assert_~expression); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784-L3791] -1 assume 0 != module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume !(0 != main_#t~ret35); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3800] -1 call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assume 0 == ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~pdev~0=0] [L3768] -1 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3768] -1 call write~init~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call ~#mutex~0.base, ~#mutex~0.offset := #Ultimate.alloc(40); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 4 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 8 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 12 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 16 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 20 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~int(0, ~#mutex~0.base, 22 + ~#mutex~0.offset, 2); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3769] -1 call write~init~$Pointer$(0, 0, ~#mutex~0.base, 24 + ~#mutex~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex := #pthreadsMutex[~#mutex~0.base,~#mutex~0.offset := 0]; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL.base=0, #NULL.offset=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3766] -1 assume !(0 == ldv_assert_~expression); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784-L3791] -1 assume 0 != module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 assume !(0 != main_#t~ret35); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34.base, module_exit_#t~nondet34.offset, module_exit_~#status~0.base, module_exit_~#status~0.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3800] -1 call module_exit_~#status~0.base, module_exit_~#status~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0.base, ~#mutex~0.offset); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assume 0 == ldv_assert_~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0.base=41, module_exit_~#status~0.offset=0, module_init_#res=0, ~#mutex~0.base=42, ~#mutex~0.offset=0, ~#t1~0.base=45, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~pdev~0=6] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ldv_assert_~expression) VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != module_init_#t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != main_#t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34, module_exit_~#status~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call module_exit_~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ldv_assert_~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [?] -1 havoc main_#t~ret35; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3812] -1 havoc module_init_#t~nondet31, module_init_#t~nondet32; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 ldv_assert_#in~expression := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3783] -1 havoc ldv_assert_~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ldv_assert_~expression) VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= module_init_#t~nondet31 && module_init_#t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != module_init_#t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#t~nondet31=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc module_init_#t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc module_init_#t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 module_init_#res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 main_#t~ret35 := module_init_#res; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= main_#t~ret35 && main_#t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != main_#t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, main_#t~ret35=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc main_#t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3813] -1 havoc module_exit_#t~mem33, module_exit_#t~nondet34, module_exit_~#status~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call module_exit_~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=1, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 ldv_assert_#in~expression := (if 4 == ~pdev~0 then 1 else 0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=1, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3803] -1 havoc ldv_assert_~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ldv_assert_~expression := ldv_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ldv_assert_~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ldv_assert_#in~expression=0, ldv_assert_~expression=0, module_exit_~#status~0!base=41, module_exit_~#status~0!offset=0, module_init_#res=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != #t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc #t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc #t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 #res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= #t~ret35 && #t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != #t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc #t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call ~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L3770] -1 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~pdev~0=0] [L3768] FCALL -1 call ~#t1~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3768] FCALL -1 call write~init~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call ~#mutex~0 := #Ultimate.alloc(40); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 20 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~int(0, { base: ~#mutex~0!base, offset: 22 + ~#mutex~0!offset }, 2); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3769] FCALL -1 call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#mutex~0!base, offset: 24 + ~#mutex~0!offset }, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3780] -1 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=0] [L3782] -1 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] -1 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3766] COND FALSE -1 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784-L3791] COND TRUE -1 0 != #t~nondet31 VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3784] -1 havoc #t~nondet31; VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FCALL -1 call write~int(0, ~#t1~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] FORK -1 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3786] -1 havoc #t~nondet32; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3790] -1 #res := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 assume -2147483648 <= #t~ret35 && #t~ret35 <= 2147483647; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] COND FALSE -1 !(0 != #t~ret35) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3812] -1 havoc #t~ret35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3800] FCALL -1 call ~#status~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=1] [L3802] -1 ~pdev~0 := 4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~pdev~0=4] [L3772-L3777] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] FCALL 0 call #t~nondet30 := #PthreadsMutexLock(~#mutex~0); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet30=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3773] 0 havoc #t~nondet30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=4] [L3774] 0 ~pdev~0 := 6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3766] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#mutex~0!base=42, ~#mutex~0!offset=0, ~#t1~0!base=45, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~pdev~0=6] [L3770] -1 int pdev; VAL [pdev=0] [L3768] -1 pthread_t t1; VAL [pdev=0, t1={45:0}] [L3769] -1 pthread_mutex_t mutex; VAL [mutex={42:0}, pdev=0, t1={45:0}] [L3782] -1 pdev = 1 VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3766] COND FALSE -1 !(!expression) VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3784] COND TRUE -1 __VERIFIER_nondet_int() VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3786] FCALL, FORK -1 pthread_create(&t1, ((void *)0), thread1, ((void *)0)) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3790] -1 return 0; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3812] COND FALSE -1 !(module_init()!=0) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3800] -1 void *status; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3802] -1 pdev = 4 VAL [arg={0:0}, mutex={42:0}, pdev=4, t1={45:0}] [L3774] 0 pdev = 6 VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] COND TRUE -1 !expression VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] -1 __VERIFIER_error() VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] ----- [2018-11-23 15:06:54,051 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_55566e66-222c-49c8-827c-f62fb4bd6b60/bin-2019/uautomizer/witness.graphml [2018-11-23 15:06:54,051 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 15:06:54,052 INFO L168 Benchmark]: Toolchain (without parser) took 3246.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.9 MB). Free memory was 955.4 MB in the beginning and 1.1 GB in the end (delta: -129.9 MB). Peak memory consumption was 29.0 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,054 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:06:54,054 INFO L168 Benchmark]: CACSL2BoogieTranslator took 921.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.9 MB). Free memory was 955.4 MB in the beginning and 1.0 GB in the end (delta: -87.6 MB). Peak memory consumption was 86.4 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,055 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,055 INFO L168 Benchmark]: Boogie Preprocessor took 25.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,055 INFO L168 Benchmark]: RCFGBuilder took 448.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 999.1 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,056 INFO L168 Benchmark]: TraceAbstraction took 1459.95 ms. Allocated memory is still 1.2 GB. Free memory was 999.1 MB in the beginning and 1.1 GB in the end (delta: -100.3 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:06:54,056 INFO L168 Benchmark]: Witness Printer took 349.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 11.5 GB. [2018-11-23 15:06:54,059 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 921.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.9 MB). Free memory was 955.4 MB in the beginning and 1.0 GB in the end (delta: -87.6 MB). Peak memory consumption was 86.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.31 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 448.67 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 999.1 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 1459.95 ms. Allocated memory is still 1.2 GB. Free memory was 999.1 MB in the beginning and 1.1 GB in the end (delta: -100.3 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 349.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 3766]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L3770] -1 int pdev; VAL [pdev=0] [L3768] -1 pthread_t t1; VAL [pdev=0, t1={45:0}] [L3769] -1 pthread_mutex_t mutex; VAL [mutex={42:0}, pdev=0, t1={45:0}] [L3782] -1 pdev = 1 VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3766] COND FALSE -1 !(!expression) VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3784] COND TRUE -1 __VERIFIER_nondet_int() VAL [mutex={42:0}, pdev=1, t1={45:0}] [L3786] FCALL, FORK -1 pthread_create(&t1, ((void *)0), thread1, ((void *)0)) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3790] -1 return 0; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3812] COND FALSE -1 !(module_init()!=0) VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3800] -1 void *status; VAL [arg={0:0}, mutex={42:0}, pdev=1, t1={45:0}] [L3802] -1 pdev = 4 VAL [arg={0:0}, mutex={42:0}, pdev=4, t1={45:0}] [L3774] 0 pdev = 6 VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] COND TRUE -1 !expression VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] [L3766] -1 __VERIFIER_error() VAL [arg={0:0}, arg={0:0}, mutex={42:0}, pdev=6, t1={45:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 90 locations, 4 error locations. UNSAFE Result, 1.3s OverallTime, 4 OverallIterations, 1 TraceHistogramMax, 0.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 224 SDtfs, 462 SDslu, 729 SDs, 0 SdLazy, 154 SolverSat, 17 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 41 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=248occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 3 MinimizatonAttempts, 38 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.3s InterpolantComputationTime, 148 NumberOfCodeBlocks, 148 NumberOfCodeBlocksAsserted, 4 NumberOfCheckSat, 98 ConstructedInterpolants, 0 QuantifiedInterpolants, 4962 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 3 InterpolantComputations, 3 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...