./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b3ae452df12de0c6a1fb927454711cf972ad1d78 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 15:52:56,602 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 15:52:56,603 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 15:52:56,612 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 15:52:56,612 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 15:52:56,613 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 15:52:56,614 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 15:52:56,616 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 15:52:56,617 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 15:52:56,618 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 15:52:56,619 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 15:52:56,619 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 15:52:56,620 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 15:52:56,621 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 15:52:56,622 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 15:52:56,623 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 15:52:56,624 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 15:52:56,626 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 15:52:56,628 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 15:52:56,629 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 15:52:56,630 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 15:52:56,631 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 15:52:56,633 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 15:52:56,633 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 15:52:56,634 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 15:52:56,634 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 15:52:56,635 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 15:52:56,636 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 15:52:56,637 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 15:52:56,638 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 15:52:56,639 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 15:52:56,639 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 15:52:56,639 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 15:52:56,640 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 15:52:56,640 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 15:52:56,641 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 15:52:56,641 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 15:52:56,654 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 15:52:56,654 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 15:52:56,655 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 15:52:56,655 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 15:52:56,656 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 15:52:56,656 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 15:52:56,656 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 15:52:56,656 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 15:52:56,657 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 15:52:56,658 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 15:52:56,658 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 15:52:56,658 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 15:52:56,658 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 15:52:56,658 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 15:52:56,659 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 15:52:56,659 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 15:52:56,659 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 15:52:56,659 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 15:52:56,659 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:52:56,660 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 15:52:56,660 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 15:52:56,662 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 15:52:56,663 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 15:52:56,663 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 15:52:56,663 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 15:52:56,663 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b3ae452df12de0c6a1fb927454711cf972ad1d78 [2018-11-23 15:52:56,691 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 15:52:56,701 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 15:52:56,704 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 15:52:56,705 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 15:52:56,705 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 15:52:56,705 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi000_power.opt_false-unreach-call.i [2018-11-23 15:52:56,750 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/data/b3b729481/ffb0473324ee4a478371dc2f41adb38c/FLAG203a17427 [2018-11-23 15:52:57,162 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 15:52:57,163 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/sv-benchmarks/c/pthread-wmm/rfi000_power.opt_false-unreach-call.i [2018-11-23 15:52:57,177 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/data/b3b729481/ffb0473324ee4a478371dc2f41adb38c/FLAG203a17427 [2018-11-23 15:52:57,526 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/data/b3b729481/ffb0473324ee4a478371dc2f41adb38c [2018-11-23 15:52:57,529 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 15:52:57,530 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 15:52:57,531 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 15:52:57,531 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 15:52:57,534 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 15:52:57,535 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:52:57" (1/1) ... [2018-11-23 15:52:57,537 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@190eb899 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:57, skipping insertion in model container [2018-11-23 15:52:57,537 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:52:57" (1/1) ... [2018-11-23 15:52:57,545 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 15:52:57,584 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 15:52:57,879 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:52:57,891 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 15:52:57,998 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 15:52:58,039 INFO L195 MainTranslator]: Completed translation [2018-11-23 15:52:58,039 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58 WrapperNode [2018-11-23 15:52:58,039 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 15:52:58,040 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 15:52:58,040 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 15:52:58,040 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 15:52:58,049 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,068 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,099 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 15:52:58,100 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 15:52:58,100 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 15:52:58,100 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 15:52:58,110 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,110 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,114 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,115 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,124 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,128 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,130 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... [2018-11-23 15:52:58,134 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 15:52:58,134 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 15:52:58,134 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 15:52:58,135 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 15:52:58,136 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 15:52:58,184 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 15:52:58,184 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 15:52:58,184 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 15:52:58,184 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 15:52:58,185 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 15:52:58,185 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 15:52:58,185 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 15:52:58,185 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 15:52:58,185 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 15:52:58,185 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 15:52:58,185 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 15:52:58,186 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 15:52:58,727 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 15:52:58,727 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 15:52:58,727 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:52:58 BoogieIcfgContainer [2018-11-23 15:52:58,728 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 15:52:58,728 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 15:52:58,729 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 15:52:58,731 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 15:52:58,732 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:52:57" (1/3) ... [2018-11-23 15:52:58,732 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ef815a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:52:58, skipping insertion in model container [2018-11-23 15:52:58,732 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:52:58" (2/3) ... [2018-11-23 15:52:58,732 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ef815a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:52:58, skipping insertion in model container [2018-11-23 15:52:58,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:52:58" (3/3) ... [2018-11-23 15:52:58,734 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi000_power.opt_false-unreach-call.i [2018-11-23 15:52:58,767 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,767 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,767 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,767 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,768 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,768 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,768 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,768 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,768 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,769 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,770 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,771 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,771 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,771 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,771 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,771 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,772 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,773 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,773 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,773 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,773 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,774 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,774 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,774 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,774 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,774 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,775 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,776 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,777 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,778 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,779 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 15:52:58,786 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 15:52:58,787 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 15:52:58,795 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 15:52:58,809 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 15:52:58,827 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 15:52:58,828 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 15:52:58,828 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 15:52:58,828 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 15:52:58,828 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 15:52:58,829 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 15:52:58,829 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 15:52:58,829 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 15:52:58,829 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 15:52:58,837 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 142places, 180 transitions [2018-11-23 15:53:00,224 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 25088 states. [2018-11-23 15:53:00,226 INFO L276 IsEmpty]: Start isEmpty. Operand 25088 states. [2018-11-23 15:53:00,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-23 15:53:00,237 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:00,237 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:00,240 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:00,246 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:00,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1172530028, now seen corresponding path program 1 times [2018-11-23 15:53:00,249 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:00,250 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:00,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:00,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:00,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:00,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:00,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:00,466 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:00,466 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:00,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:00,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:00,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:00,488 INFO L87 Difference]: Start difference. First operand 25088 states. Second operand 4 states. [2018-11-23 15:53:01,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:01,185 INFO L93 Difference]: Finished difference Result 45388 states and 177626 transitions. [2018-11-23 15:53:01,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 15:53:01,187 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-11-23 15:53:01,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:01,432 INFO L225 Difference]: With dead ends: 45388 [2018-11-23 15:53:01,433 INFO L226 Difference]: Without dead ends: 40628 [2018-11-23 15:53:01,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:01,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40628 states. [2018-11-23 15:53:02,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40628 to 23662. [2018-11-23 15:53:02,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23662 states. [2018-11-23 15:53:02,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23662 states to 23662 states and 92543 transitions. [2018-11-23 15:53:02,695 INFO L78 Accepts]: Start accepts. Automaton has 23662 states and 92543 transitions. Word has length 37 [2018-11-23 15:53:02,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:02,696 INFO L480 AbstractCegarLoop]: Abstraction has 23662 states and 92543 transitions. [2018-11-23 15:53:02,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:02,696 INFO L276 IsEmpty]: Start isEmpty. Operand 23662 states and 92543 transitions. [2018-11-23 15:53:02,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 15:53:02,700 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:02,700 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:02,701 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:02,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:02,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1746574175, now seen corresponding path program 1 times [2018-11-23 15:53:02,701 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:02,701 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:02,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:02,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:02,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:02,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:02,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:02,796 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:02,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:02,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:02,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:02,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:02,798 INFO L87 Difference]: Start difference. First operand 23662 states and 92543 transitions. Second operand 5 states. [2018-11-23 15:53:03,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:03,753 INFO L93 Difference]: Finished difference Result 64830 states and 241369 transitions. [2018-11-23 15:53:03,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 15:53:03,754 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-11-23 15:53:03,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:03,929 INFO L225 Difference]: With dead ends: 64830 [2018-11-23 15:53:03,929 INFO L226 Difference]: Without dead ends: 64670 [2018-11-23 15:53:03,930 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:04,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64670 states. [2018-11-23 15:53:04,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64670 to 37142. [2018-11-23 15:53:04,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37142 states. [2018-11-23 15:53:04,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37142 states to 37142 states and 138284 transitions. [2018-11-23 15:53:04,951 INFO L78 Accepts]: Start accepts. Automaton has 37142 states and 138284 transitions. Word has length 44 [2018-11-23 15:53:04,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:04,952 INFO L480 AbstractCegarLoop]: Abstraction has 37142 states and 138284 transitions. [2018-11-23 15:53:04,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:04,952 INFO L276 IsEmpty]: Start isEmpty. Operand 37142 states and 138284 transitions. [2018-11-23 15:53:04,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-23 15:53:04,955 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:04,956 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:04,956 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:04,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:04,957 INFO L82 PathProgramCache]: Analyzing trace with hash -1206649085, now seen corresponding path program 1 times [2018-11-23 15:53:04,957 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:04,957 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:04,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:04,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:04,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:04,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:05,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:05,024 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:05,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:05,025 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:05,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:05,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:05,025 INFO L87 Difference]: Start difference. First operand 37142 states and 138284 transitions. Second operand 4 states. [2018-11-23 15:53:05,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:05,078 INFO L93 Difference]: Finished difference Result 12364 states and 41177 transitions. [2018-11-23 15:53:05,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:53:05,079 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 45 [2018-11-23 15:53:05,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:05,095 INFO L225 Difference]: With dead ends: 12364 [2018-11-23 15:53:05,096 INFO L226 Difference]: Without dead ends: 11843 [2018-11-23 15:53:05,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:05,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11843 states. [2018-11-23 15:53:05,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11843 to 11843. [2018-11-23 15:53:05,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11843 states. [2018-11-23 15:53:05,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11843 states to 11843 states and 39622 transitions. [2018-11-23 15:53:05,241 INFO L78 Accepts]: Start accepts. Automaton has 11843 states and 39622 transitions. Word has length 45 [2018-11-23 15:53:05,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:05,241 INFO L480 AbstractCegarLoop]: Abstraction has 11843 states and 39622 transitions. [2018-11-23 15:53:05,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:05,241 INFO L276 IsEmpty]: Start isEmpty. Operand 11843 states and 39622 transitions. [2018-11-23 15:53:05,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-23 15:53:05,244 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:05,245 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:05,245 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:05,245 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:05,245 INFO L82 PathProgramCache]: Analyzing trace with hash -372868821, now seen corresponding path program 1 times [2018-11-23 15:53:05,245 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:05,245 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:05,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:05,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:05,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:05,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:05,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:05,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:05,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:05,504 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:05,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:05,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:05,505 INFO L87 Difference]: Start difference. First operand 11843 states and 39622 transitions. Second operand 4 states. [2018-11-23 15:53:05,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:05,754 INFO L93 Difference]: Finished difference Result 17019 states and 55693 transitions. [2018-11-23 15:53:05,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:53:05,754 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-23 15:53:05,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:05,783 INFO L225 Difference]: With dead ends: 17019 [2018-11-23 15:53:05,783 INFO L226 Difference]: Without dead ends: 17019 [2018-11-23 15:53:05,783 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:05,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17019 states. [2018-11-23 15:53:05,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17019 to 12879. [2018-11-23 15:53:05,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12879 states. [2018-11-23 15:53:05,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12879 states to 12879 states and 42720 transitions. [2018-11-23 15:53:05,970 INFO L78 Accepts]: Start accepts. Automaton has 12879 states and 42720 transitions. Word has length 58 [2018-11-23 15:53:05,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:05,970 INFO L480 AbstractCegarLoop]: Abstraction has 12879 states and 42720 transitions. [2018-11-23 15:53:05,970 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:05,971 INFO L276 IsEmpty]: Start isEmpty. Operand 12879 states and 42720 transitions. [2018-11-23 15:53:05,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-23 15:53:05,974 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:05,975 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:05,975 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:05,975 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:05,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1400961321, now seen corresponding path program 1 times [2018-11-23 15:53:05,975 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:05,975 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:05,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:05,977 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:05,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:05,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:06,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:06,048 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:06,048 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:53:06,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:53:06,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:53:06,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:06,049 INFO L87 Difference]: Start difference. First operand 12879 states and 42720 transitions. Second operand 6 states. [2018-11-23 15:53:06,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:06,440 INFO L93 Difference]: Finished difference Result 18599 states and 60830 transitions. [2018-11-23 15:53:06,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 15:53:06,440 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2018-11-23 15:53:06,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:06,462 INFO L225 Difference]: With dead ends: 18599 [2018-11-23 15:53:06,463 INFO L226 Difference]: Without dead ends: 18567 [2018-11-23 15:53:06,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-23 15:53:06,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18567 states. [2018-11-23 15:53:06,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18567 to 14411. [2018-11-23 15:53:06,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14411 states. [2018-11-23 15:53:06,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14411 states to 14411 states and 47549 transitions. [2018-11-23 15:53:06,690 INFO L78 Accepts]: Start accepts. Automaton has 14411 states and 47549 transitions. Word has length 58 [2018-11-23 15:53:06,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:06,691 INFO L480 AbstractCegarLoop]: Abstraction has 14411 states and 47549 transitions. [2018-11-23 15:53:06,691 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:53:06,691 INFO L276 IsEmpty]: Start isEmpty. Operand 14411 states and 47549 transitions. [2018-11-23 15:53:06,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 15:53:06,702 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:06,703 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:06,703 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:06,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:06,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1996508936, now seen corresponding path program 1 times [2018-11-23 15:53:06,703 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:06,703 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:06,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:06,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:06,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:06,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:06,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:06,793 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:06,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:06,794 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:06,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:06,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:06,794 INFO L87 Difference]: Start difference. First operand 14411 states and 47549 transitions. Second operand 4 states. [2018-11-23 15:53:07,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:07,080 INFO L93 Difference]: Finished difference Result 23159 states and 75002 transitions. [2018-11-23 15:53:07,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:53:07,081 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2018-11-23 15:53:07,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:07,111 INFO L225 Difference]: With dead ends: 23159 [2018-11-23 15:53:07,111 INFO L226 Difference]: Without dead ends: 22983 [2018-11-23 15:53:07,112 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:07,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22983 states. [2018-11-23 15:53:07,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22983 to 19511. [2018-11-23 15:53:07,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19511 states. [2018-11-23 15:53:07,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19511 states to 19511 states and 63974 transitions. [2018-11-23 15:53:07,567 INFO L78 Accepts]: Start accepts. Automaton has 19511 states and 63974 transitions. Word has length 72 [2018-11-23 15:53:07,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:07,567 INFO L480 AbstractCegarLoop]: Abstraction has 19511 states and 63974 transitions. [2018-11-23 15:53:07,567 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:07,568 INFO L276 IsEmpty]: Start isEmpty. Operand 19511 states and 63974 transitions. [2018-11-23 15:53:07,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 15:53:07,583 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:07,583 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:07,583 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:07,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:07,583 INFO L82 PathProgramCache]: Analyzing trace with hash -945148663, now seen corresponding path program 1 times [2018-11-23 15:53:07,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:07,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:07,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:07,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:07,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:07,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:07,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:07,644 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:07,644 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:07,645 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:07,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:07,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:07,646 INFO L87 Difference]: Start difference. First operand 19511 states and 63974 transitions. Second operand 4 states. [2018-11-23 15:53:08,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:08,149 INFO L93 Difference]: Finished difference Result 27542 states and 88892 transitions. [2018-11-23 15:53:08,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:53:08,150 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2018-11-23 15:53:08,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:08,192 INFO L225 Difference]: With dead ends: 27542 [2018-11-23 15:53:08,193 INFO L226 Difference]: Without dead ends: 27542 [2018-11-23 15:53:08,193 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:08,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27542 states. [2018-11-23 15:53:08,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27542 to 24767. [2018-11-23 15:53:08,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24767 states. [2018-11-23 15:53:08,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24767 states to 24767 states and 80580 transitions. [2018-11-23 15:53:08,576 INFO L78 Accepts]: Start accepts. Automaton has 24767 states and 80580 transitions. Word has length 72 [2018-11-23 15:53:08,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:08,576 INFO L480 AbstractCegarLoop]: Abstraction has 24767 states and 80580 transitions. [2018-11-23 15:53:08,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:08,577 INFO L276 IsEmpty]: Start isEmpty. Operand 24767 states and 80580 transitions. [2018-11-23 15:53:08,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 15:53:08,597 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:08,597 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:08,597 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:08,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:08,598 INFO L82 PathProgramCache]: Analyzing trace with hash -594348726, now seen corresponding path program 1 times [2018-11-23 15:53:08,598 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:08,598 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:08,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:08,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:08,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:08,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:08,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:08,732 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:08,732 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:53:08,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:53:08,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:53:08,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:08,733 INFO L87 Difference]: Start difference. First operand 24767 states and 80580 transitions. Second operand 8 states. [2018-11-23 15:53:09,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:09,706 INFO L93 Difference]: Finished difference Result 37721 states and 118603 transitions. [2018-11-23 15:53:09,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 15:53:09,706 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-11-23 15:53:09,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:09,762 INFO L225 Difference]: With dead ends: 37721 [2018-11-23 15:53:09,762 INFO L226 Difference]: Without dead ends: 37473 [2018-11-23 15:53:09,763 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-23 15:53:09,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37473 states. [2018-11-23 15:53:10,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37473 to 27364. [2018-11-23 15:53:10,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27364 states. [2018-11-23 15:53:10,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27364 states to 27364 states and 88368 transitions. [2018-11-23 15:53:10,319 INFO L78 Accepts]: Start accepts. Automaton has 27364 states and 88368 transitions. Word has length 72 [2018-11-23 15:53:10,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:10,320 INFO L480 AbstractCegarLoop]: Abstraction has 27364 states and 88368 transitions. [2018-11-23 15:53:10,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:53:10,320 INFO L276 IsEmpty]: Start isEmpty. Operand 27364 states and 88368 transitions. [2018-11-23 15:53:10,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 15:53:10,342 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:10,342 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:10,342 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:10,342 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:10,342 INFO L82 PathProgramCache]: Analyzing trace with hash -887751733, now seen corresponding path program 1 times [2018-11-23 15:53:10,343 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:10,343 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:10,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:10,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:10,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:10,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:10,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:10,468 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:10,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:53:10,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:53:10,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:53:10,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:10,469 INFO L87 Difference]: Start difference. First operand 27364 states and 88368 transitions. Second operand 6 states. [2018-11-23 15:53:10,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:10,852 INFO L93 Difference]: Finished difference Result 29954 states and 95614 transitions. [2018-11-23 15:53:10,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 15:53:10,852 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-23 15:53:10,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:10,899 INFO L225 Difference]: With dead ends: 29954 [2018-11-23 15:53:10,899 INFO L226 Difference]: Without dead ends: 29954 [2018-11-23 15:53:10,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:10,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29954 states. [2018-11-23 15:53:11,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29954 to 28147. [2018-11-23 15:53:11,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28147 states. [2018-11-23 15:53:11,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28147 states to 28147 states and 90561 transitions. [2018-11-23 15:53:11,313 INFO L78 Accepts]: Start accepts. Automaton has 28147 states and 90561 transitions. Word has length 72 [2018-11-23 15:53:11,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:11,314 INFO L480 AbstractCegarLoop]: Abstraction has 28147 states and 90561 transitions. [2018-11-23 15:53:11,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:53:11,314 INFO L276 IsEmpty]: Start isEmpty. Operand 28147 states and 90561 transitions. [2018-11-23 15:53:11,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 15:53:11,336 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:11,336 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:11,337 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:11,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:11,337 INFO L82 PathProgramCache]: Analyzing trace with hash 73862284, now seen corresponding path program 1 times [2018-11-23 15:53:11,337 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:11,337 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:11,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:11,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:11,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:11,400 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:11,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:11,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:11,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:11,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:11,401 INFO L87 Difference]: Start difference. First operand 28147 states and 90561 transitions. Second operand 5 states. [2018-11-23 15:53:11,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:11,430 INFO L93 Difference]: Finished difference Result 4691 states and 12177 transitions. [2018-11-23 15:53:11,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 15:53:11,431 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-23 15:53:11,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:11,434 INFO L225 Difference]: With dead ends: 4691 [2018-11-23 15:53:11,435 INFO L226 Difference]: Without dead ends: 3893 [2018-11-23 15:53:11,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:11,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3893 states. [2018-11-23 15:53:11,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3893 to 3596. [2018-11-23 15:53:11,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3596 states. [2018-11-23 15:53:11,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3596 states to 3596 states and 9379 transitions. [2018-11-23 15:53:11,470 INFO L78 Accepts]: Start accepts. Automaton has 3596 states and 9379 transitions. Word has length 72 [2018-11-23 15:53:11,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:11,471 INFO L480 AbstractCegarLoop]: Abstraction has 3596 states and 9379 transitions. [2018-11-23 15:53:11,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:11,471 INFO L276 IsEmpty]: Start isEmpty. Operand 3596 states and 9379 transitions. [2018-11-23 15:53:11,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-23 15:53:11,474 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:11,475 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:11,475 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:11,475 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:11,475 INFO L82 PathProgramCache]: Analyzing trace with hash -1359573718, now seen corresponding path program 1 times [2018-11-23 15:53:11,475 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:11,475 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:11,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,477 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:11,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:11,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:11,542 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:11,542 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:11,543 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:11,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:11,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:11,543 INFO L87 Difference]: Start difference. First operand 3596 states and 9379 transitions. Second operand 5 states. [2018-11-23 15:53:11,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:11,670 INFO L93 Difference]: Finished difference Result 3926 states and 10118 transitions. [2018-11-23 15:53:11,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 15:53:11,671 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 91 [2018-11-23 15:53:11,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:11,674 INFO L225 Difference]: With dead ends: 3926 [2018-11-23 15:53:11,674 INFO L226 Difference]: Without dead ends: 3926 [2018-11-23 15:53:11,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:11,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3926 states. [2018-11-23 15:53:11,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3926 to 3634. [2018-11-23 15:53:11,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3634 states. [2018-11-23 15:53:11,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3634 states to 3634 states and 9483 transitions. [2018-11-23 15:53:11,711 INFO L78 Accepts]: Start accepts. Automaton has 3634 states and 9483 transitions. Word has length 91 [2018-11-23 15:53:11,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:11,711 INFO L480 AbstractCegarLoop]: Abstraction has 3634 states and 9483 transitions. [2018-11-23 15:53:11,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:11,711 INFO L276 IsEmpty]: Start isEmpty. Operand 3634 states and 9483 transitions. [2018-11-23 15:53:11,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-23 15:53:11,715 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:11,715 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:11,715 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:11,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:11,715 INFO L82 PathProgramCache]: Analyzing trace with hash 1302589579, now seen corresponding path program 1 times [2018-11-23 15:53:11,715 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:11,715 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:11,717 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:11,717 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:11,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:11,774 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:11,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:11,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:11,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:11,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:11,775 INFO L87 Difference]: Start difference. First operand 3634 states and 9483 transitions. Second operand 4 states. [2018-11-23 15:53:11,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:11,877 INFO L93 Difference]: Finished difference Result 4252 states and 10932 transitions. [2018-11-23 15:53:11,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 15:53:11,878 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-23 15:53:11,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:11,882 INFO L225 Difference]: With dead ends: 4252 [2018-11-23 15:53:11,882 INFO L226 Difference]: Without dead ends: 4224 [2018-11-23 15:53:11,882 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:11,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4224 states. [2018-11-23 15:53:11,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4224 to 4156. [2018-11-23 15:53:11,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4156 states. [2018-11-23 15:53:11,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4156 states to 4156 states and 10728 transitions. [2018-11-23 15:53:11,922 INFO L78 Accepts]: Start accepts. Automaton has 4156 states and 10728 transitions. Word has length 91 [2018-11-23 15:53:11,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:11,923 INFO L480 AbstractCegarLoop]: Abstraction has 4156 states and 10728 transitions. [2018-11-23 15:53:11,923 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:11,923 INFO L276 IsEmpty]: Start isEmpty. Operand 4156 states and 10728 transitions. [2018-11-23 15:53:11,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-23 15:53:11,927 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:11,927 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:11,927 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:11,928 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:11,928 INFO L82 PathProgramCache]: Analyzing trace with hash -2022796694, now seen corresponding path program 1 times [2018-11-23 15:53:11,928 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:11,928 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:11,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:11,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:11,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:11,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:11,974 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:11,974 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 15:53:11,974 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 15:53:11,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 15:53:11,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:11,975 INFO L87 Difference]: Start difference. First operand 4156 states and 10728 transitions. Second operand 4 states. [2018-11-23 15:53:12,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:12,148 INFO L93 Difference]: Finished difference Result 5141 states and 13366 transitions. [2018-11-23 15:53:12,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 15:53:12,149 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-23 15:53:12,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:12,154 INFO L225 Difference]: With dead ends: 5141 [2018-11-23 15:53:12,154 INFO L226 Difference]: Without dead ends: 5141 [2018-11-23 15:53:12,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 15:53:12,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5141 states. [2018-11-23 15:53:12,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5141 to 4021. [2018-11-23 15:53:12,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4021 states. [2018-11-23 15:53:12,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4021 states to 4021 states and 10331 transitions. [2018-11-23 15:53:12,214 INFO L78 Accepts]: Start accepts. Automaton has 4021 states and 10331 transitions. Word has length 91 [2018-11-23 15:53:12,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:12,214 INFO L480 AbstractCegarLoop]: Abstraction has 4021 states and 10331 transitions. [2018-11-23 15:53:12,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 15:53:12,214 INFO L276 IsEmpty]: Start isEmpty. Operand 4021 states and 10331 transitions. [2018-11-23 15:53:12,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-23 15:53:12,219 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:12,220 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:12,220 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:12,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:12,220 INFO L82 PathProgramCache]: Analyzing trace with hash 1536327676, now seen corresponding path program 2 times [2018-11-23 15:53:12,220 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:12,221 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:12,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:12,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:12,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:12,294 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:12,294 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:12,295 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:12,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:12,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:12,295 INFO L87 Difference]: Start difference. First operand 4021 states and 10331 transitions. Second operand 5 states. [2018-11-23 15:53:12,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:12,464 INFO L93 Difference]: Finished difference Result 4493 states and 11451 transitions. [2018-11-23 15:53:12,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 15:53:12,465 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 91 [2018-11-23 15:53:12,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:12,469 INFO L225 Difference]: With dead ends: 4493 [2018-11-23 15:53:12,470 INFO L226 Difference]: Without dead ends: 4465 [2018-11-23 15:53:12,470 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:12,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4465 states. [2018-11-23 15:53:12,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4465 to 3983. [2018-11-23 15:53:12,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3983 states. [2018-11-23 15:53:12,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3983 states to 3983 states and 10225 transitions. [2018-11-23 15:53:12,524 INFO L78 Accepts]: Start accepts. Automaton has 3983 states and 10225 transitions. Word has length 91 [2018-11-23 15:53:12,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:12,524 INFO L480 AbstractCegarLoop]: Abstraction has 3983 states and 10225 transitions. [2018-11-23 15:53:12,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:12,524 INFO L276 IsEmpty]: Start isEmpty. Operand 3983 states and 10225 transitions. [2018-11-23 15:53:12,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 15:53:12,529 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:12,529 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:12,530 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:12,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:12,530 INFO L82 PathProgramCache]: Analyzing trace with hash 47520550, now seen corresponding path program 1 times [2018-11-23 15:53:12,530 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:12,530 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:12,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,532 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 15:53:12,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:12,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:12,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:12,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:53:12,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:53:12,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:53:12,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:12,619 INFO L87 Difference]: Start difference. First operand 3983 states and 10225 transitions. Second operand 6 states. [2018-11-23 15:53:12,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:12,862 INFO L93 Difference]: Finished difference Result 4367 states and 10977 transitions. [2018-11-23 15:53:12,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 15:53:12,862 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-23 15:53:12,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:12,865 INFO L225 Difference]: With dead ends: 4367 [2018-11-23 15:53:12,866 INFO L226 Difference]: Without dead ends: 4242 [2018-11-23 15:53:12,866 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:12,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4242 states. [2018-11-23 15:53:12,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4242 to 4149. [2018-11-23 15:53:12,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4149 states. [2018-11-23 15:53:12,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4149 states to 4149 states and 10564 transitions. [2018-11-23 15:53:12,904 INFO L78 Accepts]: Start accepts. Automaton has 4149 states and 10564 transitions. Word has length 93 [2018-11-23 15:53:12,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:12,904 INFO L480 AbstractCegarLoop]: Abstraction has 4149 states and 10564 transitions. [2018-11-23 15:53:12,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:53:12,904 INFO L276 IsEmpty]: Start isEmpty. Operand 4149 states and 10564 transitions. [2018-11-23 15:53:12,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 15:53:12,908 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:12,908 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:12,908 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:12,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:12,908 INFO L82 PathProgramCache]: Analyzing trace with hash 1748261029, now seen corresponding path program 1 times [2018-11-23 15:53:12,909 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:12,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:12,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:12,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:12,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:13,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:13,004 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:13,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 15:53:13,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 15:53:13,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 15:53:13,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:13,005 INFO L87 Difference]: Start difference. First operand 4149 states and 10564 transitions. Second operand 7 states. [2018-11-23 15:53:13,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:13,280 INFO L93 Difference]: Finished difference Result 4483 states and 11383 transitions. [2018-11-23 15:53:13,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 15:53:13,280 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-23 15:53:13,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:13,284 INFO L225 Difference]: With dead ends: 4483 [2018-11-23 15:53:13,284 INFO L226 Difference]: Without dead ends: 4483 [2018-11-23 15:53:13,284 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:13,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4483 states. [2018-11-23 15:53:13,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4483 to 4141. [2018-11-23 15:53:13,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4141 states. [2018-11-23 15:53:13,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4141 states to 4141 states and 10552 transitions. [2018-11-23 15:53:13,323 INFO L78 Accepts]: Start accepts. Automaton has 4141 states and 10552 transitions. Word has length 93 [2018-11-23 15:53:13,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:13,324 INFO L480 AbstractCegarLoop]: Abstraction has 4141 states and 10552 transitions. [2018-11-23 15:53:13,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 15:53:13,324 INFO L276 IsEmpty]: Start isEmpty. Operand 4141 states and 10552 transitions. [2018-11-23 15:53:13,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 15:53:13,328 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:13,328 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:13,328 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:13,328 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:13,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1135826747, now seen corresponding path program 1 times [2018-11-23 15:53:13,329 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:13,329 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:13,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,330 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:13,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:13,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:13,422 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:13,422 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:13,422 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:13,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:13,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:13,423 INFO L87 Difference]: Start difference. First operand 4141 states and 10552 transitions. Second operand 5 states. [2018-11-23 15:53:13,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:13,512 INFO L93 Difference]: Finished difference Result 3573 states and 9086 transitions. [2018-11-23 15:53:13,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 15:53:13,512 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-23 15:53:13,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:13,516 INFO L225 Difference]: With dead ends: 3573 [2018-11-23 15:53:13,516 INFO L226 Difference]: Without dead ends: 3573 [2018-11-23 15:53:13,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:13,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3573 states. [2018-11-23 15:53:13,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3573 to 3476. [2018-11-23 15:53:13,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3476 states. [2018-11-23 15:53:13,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3476 states to 3476 states and 8885 transitions. [2018-11-23 15:53:13,549 INFO L78 Accepts]: Start accepts. Automaton has 3476 states and 8885 transitions. Word has length 93 [2018-11-23 15:53:13,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:13,549 INFO L480 AbstractCegarLoop]: Abstraction has 3476 states and 8885 transitions. [2018-11-23 15:53:13,549 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:13,549 INFO L276 IsEmpty]: Start isEmpty. Operand 3476 states and 8885 transitions. [2018-11-23 15:53:13,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 15:53:13,553 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:13,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:13,553 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:13,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:13,553 INFO L82 PathProgramCache]: Analyzing trace with hash 1223480262, now seen corresponding path program 1 times [2018-11-23 15:53:13,553 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:13,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:13,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:13,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:13,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:13,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:13,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:53:13,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:53:13,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:53:13,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:13,640 INFO L87 Difference]: Start difference. First operand 3476 states and 8885 transitions. Second operand 6 states. [2018-11-23 15:53:13,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:13,750 INFO L93 Difference]: Finished difference Result 3236 states and 8109 transitions. [2018-11-23 15:53:13,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 15:53:13,750 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-23 15:53:13,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:13,753 INFO L225 Difference]: With dead ends: 3236 [2018-11-23 15:53:13,754 INFO L226 Difference]: Without dead ends: 3236 [2018-11-23 15:53:13,754 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:13,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3236 states. [2018-11-23 15:53:13,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3236 to 2830. [2018-11-23 15:53:13,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2830 states. [2018-11-23 15:53:13,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2830 states to 2830 states and 7147 transitions. [2018-11-23 15:53:13,781 INFO L78 Accepts]: Start accepts. Automaton has 2830 states and 7147 transitions. Word has length 93 [2018-11-23 15:53:13,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:13,781 INFO L480 AbstractCegarLoop]: Abstraction has 2830 states and 7147 transitions. [2018-11-23 15:53:13,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:53:13,782 INFO L276 IsEmpty]: Start isEmpty. Operand 2830 states and 7147 transitions. [2018-11-23 15:53:13,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:13,784 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:13,784 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:13,785 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:13,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:13,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1682422135, now seen corresponding path program 1 times [2018-11-23 15:53:13,785 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:13,785 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:13,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:13,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:13,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:13,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:13,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:13,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:53:13,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:53:13,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:53:13,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:13,856 INFO L87 Difference]: Start difference. First operand 2830 states and 7147 transitions. Second operand 8 states. [2018-11-23 15:53:14,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:14,230 INFO L93 Difference]: Finished difference Result 4468 states and 11024 transitions. [2018-11-23 15:53:14,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 15:53:14,231 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-11-23 15:53:14,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:14,235 INFO L225 Difference]: With dead ends: 4468 [2018-11-23 15:53:14,235 INFO L226 Difference]: Without dead ends: 4468 [2018-11-23 15:53:14,235 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-11-23 15:53:14,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4468 states. [2018-11-23 15:53:14,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4468 to 3196. [2018-11-23 15:53:14,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3196 states. [2018-11-23 15:53:14,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3196 states to 3196 states and 8035 transitions. [2018-11-23 15:53:14,270 INFO L78 Accepts]: Start accepts. Automaton has 3196 states and 8035 transitions. Word has length 95 [2018-11-23 15:53:14,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:14,271 INFO L480 AbstractCegarLoop]: Abstraction has 3196 states and 8035 transitions. [2018-11-23 15:53:14,271 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:53:14,271 INFO L276 IsEmpty]: Start isEmpty. Operand 3196 states and 8035 transitions. [2018-11-23 15:53:14,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:14,274 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:14,274 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:14,274 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:14,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:14,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1367780680, now seen corresponding path program 1 times [2018-11-23 15:53:14,275 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:14,275 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:14,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:14,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:14,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:14,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:14,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:14,359 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:14,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:53:14,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:53:14,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:53:14,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:14,360 INFO L87 Difference]: Start difference. First operand 3196 states and 8035 transitions. Second operand 8 states. [2018-11-23 15:53:14,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:14,864 INFO L93 Difference]: Finished difference Result 4336 states and 10694 transitions. [2018-11-23 15:53:14,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 15:53:14,864 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-11-23 15:53:14,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:14,868 INFO L225 Difference]: With dead ends: 4336 [2018-11-23 15:53:14,868 INFO L226 Difference]: Without dead ends: 4282 [2018-11-23 15:53:14,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=359, Unknown=0, NotChecked=0, Total=462 [2018-11-23 15:53:14,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4282 states. [2018-11-23 15:53:14,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4282 to 3124. [2018-11-23 15:53:14,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3124 states. [2018-11-23 15:53:14,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3124 states to 3124 states and 7862 transitions. [2018-11-23 15:53:14,903 INFO L78 Accepts]: Start accepts. Automaton has 3124 states and 7862 transitions. Word has length 95 [2018-11-23 15:53:14,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:14,904 INFO L480 AbstractCegarLoop]: Abstraction has 3124 states and 7862 transitions. [2018-11-23 15:53:14,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:53:14,904 INFO L276 IsEmpty]: Start isEmpty. Operand 3124 states and 7862 transitions. [2018-11-23 15:53:14,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:14,907 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:14,907 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:14,908 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:14,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:14,908 INFO L82 PathProgramCache]: Analyzing trace with hash 991526329, now seen corresponding path program 1 times [2018-11-23 15:53:14,908 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:14,908 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:14,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:14,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:14,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:14,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:14,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:14,974 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:14,974 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 15:53:14,975 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 15:53:14,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 15:53:14,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:14,975 INFO L87 Difference]: Start difference. First operand 3124 states and 7862 transitions. Second operand 7 states. [2018-11-23 15:53:15,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:15,233 INFO L93 Difference]: Finished difference Result 3826 states and 9491 transitions. [2018-11-23 15:53:15,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 15:53:15,233 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-11-23 15:53:15,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:15,237 INFO L225 Difference]: With dead ends: 3826 [2018-11-23 15:53:15,237 INFO L226 Difference]: Without dead ends: 3826 [2018-11-23 15:53:15,237 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-23 15:53:15,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3826 states. [2018-11-23 15:53:15,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3826 to 3224. [2018-11-23 15:53:15,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3224 states. [2018-11-23 15:53:15,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3224 states to 3224 states and 8052 transitions. [2018-11-23 15:53:15,268 INFO L78 Accepts]: Start accepts. Automaton has 3224 states and 8052 transitions. Word has length 95 [2018-11-23 15:53:15,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:15,269 INFO L480 AbstractCegarLoop]: Abstraction has 3224 states and 8052 transitions. [2018-11-23 15:53:15,269 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 15:53:15,269 INFO L276 IsEmpty]: Start isEmpty. Operand 3224 states and 8052 transitions. [2018-11-23 15:53:15,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:15,272 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:15,272 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:15,272 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:15,273 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:15,274 INFO L82 PathProgramCache]: Analyzing trace with hash 76527609, now seen corresponding path program 1 times [2018-11-23 15:53:15,274 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:15,274 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:15,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:15,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:15,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:15,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:15,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:15,322 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:15,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 15:53:15,322 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 15:53:15,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 15:53:15,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 15:53:15,323 INFO L87 Difference]: Start difference. First operand 3224 states and 8052 transitions. Second operand 5 states. [2018-11-23 15:53:15,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:15,477 INFO L93 Difference]: Finished difference Result 3576 states and 8916 transitions. [2018-11-23 15:53:15,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 15:53:15,477 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 15:53:15,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:15,480 INFO L225 Difference]: With dead ends: 3576 [2018-11-23 15:53:15,480 INFO L226 Difference]: Without dead ends: 3544 [2018-11-23 15:53:15,481 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:15,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3544 states. [2018-11-23 15:53:15,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3544 to 2675. [2018-11-23 15:53:15,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2675 states. [2018-11-23 15:53:15,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2675 states to 2675 states and 6699 transitions. [2018-11-23 15:53:15,508 INFO L78 Accepts]: Start accepts. Automaton has 2675 states and 6699 transitions. Word has length 95 [2018-11-23 15:53:15,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:15,509 INFO L480 AbstractCegarLoop]: Abstraction has 2675 states and 6699 transitions. [2018-11-23 15:53:15,509 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 15:53:15,509 INFO L276 IsEmpty]: Start isEmpty. Operand 2675 states and 6699 transitions. [2018-11-23 15:53:15,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:15,511 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:15,511 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:15,511 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:15,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:15,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1321292090, now seen corresponding path program 1 times [2018-11-23 15:53:15,512 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:15,512 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:15,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:15,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:15,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:15,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:15,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:15,599 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:15,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 15:53:15,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 15:53:15,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 15:53:15,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-23 15:53:15,601 INFO L87 Difference]: Start difference. First operand 2675 states and 6699 transitions. Second operand 8 states. [2018-11-23 15:53:16,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:16,048 INFO L93 Difference]: Finished difference Result 4878 states and 12647 transitions. [2018-11-23 15:53:16,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 15:53:16,049 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-11-23 15:53:16,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:16,056 INFO L225 Difference]: With dead ends: 4878 [2018-11-23 15:53:16,057 INFO L226 Difference]: Without dead ends: 4878 [2018-11-23 15:53:16,058 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2018-11-23 15:53:16,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4878 states. [2018-11-23 15:53:16,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4878 to 2605. [2018-11-23 15:53:16,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2605 states. [2018-11-23 15:53:16,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2605 states to 2605 states and 6559 transitions. [2018-11-23 15:53:16,107 INFO L78 Accepts]: Start accepts. Automaton has 2605 states and 6559 transitions. Word has length 95 [2018-11-23 15:53:16,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:16,107 INFO L480 AbstractCegarLoop]: Abstraction has 2605 states and 6559 transitions. [2018-11-23 15:53:16,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 15:53:16,107 INFO L276 IsEmpty]: Start isEmpty. Operand 2605 states and 6559 transitions. [2018-11-23 15:53:16,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:16,110 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:16,111 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:16,111 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:16,111 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:16,111 INFO L82 PathProgramCache]: Analyzing trace with hash -1332501510, now seen corresponding path program 1 times [2018-11-23 15:53:16,111 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:16,111 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:16,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:16,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:16,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:16,211 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:16,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 15:53:16,212 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 15:53:16,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 15:53:16,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 15:53:16,212 INFO L87 Difference]: Start difference. First operand 2605 states and 6559 transitions. Second operand 6 states. [2018-11-23 15:53:16,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:16,428 INFO L93 Difference]: Finished difference Result 2784 states and 6902 transitions. [2018-11-23 15:53:16,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 15:53:16,429 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 15:53:16,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:16,432 INFO L225 Difference]: With dead ends: 2784 [2018-11-23 15:53:16,432 INFO L226 Difference]: Without dead ends: 2784 [2018-11-23 15:53:16,432 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 15:53:16,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2784 states. [2018-11-23 15:53:16,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2784 to 2638. [2018-11-23 15:53:16,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2638 states. [2018-11-23 15:53:16,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2638 states to 2638 states and 6619 transitions. [2018-11-23 15:53:16,467 INFO L78 Accepts]: Start accepts. Automaton has 2638 states and 6619 transitions. Word has length 95 [2018-11-23 15:53:16,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:16,467 INFO L480 AbstractCegarLoop]: Abstraction has 2638 states and 6619 transitions. [2018-11-23 15:53:16,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 15:53:16,468 INFO L276 IsEmpty]: Start isEmpty. Operand 2638 states and 6619 transitions. [2018-11-23 15:53:16,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:16,471 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:16,471 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:16,472 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:16,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:16,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1002735749, now seen corresponding path program 1 times [2018-11-23 15:53:16,472 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:16,472 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:16,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:16,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 15:53:16,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 15:53:16,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 15:53:16,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 15:53:16,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 15:53:16,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 15:53:16,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-23 15:53:16,602 INFO L87 Difference]: Start difference. First operand 2638 states and 6619 transitions. Second operand 7 states. [2018-11-23 15:53:16,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 15:53:16,785 INFO L93 Difference]: Finished difference Result 4467 states and 11389 transitions. [2018-11-23 15:53:16,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 15:53:16,786 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-11-23 15:53:16,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 15:53:16,788 INFO L225 Difference]: With dead ends: 4467 [2018-11-23 15:53:16,788 INFO L226 Difference]: Without dead ends: 1858 [2018-11-23 15:53:16,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-23 15:53:16,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states. [2018-11-23 15:53:16,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1858. [2018-11-23 15:53:16,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1858 states. [2018-11-23 15:53:16,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1858 states to 1858 states and 4812 transitions. [2018-11-23 15:53:16,803 INFO L78 Accepts]: Start accepts. Automaton has 1858 states and 4812 transitions. Word has length 95 [2018-11-23 15:53:16,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 15:53:16,803 INFO L480 AbstractCegarLoop]: Abstraction has 1858 states and 4812 transitions. [2018-11-23 15:53:16,803 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 15:53:16,804 INFO L276 IsEmpty]: Start isEmpty. Operand 1858 states and 4812 transitions. [2018-11-23 15:53:16,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 15:53:16,805 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 15:53:16,805 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 15:53:16,805 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 15:53:16,806 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 15:53:16,806 INFO L82 PathProgramCache]: Analyzing trace with hash -1809124577, now seen corresponding path program 2 times [2018-11-23 15:53:16,806 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 15:53:16,806 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 15:53:16,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,807 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 15:53:16,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 15:53:16,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:53:16,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 15:53:16,872 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [467] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [358] L-1-->L671: Formula: (= |v_#valid_5| (store |v_#valid_6| 0 0)) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [515] L671-->L673: Formula: (= v_~__unbuffered_cnt~0_5 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [385] L673-->L675: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [431] L675-->L676: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [350] L676-->L677: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [480] L677-->L679: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [524] L679-->L680: Formula: (= v_~x~0_9 0) InVars {} OutVars{~x~0=v_~x~0_9} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [458] L680-->L681: Formula: (= v_~x$flush_delayed~0_4 0) InVars {} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_4} AuxVars[] AssignedVars[~x$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 [392] L681-->L682: Formula: (= v_~x$mem_tmp~0_2 0) InVars {} OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_2} AuxVars[] AssignedVars[~x$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 [514] L682-->L683: Formula: (= v_~x$r_buff0_thd0~0_16 0) InVars {} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_16} AuxVars[] AssignedVars[~x$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 [451] L683-->L684: Formula: (= v_~x$r_buff0_thd1~0_13 0) InVars {} OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_13} AuxVars[] AssignedVars[~x$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 [384] L684-->L685: Formula: (= v_~x$r_buff0_thd2~0_14 0) InVars {} OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~x$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 [490] L685-->L686: Formula: (= v_~x$r_buff1_thd0~0_10 0) InVars {} OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_10} AuxVars[] AssignedVars[~x$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 [430] L686-->L687: Formula: (= v_~x$r_buff1_thd1~0_9 0) InVars {} OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_9} AuxVars[] AssignedVars[~x$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 [373] L687-->L688: Formula: (= v_~x$r_buff1_thd2~0_9 0) InVars {} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~x$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 [479] L688-->L689: Formula: (= v_~x$read_delayed~0_1 0) InVars {} OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1} AuxVars[] AssignedVars[~x$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 [424] L689-->L690: Formula: (and (= v_~x$read_delayed_var~0.offset_1 0) (= v_~x$read_delayed_var~0.base_1 0)) InVars {} OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 [523] L690-->L691: Formula: (= v_~x$w_buff0~0_5 0) InVars {} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_5} AuxVars[] AssignedVars[~x$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 [457] L691-->L692: Formula: (= v_~x$w_buff0_used~0_38 0) InVars {} OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_38} AuxVars[] AssignedVars[~x$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 [391] L692-->L693: Formula: (= v_~x$w_buff1~0_4 0) InVars {} OutVars{~x$w_buff1~0=v_~x$w_buff1~0_4} AuxVars[] AssignedVars[~x$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 [512] L693-->L695: Formula: (= v_~x$w_buff1_used~0_24 0) InVars {} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_24} AuxVars[] AssignedVars[~x$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 [383] L695-->L696: Formula: (= v_~y~0_4 0) InVars {} OutVars{~y~0=v_~y~0_4} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [489] L696-->L697: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [428] L697-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [513] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [511] L-1-2-->L763: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_1|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_3|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_1|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_1|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_1|, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_1|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_2|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_3|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_1|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_3|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_1|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1590~0.offset, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet26.base, ULTIMATE.start_main_#t~nondet25.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~nondet26.offset, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1589~0.offset, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~nondet25.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1589~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1590~0.base, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_#t~nondet18] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [443] L763-->L763-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1589~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t1589~0.base_4| 0)) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1589~0.base_4| 4)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1589~0.base_4|) 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1589~0.base_4| 1))) InVars {#length=|v_#length_2|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_4|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_4|, #length=|v_#length_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1589~0.base, #valid, ULTIMATE.start_main_~#t1589~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [444] L763-1-->L764: Formula: (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1589~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1589~0.base_5|) |v_ULTIMATE.start_main_~#t1589~0.offset_5| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 [579] L764-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [364] L764-1-->L765: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [473] L765-->L765-1: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1590~0.base_4| 4)) (not (= |v_ULTIMATE.start_main_~#t1590~0.base_4| 0)) (= 0 |v_ULTIMATE.start_main_~#t1590~0.offset_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1590~0.base_4| 1)) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1590~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_4|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1590~0.offset, ULTIMATE.start_main_~#t1590~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [474] L765-1-->L766: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1590~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1590~0.base_5|) |v_ULTIMATE.start_main_~#t1590~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 [580] L766-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [552] P1ENTRY-->L4: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~x$w_buff0~0_2 2) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~x$w_buff1~0_3 v_~x$w_buff0~0_3) (= v_~x$w_buff1_used~0_15 v_~x$w_buff0_used~0_22) (= v_~x$w_buff0_used~0_21 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_21 256))) (not (= 0 (mod v_~x$w_buff1_used~0_15 256))))) 1 0))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_3, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_22} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_2, Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~x$w_buff1~0=v_~x$w_buff1~0_3, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_15, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_21} AuxVars[] AssignedVars[~x$w_buff0~0, Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, Thread1_P1_~arg.base, ~x$w_buff1~0, Thread1_P1___VERIFIER_assert_#in~expression, ~x$w_buff1_used~0, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [554] L4-->L4-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [557] L4-3-->L741: Formula: (and (= v_~x$r_buff1_thd2~0_8 v_~x$r_buff0_thd2~0_11) (= v_~__unbuffered_p1_EBX~0_1 v_~y~0_2) (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_2) (= v_~x$r_buff1_thd0~0_1 v_~x$r_buff0_thd0~0_1) (= v_~x$r_buff0_thd2~0_10 1) (= v_~x$r_buff1_thd1~0_8 v_~x$r_buff0_thd1~0_12) (= v_~y~0_2 1)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_1, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_12, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_11} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_1, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_12, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_8, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_8, ~y~0=v_~y~0_2, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_10, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 [530] P0ENTRY-->L707: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~y~0_1 2) (= v_~x~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread0_P0_~arg.offset, Thread0_P0_~arg.base, ~y~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [532] L707-->L707-2: Formula: (or (= 0 (mod v_~x$r_buff0_thd1~0_4 256)) (= 0 (mod v_~x$w_buff0_used~0_3 256))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_3} OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [535] L707-2-->L707-4: Formula: (and (or (= 0 (mod v_~x$w_buff1_used~0_4 256)) (= (mod v_~x$r_buff1_thd1~0_4 256) 0)) (= |v_Thread0_P0_#t~ite3_3| v_~x~0_2)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_4, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_4, ~x~0=v_~x~0_2} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_4, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_4, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_3|, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite3] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite3|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [538] L707-4-->L707-5: Formula: (= |v_Thread0_P0_#t~ite4_4| |v_Thread0_P0_#t~ite3_4|) InVars {Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_4|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_4|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_4|} AuxVars[] AssignedVars[Thread0_P0_#t~ite4] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite3|=1, |Thread0_P0_#t~ite4|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [533] L707-5-->L708: Formula: (= v_~x~0_3 |v_Thread0_P0_#t~ite4_2|) InVars {Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_2|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_3|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_1|, ~x~0=v_~x~0_3} AuxVars[] AssignedVars[Thread0_P0_#t~ite4, Thread0_P0_#t~ite3, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [537] L708-->L708-2: Formula: (and (= |v_Thread0_P0_#t~ite5_2| v_~x$w_buff0_used~0_7) (or (= 0 (mod v_~x$w_buff0_used~0_7 256)) (= (mod v_~x$r_buff0_thd1~0_8 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_7} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_2|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_7} AuxVars[] AssignedVars[Thread0_P0_#t~ite5] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [539] L708-2-->L709: Formula: (= v_~x$w_buff0_used~0_8 |v_Thread0_P0_#t~ite5_3|) InVars {Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_3|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_8} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [541] L709-->L709-2: Formula: (and (= |v_Thread0_P0_#t~ite6_2| v_~x$w_buff1_used~0_6) (or (= (mod v_~x$w_buff0_used~0_10 256) 0) (= (mod v_~x$r_buff0_thd1~0_10 256) 0)) (or (= 0 (mod v_~x$w_buff1_used~0_6 256)) (= (mod v_~x$r_buff1_thd1~0_7 256) 0))) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_6, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_10, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_10} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_6, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_10, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_7, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [542] L709-2-->L710: Formula: (= v_~x$w_buff1_used~0_7 |v_Thread0_P0_#t~ite6_3|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_7, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [544] L710-->L710-2: Formula: (and (= |v_Thread0_P0_#t~ite7_2| v_~x$r_buff0_thd1~0_1) (or (= (mod v_~x$w_buff0_used~0_1 256) 0) (= 0 (mod v_~x$r_buff0_thd1~0_1 256)))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_2|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1} AuxVars[] AssignedVars[Thread0_P0_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite7|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [545] L710-2-->L711: Formula: (= v_~x$r_buff0_thd1~0_3 |v_Thread0_P0_#t~ite7_3|) InVars {Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_3|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_4|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_3} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, Thread0_P0_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [547] L711-->L711-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_5 256) 0) (= 0 (mod v_~x$r_buff0_thd1~0_6 256))) (or (= (mod v_~x$r_buff1_thd1~0_3 256) 0) (= (mod v_~x$w_buff1_used~0_3 256) 0)) (= |v_Thread0_P0_#t~ite8_2| v_~x$r_buff1_thd1~0_3)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_3, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_6, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_3, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_5} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_3, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_6, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_3, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite8|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [548] L711-2-->L716: Formula: (and (= v_~x$r_buff1_thd1~0_5 |v_Thread0_P0_#t~ite8_3|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1))) InVars {Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_5, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_4|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, Thread0_P0_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 [558] L741-->L741-5: Formula: (and (not (= 0 (mod v_~x$r_buff0_thd2~0_12 256))) (= |v_Thread1_P1_#t~ite11_1| v_~x$w_buff0~0_4) (not (= 0 (mod v_~x$w_buff0_used~0_23 256)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_4, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_12, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_23} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_4, Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_12, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_23} AuxVars[] AssignedVars[Thread1_P1_#t~ite11] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite11|=2, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 [560] L741-5-->L742: Formula: (= v_~x~0_5 |v_Thread1_P1_#t~ite11_2|) InVars {Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_2|} OutVars{Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_3|, ~x~0=v_~x~0_5, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite10, Thread1_P1_#t~ite11, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [563] L742-->L742-2: Formula: (and (not (= (mod v_~x$w_buff0_used~0_12 256) 0)) (= |v_Thread1_P1_#t~ite12_1| 0) (not (= (mod v_~x$r_buff0_thd2~0_1 256) 0))) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_12} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite12|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [566] L742-2-->L743: Formula: (= v_~x$w_buff0_used~0_14 |v_Thread1_P1_#t~ite12_3|) InVars {Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_3|} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_14} AuxVars[] AssignedVars[Thread1_P1_#t~ite12, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [568] L743-->L743-2: Formula: (and (= |v_Thread1_P1_#t~ite13_2| v_~x$w_buff1_used~0_11) (or (= 0 (mod v_~x$w_buff1_used~0_11 256)) (= 0 (mod v_~x$r_buff1_thd2~0_4 256))) (or (= (mod v_~x$r_buff0_thd2~0_4 256) 0) (= (mod v_~x$w_buff0_used~0_16 256) 0))) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_11, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_4, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_16} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_11, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_4, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_16} AuxVars[] AssignedVars[Thread1_P1_#t~ite13] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [569] L743-2-->L744: Formula: (= v_~x$w_buff1_used~0_12 |v_Thread1_P1_#t~ite13_3|) InVars {Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_3|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_12, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, Thread1_P1_#t~ite13] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [571] L744-->L744-2: Formula: (and (or (= (mod v_~x$r_buff0_thd2~0_6 256) 0) (= 0 (mod v_~x$w_buff0_used~0_18 256))) (= |v_Thread1_P1_#t~ite14_2| v_~x$r_buff0_thd2~0_6)) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_18} OutVars{Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite14] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite14|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [572] L744-2-->L745: Formula: (= v_~x$r_buff0_thd2~0_7 |v_Thread1_P1_#t~ite14_3|) InVars {Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_3|} OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_7, Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite14, ~x$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [574] L745-->L745-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_20 256) 0) (= (mod v_~x$r_buff0_thd2~0_9 256) 0)) (= |v_Thread1_P1_#t~ite15_2| v_~x$r_buff1_thd2~0_6) (or (= 0 (mod v_~x$r_buff1_thd2~0_6 256)) (= 0 (mod v_~x$w_buff1_used~0_14 256)))) InVars {~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_6, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_14, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_20} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_6, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_14, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_9, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_20} AuxVars[] AssignedVars[Thread1_P1_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite15|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [575] L745-2-->L750: Formula: (and (= v_~x$r_buff1_thd2~0_7 |v_Thread1_P1_#t~ite15_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_4|} AuxVars[] AssignedVars[~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [421] L766-1-->L770: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [509] L770-->L772: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [376] L772-->L772-2: Formula: (or (= 0 (mod v_~x$w_buff0_used~0_40 256)) (= 0 (mod v_~x$r_buff0_thd0~0_18 256))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_18, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_18, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_40} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [382] L772-2-->L772-4: Formula: (and (or (= (mod v_~x$w_buff1_used~0_26 256) 0) (= 0 (mod v_~x$r_buff1_thd0~0_12 256))) (= |v_ULTIMATE.start_main_#t~ite19_3| v_~x~0_10)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_12, ~x~0=v_~x~0_10} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_12, ~x~0=v_~x~0_10, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [387] L772-4-->L772-5: Formula: (= |v_ULTIMATE.start_main_#t~ite20_3| |v_ULTIMATE.start_main_#t~ite19_4|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_4|} OutVars{ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_3|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [390] L772-5-->L773: Formula: (= v_~x~0_11 |v_ULTIMATE.start_main_#t~ite20_5|) InVars {ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_5|} OutVars{ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_4|, ~x~0=v_~x~0_11, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [503] L773-->L773-2: Formula: (and (or (= 0 (mod v_~x$r_buff0_thd0~0_20 256)) (= (mod v_~x$w_buff0_used~0_42 256) 0)) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~x$w_buff0_used~0_42)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_20, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_42} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_20, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [488] L773-2-->L774: Formula: (= v_~x$w_buff0_used~0_43 |v_ULTIMATE.start_main_#t~ite21_5|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [440] L774-->L774-2: Formula: (and (or (= 0 (mod v_~x$r_buff1_thd0~0_14 256)) (= 0 (mod v_~x$w_buff1_used~0_28 256))) (or (= (mod v_~x$w_buff0_used~0_45 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_22 256))) (= |v_ULTIMATE.start_main_#t~ite22_3| v_~x$w_buff1_used~0_28)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_28, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_14, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_45} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_28, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_14, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [427] L774-2-->L775: Formula: (= v_~x$w_buff1_used~0_29 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_29, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [362] L775-->L775-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_47 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_24 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~x$r_buff0_thd0~0_24)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_24, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_47} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_24, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [369] L775-2-->L776: Formula: (= v_~x$r_buff0_thd0~0_25 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_25, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [471] L776-->L776-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite24_3| v_~x$r_buff1_thd0~0_16) (or (= (mod v_~x$w_buff1_used~0_31 256) 0) (= (mod v_~x$r_buff1_thd0~0_16 256) 0)) (or (= (mod v_~x$w_buff0_used~0_49 256) 0) (= (mod v_~x$r_buff0_thd0~0_27 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_27, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_31, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_16, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_49} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_27, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_31, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_16, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_49} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [477] L776-2-->L783: Formula: (and (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet26.base_3| |v_ULTIMATE.start_main_#t~nondet26.offset_3|)) 0 1)) (= v_~x$r_buff1_thd0~0_17 |v_ULTIMATE.start_main_#t~ite24_5|) (= v_~x$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet25.base_3| |v_ULTIMATE.start_main_#t~nondet25.offset_3|)) 0 1)) (= v_~x$mem_tmp~0_3 v_~x~0_12)) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_3|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_3|, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_3|, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_3|, ~x~0=v_~x~0_12} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2, ~x$flush_delayed~0=v_~x$flush_delayed~0_5, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_2|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_2|, ~weak$$choice2~0=v_~weak$$choice2~0_8, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_2|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_17, ~x~0=v_~x~0_12} AuxVars[] AssignedVars[~weak$$choice0~0, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~nondet26.base, ULTIMATE.start_main_#t~nondet26.offset, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet25.base, ~weak$$choice2~0, ULTIMATE.start_main_#t~nondet25.offset, ~x$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [405] L783-->L783-5: Formula: (and (= |v_ULTIMATE.start_main_#t~ite28_2| v_~x~0_13) (let ((.cse0 (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) (or (and (= (mod v_~x$r_buff1_thd0~0_18 256) 0) .cse0) (and (= (mod v_~x$w_buff1_used~0_32 256) 0) .cse0) (= (mod v_~x$w_buff0_used~0_50 256) 0)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_18, ~x~0=v_~x~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_50} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_2|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_18, ~x~0=v_~x~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_50} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [389] L783-5-->L784: Formula: (= v_~x~0_14 |v_ULTIMATE.start_main_#t~ite28_5|) InVars {ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_5|} OutVars{ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_5|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_4|, ~x~0=v_~x~0_14} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite27, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [500] L784-->L784-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite31_2| v_~x$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_8, ~weak$$choice2~0=v_~weak$$choice2~0_9} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_8, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_2|, ~weak$$choice2~0=v_~weak$$choice2~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [472] L784-8-->L785: Formula: (= v_~x$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite31_5|) InVars {ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_12, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_4|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [437] L785-->L785-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite34_2| v_~x$w_buff1~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_11, ~x$w_buff1~0=v_~x$w_buff1~0_7} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_11, ~x$w_buff1~0=v_~x$w_buff1~0_7, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [418] L785-8-->L786: Formula: (= v_~x$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite34_5|) InVars {ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} OutVars{ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|, ~x$w_buff1~0=v_~x$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_4|} AuxVars[] AssignedVars[~x$w_buff1~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [359] L786-->L786-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite37_5| v_~x$w_buff0_used~0_62)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_62} OutVars{ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ~weak$$choice2~0=v_~weak$$choice2~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_62} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite37] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [357] L786-8-->L787: Formula: (= v_~x$w_buff0_used~0_25 |v_ULTIMATE.start_main_#t~ite37_3|) InVars {ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_3|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_25} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [468] L787-->L787-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite40_1| v_~x$w_buff1_used~0_16) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_16} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_16, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_1|, ~weak$$choice2~0=v_~weak$$choice2~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [465] L787-8-->L788: Formula: (= v_~x$w_buff1_used~0_19 |v_ULTIMATE.start_main_#t~ite40_4|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_19, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [416] L788-->L788-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite43_1| v_~x$r_buff0_thd0~0_6) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_6} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_1|, ~weak$$choice2~0=v_~weak$$choice2~0_3} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [412] L788-8-->L789: Formula: (= v_~x$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite43_4|) InVars {ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_11, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_3|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [355] L789-->L789-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite46_1| v_~x$r_buff1_thd0~0_6)) InVars {~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_1|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [508] L789-8-->L791: Formula: (and (= v_~x$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite46_4|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 2 v_~y~0_3) (= 1 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= 2 v_~x~0_6))) 1 0) 0) 0 1))) InVars {ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~y~0=v_~y~0_3, ~x~0=v_~x~0_6} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_3|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y~0=v_~y~0_3, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_9, ~x~0=v_~x~0_6, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [410] L791-->L791-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite47_1| v_~x$mem_tmp~0_1) (not (= 0 (mod v_~x$flush_delayed~0_1 256)))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_1, ~x$mem_tmp~0=v_~x$mem_tmp~0_1} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_1|, ~x$mem_tmp~0=v_~x$mem_tmp~0_1, ~x$flush_delayed~0=v_~x$flush_delayed~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [415] L791-2-->L794: Formula: (and (= v_~x~0_8 |v_ULTIMATE.start_main_#t~ite47_4|) (= v_~x$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_3, ~x~0=v_~x~0_8} AuxVars[] AssignedVars[~x$flush_delayed~0, ULTIMATE.start_main_#t~ite47, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [404] L794-->L794-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [377] L794-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [407] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [401] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [398] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~x$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 ~x$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 ~x$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~x$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); srcloc: L763 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); srcloc: L763-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); srcloc: L765 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); srcloc: L765-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x$w_buff1~0 := ~x$w_buff0~0;~x$w_buff0~0 := 2;~x$w_buff1_used~0 := ~x$w_buff0_used~0;~x$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0;~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0;~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0;~x$r_buff0_thd2~0 := 1;~y~0 := 1;~__unbuffered_p1_EAX~0 := ~y~0;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y~0 := 2;~x~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256);#t~ite3 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 #t~ite4 := #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P0_#t~ite4|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite5 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite6 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite7 := ~x$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite8 := ~x$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite11 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite11|=2, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 ~x~0 := #t~ite11;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite12 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite12|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff0_used~0 := #t~ite12;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite13 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff1_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256);#t~ite14 := ~x$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite14|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff0_thd2~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite15 := ~x$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite15|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff1_thd2~0 := #t~ite15;havoc #t~ite15;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc main_#t~nondet18;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256);main_#t~ite19 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 main_#t~ite20 := main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite20;havoc main_#t~ite20;havoc main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite21 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite21;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite22 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite22;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite24;havoc main_#t~ite24;~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1);havoc main_#t~nondet25.base, main_#t~nondet25.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1);havoc main_#t~nondet26.base, main_#t~nondet26.offset;~x$flush_delayed~0 := ~weak$$choice2~0;~x$mem_tmp~0 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256);main_#t~ite28 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite28;havoc main_#t~ite28;havoc main_#t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite31 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0~0 := main_#t~ite31;havoc main_#t~ite31;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite34 := ~x$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1~0 := main_#t~ite34;havoc main_#t~ite34;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite37 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite37;havoc main_#t~ite35;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite40 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite40;havoc main_#t~ite39;havoc main_#t~ite40;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite43;havoc main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite46;havoc main_#t~ite44;havoc main_#t~ite46;havoc main_#t~ite45;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~x$flush_delayed~0 % 256;main_#t~ite47 := ~x$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite47;havoc main_#t~ite47;~x$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~x$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 ~x$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 ~x$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~x$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); srcloc: L763 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); srcloc: L763-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); srcloc: L765 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); srcloc: L765-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x$w_buff1~0 := ~x$w_buff0~0;~x$w_buff0~0 := 2;~x$w_buff1_used~0 := ~x$w_buff0_used~0;~x$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0;~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0;~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0;~x$r_buff0_thd2~0 := 1;~y~0 := 1;~__unbuffered_p1_EAX~0 := ~y~0;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y~0 := 2;~x~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256);#t~ite3 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 #t~ite4 := #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P0_#t~ite4|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite5 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite6 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite7 := ~x$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite8 := ~x$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite11 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite11|=2, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 ~x~0 := #t~ite11;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite12 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite12|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff0_used~0 := #t~ite12;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite13 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff1_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256);#t~ite14 := ~x$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite14|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff0_thd2~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite15 := ~x$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite15|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff1_thd2~0 := #t~ite15;havoc #t~ite15;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc main_#t~nondet18;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256);main_#t~ite19 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 main_#t~ite20 := main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite20;havoc main_#t~ite20;havoc main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite21 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite21;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite22 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite22;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite24;havoc main_#t~ite24;~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1);havoc main_#t~nondet25.base, main_#t~nondet25.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1);havoc main_#t~nondet26.base, main_#t~nondet26.offset;~x$flush_delayed~0 := ~weak$$choice2~0;~x$mem_tmp~0 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256);main_#t~ite28 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite28;havoc main_#t~ite28;havoc main_#t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite31 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0~0 := main_#t~ite31;havoc main_#t~ite31;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite34 := ~x$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1~0 := main_#t~ite34;havoc main_#t~ite34;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite37 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite37;havoc main_#t~ite35;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite40 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite40;havoc main_#t~ite39;havoc main_#t~ite40;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite43;havoc main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite46;havoc main_#t~ite44;havoc main_#t~ite46;havoc main_#t~ite45;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~x$flush_delayed~0 % 256;main_#t~ite47 := ~x$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite47;havoc main_#t~ite47;~x$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] -1 call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] -1 call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] -1 call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256); [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L742] 0 #t~ite12 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256); [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256); [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1); [L779] -1 havoc main_#t~nondet25.base, main_#t~nondet25.offset; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1); [L780] -1 havoc main_#t~nondet26.base, main_#t~nondet26.offset; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256); [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 assume 0 != ~weak$$choice2~0 % 256; [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 assume 0 != ~weak$$choice2~0 % 256; [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 assume 0 != ~weak$$choice2~0 % 256; [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 assume 0 != ~weak$$choice2~0 % 256; [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 assume 0 != ~weak$$choice2~0 % 256; [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 assume 0 != ~weak$$choice2~0 % 256; [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 assume 0 != ~x$flush_delayed~0 % 256; [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] -1 call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] -1 call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] -1 call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256); [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L742] 0 #t~ite12 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256); [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256); [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1); [L779] -1 havoc main_#t~nondet25.base, main_#t~nondet25.offset; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1); [L780] -1 havoc main_#t~nondet26.base, main_#t~nondet26.offset; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256); [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 assume 0 != ~weak$$choice2~0 % 256; [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 assume 0 != ~weak$$choice2~0 % 256; [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 assume 0 != ~weak$$choice2~0 % 256; [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 assume 0 != ~weak$$choice2~0 % 256; [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 assume 0 != ~weak$$choice2~0 % 256; [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 assume 0 != ~weak$$choice2~0 % 256; [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 assume 0 != ~x$flush_delayed~0 % 256; [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25, main_#t~nondet26, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0, main_~#t1590~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call main_~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, main_~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call main_~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, main_~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25!base + main_#t~nondet25!offset then 0 else 1); [L779] -1 havoc main_#t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26!base + main_#t~nondet26!offset then 0 else 1); [L780] -1 havoc main_#t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25, main_#t~nondet26, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0, main_~#t1590~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call main_~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, main_~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call main_~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, main_~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25!base + main_#t~nondet25!offset then 0 else 1); [L779] -1 havoc main_#t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26!base + main_#t~nondet26!offset then 0 else 1); [L780] -1 havoc main_#t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call ~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, ~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc #t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call ~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, ~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc #t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 #t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 #t~ite20 := #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := #t~ite20; [L772] -1 havoc #t~ite20; [L772] -1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 #t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := #t~ite21; [L773] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 #t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := #t~ite22; [L774] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 #t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := #t~ite23; [L775] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 #t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := #t~ite24; [L776] -1 havoc #t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == #t~nondet25!base + #t~nondet25!offset then 0 else 1); [L779] -1 havoc #t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == #t~nondet26!base + #t~nondet26!offset then 0 else 1); [L780] -1 havoc #t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 #t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := #t~ite28; [L783] -1 havoc #t~ite28; [L783] -1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 #t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := #t~ite31; [L784] -1 havoc #t~ite31; [L784] -1 havoc #t~ite30; [L784] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 #t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := #t~ite34; [L785] -1 havoc #t~ite34; [L785] -1 havoc #t~ite32; [L785] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 #t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := #t~ite37; [L786] -1 havoc #t~ite35; [L786] -1 havoc #t~ite37; [L786] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 #t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := #t~ite40; [L787] -1 havoc #t~ite39; [L787] -1 havoc #t~ite40; [L787] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 #t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := #t~ite43; [L788] -1 havoc #t~ite42; [L788] -1 havoc #t~ite41; [L788] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 #t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := #t~ite46; [L789] -1 havoc #t~ite44; [L789] -1 havoc #t~ite46; [L789] -1 havoc #t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 #t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := #t~ite47; [L791] -1 havoc #t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call ~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, ~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc #t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call ~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, ~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc #t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 #t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 #t~ite20 := #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := #t~ite20; [L772] -1 havoc #t~ite20; [L772] -1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 #t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := #t~ite21; [L773] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 #t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := #t~ite22; [L774] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 #t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := #t~ite23; [L775] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 #t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := #t~ite24; [L776] -1 havoc #t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == #t~nondet25!base + #t~nondet25!offset then 0 else 1); [L779] -1 havoc #t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == #t~nondet26!base + #t~nondet26!offset then 0 else 1); [L780] -1 havoc #t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 #t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := #t~ite28; [L783] -1 havoc #t~ite28; [L783] -1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 #t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := #t~ite31; [L784] -1 havoc #t~ite31; [L784] -1 havoc #t~ite30; [L784] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 #t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := #t~ite34; [L785] -1 havoc #t~ite34; [L785] -1 havoc #t~ite32; [L785] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 #t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := #t~ite37; [L786] -1 havoc #t~ite35; [L786] -1 havoc #t~ite37; [L786] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 #t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := #t~ite40; [L787] -1 havoc #t~ite39; [L787] -1 havoc #t~ite40; [L787] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 #t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := #t~ite43; [L788] -1 havoc #t~ite42; [L788] -1 havoc #t~ite41; [L788] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 #t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := #t~ite46; [L789] -1 havoc #t~ite44; [L789] -1 havoc #t~ite46; [L789] -1 havoc #t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 #t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := #t~ite47; [L791] -1 havoc #t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L681] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L682] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L683] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L684] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L685] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L686] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L687] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L688] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L689] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L690] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L691] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L692] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L693] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L695] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L763] -1 pthread_t t1589; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L764] FCALL, FORK -1 pthread_create(&t1589, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] -1 pthread_t t1590; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L766] FCALL, FORK -1 pthread_create(&t1590, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L721] 0 x$w_buff1 = x$w_buff0 [L722] 0 x$w_buff0 = 2 [L723] 0 x$w_buff1_used = x$w_buff0_used [L724] 0 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L726] 0 x$r_buff1_thd0 = x$r_buff0_thd0 [L727] 0 x$r_buff1_thd1 = x$r_buff0_thd1 [L728] 0 x$r_buff1_thd2 = x$r_buff0_thd2 [L729] 0 x$r_buff0_thd2 = (_Bool)1 [L732] 0 y = 1 [L735] 0 __unbuffered_p1_EAX = y [L738] 0 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L701] 1 y = 2 [L704] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L708] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L708] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L709] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L709] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L710] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L710] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L711] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L711] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L742] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L743] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L743] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L744] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L744] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L745] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L745] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L748] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L768] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L773] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L773] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L774] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L774] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L775] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L775] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L776] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L776] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L779] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L780] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L781] -1 x$flush_delayed = weak$$choice2 [L782] -1 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] EXPR -1 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] -1 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L784] EXPR -1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L784] -1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L785] EXPR -1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] -1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L786] EXPR -1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] -1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L787] EXPR -1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] -1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L788] EXPR -1 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] -1 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L789] EXPR -1 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] -1 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L790] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] EXPR -1 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] -1 x = x$flush_delayed ? x$mem_tmp : x [L792] -1 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] ----- [2018-11-23 15:53:18,897 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 15:53:18,899 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:53:18 BasicIcfg [2018-11-23 15:53:18,899 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 15:53:18,899 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 15:53:18,899 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 15:53:18,899 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 15:53:18,900 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:52:58" (3/4) ... [2018-11-23 15:53:18,902 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [467] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [358] L-1-->L671: Formula: (= |v_#valid_5| (store |v_#valid_6| 0 0)) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [515] L671-->L673: Formula: (= v_~__unbuffered_cnt~0_5 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [385] L673-->L675: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [431] L675-->L676: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [350] L676-->L677: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [480] L677-->L679: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [524] L679-->L680: Formula: (= v_~x~0_9 0) InVars {} OutVars{~x~0=v_~x~0_9} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [458] L680-->L681: Formula: (= v_~x$flush_delayed~0_4 0) InVars {} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_4} AuxVars[] AssignedVars[~x$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 [392] L681-->L682: Formula: (= v_~x$mem_tmp~0_2 0) InVars {} OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_2} AuxVars[] AssignedVars[~x$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 [514] L682-->L683: Formula: (= v_~x$r_buff0_thd0~0_16 0) InVars {} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_16} AuxVars[] AssignedVars[~x$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 [451] L683-->L684: Formula: (= v_~x$r_buff0_thd1~0_13 0) InVars {} OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_13} AuxVars[] AssignedVars[~x$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 [384] L684-->L685: Formula: (= v_~x$r_buff0_thd2~0_14 0) InVars {} OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~x$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 [490] L685-->L686: Formula: (= v_~x$r_buff1_thd0~0_10 0) InVars {} OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_10} AuxVars[] AssignedVars[~x$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 [430] L686-->L687: Formula: (= v_~x$r_buff1_thd1~0_9 0) InVars {} OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_9} AuxVars[] AssignedVars[~x$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 [373] L687-->L688: Formula: (= v_~x$r_buff1_thd2~0_9 0) InVars {} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~x$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 [479] L688-->L689: Formula: (= v_~x$read_delayed~0_1 0) InVars {} OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1} AuxVars[] AssignedVars[~x$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 [424] L689-->L690: Formula: (and (= v_~x$read_delayed_var~0.offset_1 0) (= v_~x$read_delayed_var~0.base_1 0)) InVars {} OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 [523] L690-->L691: Formula: (= v_~x$w_buff0~0_5 0) InVars {} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_5} AuxVars[] AssignedVars[~x$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 [457] L691-->L692: Formula: (= v_~x$w_buff0_used~0_38 0) InVars {} OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_38} AuxVars[] AssignedVars[~x$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 [391] L692-->L693: Formula: (= v_~x$w_buff1~0_4 0) InVars {} OutVars{~x$w_buff1~0=v_~x$w_buff1~0_4} AuxVars[] AssignedVars[~x$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 [512] L693-->L695: Formula: (= v_~x$w_buff1_used~0_24 0) InVars {} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_24} AuxVars[] AssignedVars[~x$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 [383] L695-->L696: Formula: (= v_~y~0_4 0) InVars {} OutVars{~y~0=v_~y~0_4} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [489] L696-->L697: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [428] L697-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [513] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [511] L-1-2-->L763: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_1|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_3|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_1|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_1|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_1|, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_1|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_2|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_3|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_1|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_3|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_1|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1590~0.offset, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet26.base, ULTIMATE.start_main_#t~nondet25.base, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~nondet26.offset, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1589~0.offset, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~nondet25.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1589~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1590~0.base, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_#t~nondet18] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [443] L763-->L763-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1589~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t1589~0.base_4| 0)) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1589~0.base_4| 4)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1589~0.base_4|) 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1589~0.base_4| 1))) InVars {#length=|v_#length_2|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_4|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_4|, #length=|v_#length_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1589~0.base, #valid, ULTIMATE.start_main_~#t1589~0.offset, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [444] L763-1-->L764: Formula: (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1589~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1589~0.base_5|) |v_ULTIMATE.start_main_~#t1589~0.offset_5| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1589~0.base=|v_ULTIMATE.start_main_~#t1589~0.base_5|, ULTIMATE.start_main_~#t1589~0.offset=|v_ULTIMATE.start_main_~#t1589~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 [579] L764-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [364] L764-1-->L765: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [473] L765-->L765-1: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1590~0.base_4| 4)) (not (= |v_ULTIMATE.start_main_~#t1590~0.base_4| 0)) (= 0 |v_ULTIMATE.start_main_~#t1590~0.offset_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1590~0.base_4| 1)) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1590~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_4|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1590~0.offset, ULTIMATE.start_main_~#t1590~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 [474] L765-1-->L766: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1590~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1590~0.base_5|) |v_ULTIMATE.start_main_~#t1590~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1590~0.offset=|v_ULTIMATE.start_main_~#t1590~0.offset_5|, ULTIMATE.start_main_~#t1590~0.base=|v_ULTIMATE.start_main_~#t1590~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 [580] L766-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [552] P1ENTRY-->L4: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~x$w_buff0~0_2 2) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~x$w_buff1~0_3 v_~x$w_buff0~0_3) (= v_~x$w_buff1_used~0_15 v_~x$w_buff0_used~0_22) (= v_~x$w_buff0_used~0_21 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_21 256))) (not (= 0 (mod v_~x$w_buff1_used~0_15 256))))) 1 0))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_3, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_22} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_2, Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~x$w_buff1~0=v_~x$w_buff1~0_3, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_15, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_21} AuxVars[] AssignedVars[~x$w_buff0~0, Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, Thread1_P1_~arg.base, ~x$w_buff1~0, Thread1_P1___VERIFIER_assert_#in~expression, ~x$w_buff1_used~0, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [554] L4-->L4-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 [557] L4-3-->L741: Formula: (and (= v_~x$r_buff1_thd2~0_8 v_~x$r_buff0_thd2~0_11) (= v_~__unbuffered_p1_EBX~0_1 v_~y~0_2) (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_2) (= v_~x$r_buff1_thd0~0_1 v_~x$r_buff0_thd0~0_1) (= v_~x$r_buff0_thd2~0_10 1) (= v_~x$r_buff1_thd1~0_8 v_~x$r_buff0_thd1~0_12) (= v_~y~0_2 1)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_1, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_12, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_11} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_1, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_12, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_8, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_8, ~y~0=v_~y~0_2, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_10, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 [530] P0ENTRY-->L707: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~y~0_1 2) (= v_~x~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread0_P0_~arg.offset, Thread0_P0_~arg.base, ~y~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [532] L707-->L707-2: Formula: (or (= 0 (mod v_~x$r_buff0_thd1~0_4 256)) (= 0 (mod v_~x$w_buff0_used~0_3 256))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_3} OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [535] L707-2-->L707-4: Formula: (and (or (= 0 (mod v_~x$w_buff1_used~0_4 256)) (= (mod v_~x$r_buff1_thd1~0_4 256) 0)) (= |v_Thread0_P0_#t~ite3_3| v_~x~0_2)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_4, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_4, ~x~0=v_~x~0_2} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_4, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_4, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_3|, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite3] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite3|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [538] L707-4-->L707-5: Formula: (= |v_Thread0_P0_#t~ite4_4| |v_Thread0_P0_#t~ite3_4|) InVars {Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_4|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_4|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_4|} AuxVars[] AssignedVars[Thread0_P0_#t~ite4] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite3|=1, |Thread0_P0_#t~ite4|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [533] L707-5-->L708: Formula: (= v_~x~0_3 |v_Thread0_P0_#t~ite4_2|) InVars {Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_2|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_3|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_1|, ~x~0=v_~x~0_3} AuxVars[] AssignedVars[Thread0_P0_#t~ite4, Thread0_P0_#t~ite3, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [537] L708-->L708-2: Formula: (and (= |v_Thread0_P0_#t~ite5_2| v_~x$w_buff0_used~0_7) (or (= 0 (mod v_~x$w_buff0_used~0_7 256)) (= (mod v_~x$r_buff0_thd1~0_8 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_7} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_2|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_7} AuxVars[] AssignedVars[Thread0_P0_#t~ite5] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [539] L708-2-->L709: Formula: (= v_~x$w_buff0_used~0_8 |v_Thread0_P0_#t~ite5_3|) InVars {Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_3|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_8} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [541] L709-->L709-2: Formula: (and (= |v_Thread0_P0_#t~ite6_2| v_~x$w_buff1_used~0_6) (or (= (mod v_~x$w_buff0_used~0_10 256) 0) (= (mod v_~x$r_buff0_thd1~0_10 256) 0)) (or (= 0 (mod v_~x$w_buff1_used~0_6 256)) (= (mod v_~x$r_buff1_thd1~0_7 256) 0))) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_6, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_10, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_10} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_6, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_10, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_7, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [542] L709-2-->L710: Formula: (= v_~x$w_buff1_used~0_7 |v_Thread0_P0_#t~ite6_3|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_7, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [544] L710-->L710-2: Formula: (and (= |v_Thread0_P0_#t~ite7_2| v_~x$r_buff0_thd1~0_1) (or (= (mod v_~x$w_buff0_used~0_1 256) 0) (= 0 (mod v_~x$r_buff0_thd1~0_1 256)))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_2|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1} AuxVars[] AssignedVars[Thread0_P0_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite7|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [545] L710-2-->L711: Formula: (= v_~x$r_buff0_thd1~0_3 |v_Thread0_P0_#t~ite7_3|) InVars {Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_3|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_4|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_3} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, Thread0_P0_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [547] L711-->L711-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_5 256) 0) (= 0 (mod v_~x$r_buff0_thd1~0_6 256))) (or (= (mod v_~x$r_buff1_thd1~0_3 256) 0) (= (mod v_~x$w_buff1_used~0_3 256) 0)) (= |v_Thread0_P0_#t~ite8_2| v_~x$r_buff1_thd1~0_3)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_3, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_6, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_3, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_5} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_3, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_6, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_3, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite8|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 [548] L711-2-->L716: Formula: (and (= v_~x$r_buff1_thd1~0_5 |v_Thread0_P0_#t~ite8_3|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1))) InVars {Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_5, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_4|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, Thread0_P0_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 [558] L741-->L741-5: Formula: (and (not (= 0 (mod v_~x$r_buff0_thd2~0_12 256))) (= |v_Thread1_P1_#t~ite11_1| v_~x$w_buff0~0_4) (not (= 0 (mod v_~x$w_buff0_used~0_23 256)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_4, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_12, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_23} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_4, Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_12, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_23} AuxVars[] AssignedVars[Thread1_P1_#t~ite11] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite11|=2, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 [560] L741-5-->L742: Formula: (= v_~x~0_5 |v_Thread1_P1_#t~ite11_2|) InVars {Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_2|} OutVars{Thread1_P1_#t~ite11=|v_Thread1_P1_#t~ite11_3|, ~x~0=v_~x~0_5, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite10, Thread1_P1_#t~ite11, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [563] L742-->L742-2: Formula: (and (not (= (mod v_~x$w_buff0_used~0_12 256) 0)) (= |v_Thread1_P1_#t~ite12_1| 0) (not (= (mod v_~x$r_buff0_thd2~0_1 256) 0))) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_12} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite12|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [566] L742-2-->L743: Formula: (= v_~x$w_buff0_used~0_14 |v_Thread1_P1_#t~ite12_3|) InVars {Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_3|} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_14} AuxVars[] AssignedVars[Thread1_P1_#t~ite12, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [568] L743-->L743-2: Formula: (and (= |v_Thread1_P1_#t~ite13_2| v_~x$w_buff1_used~0_11) (or (= 0 (mod v_~x$w_buff1_used~0_11 256)) (= 0 (mod v_~x$r_buff1_thd2~0_4 256))) (or (= (mod v_~x$r_buff0_thd2~0_4 256) 0) (= (mod v_~x$w_buff0_used~0_16 256) 0))) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_11, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_4, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_16} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_11, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_4, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_16} AuxVars[] AssignedVars[Thread1_P1_#t~ite13] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [569] L743-2-->L744: Formula: (= v_~x$w_buff1_used~0_12 |v_Thread1_P1_#t~ite13_3|) InVars {Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_3|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_12, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, Thread1_P1_#t~ite13] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [571] L744-->L744-2: Formula: (and (or (= (mod v_~x$r_buff0_thd2~0_6 256) 0) (= 0 (mod v_~x$w_buff0_used~0_18 256))) (= |v_Thread1_P1_#t~ite14_2| v_~x$r_buff0_thd2~0_6)) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_18} OutVars{Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite14] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite14|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [572] L744-2-->L745: Formula: (= v_~x$r_buff0_thd2~0_7 |v_Thread1_P1_#t~ite14_3|) InVars {Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_3|} OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_7, Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite14, ~x$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [574] L745-->L745-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_20 256) 0) (= (mod v_~x$r_buff0_thd2~0_9 256) 0)) (= |v_Thread1_P1_#t~ite15_2| v_~x$r_buff1_thd2~0_6) (or (= 0 (mod v_~x$r_buff1_thd2~0_6 256)) (= 0 (mod v_~x$w_buff1_used~0_14 256)))) InVars {~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_6, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_14, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_20} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_6, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_14, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_9, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_20} AuxVars[] AssignedVars[Thread1_P1_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite15|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 [575] L745-2-->L750: Formula: (and (= v_~x$r_buff1_thd2~0_7 |v_Thread1_P1_#t~ite15_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_4|} AuxVars[] AssignedVars[~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [421] L766-1-->L770: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [509] L770-->L772: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [376] L772-->L772-2: Formula: (or (= 0 (mod v_~x$w_buff0_used~0_40 256)) (= 0 (mod v_~x$r_buff0_thd0~0_18 256))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_18, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_40} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_18, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_40} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [382] L772-2-->L772-4: Formula: (and (or (= (mod v_~x$w_buff1_used~0_26 256) 0) (= 0 (mod v_~x$r_buff1_thd0~0_12 256))) (= |v_ULTIMATE.start_main_#t~ite19_3| v_~x~0_10)) InVars {~x$w_buff1_used~0=v_~x$w_buff1_used~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_12, ~x~0=v_~x~0_10} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_26, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_12, ~x~0=v_~x~0_10, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [387] L772-4-->L772-5: Formula: (= |v_ULTIMATE.start_main_#t~ite20_3| |v_ULTIMATE.start_main_#t~ite19_4|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_4|} OutVars{ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_3|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [390] L772-5-->L773: Formula: (= v_~x~0_11 |v_ULTIMATE.start_main_#t~ite20_5|) InVars {ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_5|} OutVars{ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_4|, ~x~0=v_~x~0_11, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [503] L773-->L773-2: Formula: (and (or (= 0 (mod v_~x$r_buff0_thd0~0_20 256)) (= (mod v_~x$w_buff0_used~0_42 256) 0)) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~x$w_buff0_used~0_42)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_20, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_42} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_20, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [488] L773-2-->L774: Formula: (= v_~x$w_buff0_used~0_43 |v_ULTIMATE.start_main_#t~ite21_5|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [440] L774-->L774-2: Formula: (and (or (= 0 (mod v_~x$r_buff1_thd0~0_14 256)) (= 0 (mod v_~x$w_buff1_used~0_28 256))) (or (= (mod v_~x$w_buff0_used~0_45 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_22 256))) (= |v_ULTIMATE.start_main_#t~ite22_3| v_~x$w_buff1_used~0_28)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_28, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_14, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_45} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_28, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_14, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [427] L774-2-->L775: Formula: (= v_~x$w_buff1_used~0_29 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_29, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [362] L775-->L775-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_47 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_24 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~x$r_buff0_thd0~0_24)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_24, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_47} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_24, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [369] L775-2-->L776: Formula: (= v_~x$r_buff0_thd0~0_25 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_25, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [471] L776-->L776-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite24_3| v_~x$r_buff1_thd0~0_16) (or (= (mod v_~x$w_buff1_used~0_31 256) 0) (= (mod v_~x$r_buff1_thd0~0_16 256) 0)) (or (= (mod v_~x$w_buff0_used~0_49 256) 0) (= (mod v_~x$r_buff0_thd0~0_27 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_27, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_31, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_16, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_49} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_27, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_31, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_16, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_49} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [477] L776-2-->L783: Formula: (and (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet26.base_3| |v_ULTIMATE.start_main_#t~nondet26.offset_3|)) 0 1)) (= v_~x$r_buff1_thd0~0_17 |v_ULTIMATE.start_main_#t~ite24_5|) (= v_~x$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet25.base_3| |v_ULTIMATE.start_main_#t~nondet25.offset_3|)) 0 1)) (= v_~x$mem_tmp~0_3 v_~x~0_12)) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_3|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_3|, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_3|, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_3|, ~x~0=v_~x~0_12} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2, ~x$flush_delayed~0=v_~x$flush_delayed~0_5, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ULTIMATE.start_main_#t~nondet26.base=|v_ULTIMATE.start_main_#t~nondet26.base_2|, ULTIMATE.start_main_#t~nondet26.offset=|v_ULTIMATE.start_main_#t~nondet26.offset_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet25.base=|v_ULTIMATE.start_main_#t~nondet25.base_2|, ~weak$$choice2~0=v_~weak$$choice2~0_8, ULTIMATE.start_main_#t~nondet25.offset=|v_ULTIMATE.start_main_#t~nondet25.offset_2|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_17, ~x~0=v_~x~0_12} AuxVars[] AssignedVars[~weak$$choice0~0, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~nondet26.base, ULTIMATE.start_main_#t~nondet26.offset, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet25.base, ~weak$$choice2~0, ULTIMATE.start_main_#t~nondet25.offset, ~x$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [405] L783-->L783-5: Formula: (and (= |v_ULTIMATE.start_main_#t~ite28_2| v_~x~0_13) (let ((.cse0 (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) (or (and (= (mod v_~x$r_buff1_thd0~0_18 256) 0) .cse0) (and (= (mod v_~x$w_buff1_used~0_32 256) 0) .cse0) (= (mod v_~x$w_buff0_used~0_50 256) 0)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_18, ~x~0=v_~x~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_50} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_2|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_18, ~x~0=v_~x~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_50} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [389] L783-5-->L784: Formula: (= v_~x~0_14 |v_ULTIMATE.start_main_#t~ite28_5|) InVars {ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_5|} OutVars{ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_5|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_4|, ~x~0=v_~x~0_14} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite27, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [500] L784-->L784-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite31_2| v_~x$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_8, ~weak$$choice2~0=v_~weak$$choice2~0_9} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_8, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_2|, ~weak$$choice2~0=v_~weak$$choice2~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [472] L784-8-->L785: Formula: (= v_~x$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite31_5|) InVars {ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_12, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_4|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [437] L785-->L785-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite34_2| v_~x$w_buff1~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_11, ~x$w_buff1~0=v_~x$w_buff1~0_7} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_11, ~x$w_buff1~0=v_~x$w_buff1~0_7, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [418] L785-8-->L786: Formula: (= v_~x$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite34_5|) InVars {ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} OutVars{ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|, ~x$w_buff1~0=v_~x$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_4|} AuxVars[] AssignedVars[~x$w_buff1~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [359] L786-->L786-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite37_5| v_~x$w_buff0_used~0_62)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_62} OutVars{ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ~weak$$choice2~0=v_~weak$$choice2~0_13, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_62} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite37] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [357] L786-8-->L787: Formula: (= v_~x$w_buff0_used~0_25 |v_ULTIMATE.start_main_#t~ite37_3|) InVars {ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_3|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_25} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37, ~x$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [468] L787-->L787-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite40_1| v_~x$w_buff1_used~0_16) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_16} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_16, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_1|, ~weak$$choice2~0=v_~weak$$choice2~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [465] L787-8-->L788: Formula: (= v_~x$w_buff1_used~0_19 |v_ULTIMATE.start_main_#t~ite40_4|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|} OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_19, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_3|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [416] L788-->L788-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite43_1| v_~x$r_buff0_thd0~0_6) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_6} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_1|, ~weak$$choice2~0=v_~weak$$choice2~0_3} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [412] L788-8-->L789: Formula: (= v_~x$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite43_4|) InVars {ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_11, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_3|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [355] L789-->L789-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite46_1| v_~x$r_buff1_thd0~0_6)) InVars {~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_1|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [508] L789-8-->L791: Formula: (and (= v_~x$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite46_4|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 2 v_~y~0_3) (= 1 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= 2 v_~x~0_6))) 1 0) 0) 0 1))) InVars {ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~y~0=v_~y~0_3, ~x~0=v_~x~0_6} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_3|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y~0=v_~y~0_3, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_9, ~x~0=v_~x~0_6, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [410] L791-->L791-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite47_1| v_~x$mem_tmp~0_1) (not (= 0 (mod v_~x$flush_delayed~0_1 256)))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_1, ~x$mem_tmp~0=v_~x$mem_tmp~0_1} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_1|, ~x$mem_tmp~0=v_~x$mem_tmp~0_1, ~x$flush_delayed~0=v_~x$flush_delayed~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [415] L791-2-->L794: Formula: (and (= v_~x~0_8 |v_ULTIMATE.start_main_#t~ite47_4|) (= v_~x$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_3, ~x~0=v_~x~0_8} AuxVars[] AssignedVars[~x$flush_delayed~0, ULTIMATE.start_main_#t~ite47, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [404] L794-->L794-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [377] L794-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [407] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [401] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 [398] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~x$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 ~x$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 ~x$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~x$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); srcloc: L763 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); srcloc: L763-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); srcloc: L765 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); srcloc: L765-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x$w_buff1~0 := ~x$w_buff0~0;~x$w_buff0~0 := 2;~x$w_buff1_used~0 := ~x$w_buff0_used~0;~x$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0;~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0;~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0;~x$r_buff0_thd2~0 := 1;~y~0 := 1;~__unbuffered_p1_EAX~0 := ~y~0;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y~0 := 2;~x~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256);#t~ite3 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 #t~ite4 := #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P0_#t~ite4|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite5 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite6 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite7 := ~x$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite8 := ~x$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite11 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite11|=2, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 ~x~0 := #t~ite11;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite12 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite12|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff0_used~0 := #t~ite12;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite13 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff1_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256);#t~ite14 := ~x$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite14|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff0_thd2~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite15 := ~x$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite15|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff1_thd2~0 := #t~ite15;havoc #t~ite15;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc main_#t~nondet18;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256);main_#t~ite19 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 main_#t~ite20 := main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite20;havoc main_#t~ite20;havoc main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite21 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite21;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite22 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite22;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite24;havoc main_#t~ite24;~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1);havoc main_#t~nondet25.base, main_#t~nondet25.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1);havoc main_#t~nondet26.base, main_#t~nondet26.offset;~x$flush_delayed~0 := ~weak$$choice2~0;~x$mem_tmp~0 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256);main_#t~ite28 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite28;havoc main_#t~ite28;havoc main_#t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite31 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0~0 := main_#t~ite31;havoc main_#t~ite31;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite34 := ~x$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1~0 := main_#t~ite34;havoc main_#t~ite34;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite37 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite37;havoc main_#t~ite35;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite40 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite40;havoc main_#t~ite39;havoc main_#t~ite40;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite43;havoc main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite46;havoc main_#t~ite44;havoc main_#t~ite46;havoc main_#t~ite45;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~x$flush_delayed~0 % 256;main_#t~ite47 := ~x$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite47;havoc main_#t~ite47;~x$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~x$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [?] -1 ~x$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [?] -1 ~x$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [?] -1 ~x$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [?] -1 ~x$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [?] -1 ~x$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~x$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); srcloc: L763 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); srcloc: L763-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); srcloc: L765 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); srcloc: L765-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x$w_buff1~0 := ~x$w_buff0~0;~x$w_buff0~0 := 2;~x$w_buff1_used~0 := ~x$w_buff0_used~0;~x$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0;~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0;~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0;~x$r_buff0_thd2~0 := 1;~y~0 := 1;~__unbuffered_p1_EAX~0 := ~y~0;~__unbuffered_p1_EBX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y~0 := 2;~x~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256);#t~ite3 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 #t~ite4 := #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite3|=1, |P0_#t~ite4|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x~0 := #t~ite4;havoc #t~ite4;havoc #t~ite3; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite5 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite6 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256);#t~ite7 := ~x$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256));#t~ite8 := ~x$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 1 ~x$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite11 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite11|=2, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [?] 0 ~x~0 := #t~ite11;havoc #t~ite11;havoc #t~ite10; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256;#t~ite12 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite12|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff0_used~0 := #t~ite12;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite13 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$w_buff1_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256);#t~ite14 := ~x$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite14|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff0_thd2~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256));#t~ite15 := ~x$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite15|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] 0 ~x$r_buff1_thd2~0 := #t~ite15;havoc #t~ite15;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc main_#t~nondet18;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256);main_#t~ite19 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 main_#t~ite20 := main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite19|=2, |ULTIMATE.start_main_#t~ite20|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite20;havoc main_#t~ite20;havoc main_#t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite21 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite21;havoc main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite22 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite22|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite22;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256);main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256));main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite24;havoc main_#t~ite24;~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1);havoc main_#t~nondet25.base, main_#t~nondet25.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1);havoc main_#t~nondet26.base, main_#t~nondet26.offset;~x$flush_delayed~0 := ~weak$$choice2~0;~x$mem_tmp~0 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256);main_#t~ite28 := ~x~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite28|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite28;havoc main_#t~ite28;havoc main_#t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite31 := ~x$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite31|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0~0 := main_#t~ite31;havoc main_#t~ite31;havoc main_#t~ite30;havoc main_#t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite34 := ~x$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite34|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1~0 := main_#t~ite34;havoc main_#t~ite34;havoc main_#t~ite32;havoc main_#t~ite33; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite37 := ~x$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff0_used~0 := main_#t~ite37;havoc main_#t~ite35;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite40 := ~x$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$w_buff1_used~0 := main_#t~ite40;havoc main_#t~ite39;havoc main_#t~ite40;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff0_thd0~0 := main_#t~ite43;havoc main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x$r_buff1_thd0~0 := main_#t~ite46;havoc main_#t~ite44;havoc main_#t~ite46;havoc main_#t~ite45;~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 != ~x$flush_delayed~0 % 256;main_#t~ite47 := ~x$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite47|=2, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 ~x~0 := main_#t~ite47;havoc main_#t~ite47;~x$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1589~0.base|=6, |ULTIMATE.start_main_~#t1589~0.offset|=0, |ULTIMATE.start_main_~#t1590~0.base|=5, |ULTIMATE.start_main_~#t1590~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] -1 call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] -1 call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] -1 call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256); [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L742] 0 #t~ite12 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256); [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256); [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1); [L779] -1 havoc main_#t~nondet25.base, main_#t~nondet25.offset; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1); [L780] -1 havoc main_#t~nondet26.base, main_#t~nondet26.offset; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256); [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 assume 0 != ~weak$$choice2~0 % 256; [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 assume 0 != ~weak$$choice2~0 % 256; [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 assume 0 != ~weak$$choice2~0 % 256; [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 assume 0 != ~weak$$choice2~0 % 256; [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 assume 0 != ~weak$$choice2~0 % 256; [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 assume 0 != ~weak$$choice2~0 % 256; [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 assume 0 != ~x$flush_delayed~0 % 256; [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0.base, ~x$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25.base, main_#t~nondet25.offset, main_#t~nondet26.base, main_#t~nondet26.offset, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0.base, main_~#t1589~0.offset, main_~#t1590~0.base, main_~#t1590~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] -1 call main_~#t1589~0.base, main_~#t1589~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 call write~int(0, main_~#t1589~0.base, main_~#t1589~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] -1 call main_~#t1590~0.base, main_~#t1590~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] -1 call write~int(1, main_~#t1590~0.base, main_~#t1590~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256); [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256); [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)); [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 assume 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256; [L742] 0 #t~ite12 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256); [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)); [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 assume !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256); [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 assume !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256); [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 assume !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)); [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25.base + main_#t~nondet25.offset then 0 else 1); [L779] -1 havoc main_#t~nondet25.base, main_#t~nondet25.offset; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26.base + main_#t~nondet26.offset then 0 else 1); [L780] -1 havoc main_#t~nondet26.base, main_#t~nondet26.offset; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 assume (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256); [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 assume 0 != ~weak$$choice2~0 % 256; [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 assume 0 != ~weak$$choice2~0 % 256; [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 assume 0 != ~weak$$choice2~0 % 256; [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 assume 0 != ~weak$$choice2~0 % 256; [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 assume 0 != ~weak$$choice2~0 % 256; [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 assume 0 != ~weak$$choice2~0 % 256; [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 assume 0 != ~x$flush_delayed~0 % 256; [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0.base=6, main_~#t1589~0.offset=0, main_~#t1590~0.base=5, main_~#t1590~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0.base=0, ~x$read_delayed_var~0.offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25, main_#t~nondet26, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0, main_~#t1590~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call main_~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, main_~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call main_~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, main_~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25!base + main_#t~nondet25!offset then 0 else 1); [L779] -1 havoc main_#t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26!base + main_#t~nondet26!offset then 0 else 1); [L780] -1 havoc main_#t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet17, main_#t~nondet18, main_#t~ite20, main_#t~ite19, main_#t~ite21, main_#t~ite22, main_#t~ite23, main_#t~ite24, main_#t~nondet25, main_#t~nondet26, main_#t~ite28, main_#t~ite27, main_#t~ite31, main_#t~ite30, main_#t~ite29, main_#t~ite34, main_#t~ite33, main_#t~ite32, main_#t~ite37, main_#t~ite36, main_#t~ite35, main_#t~ite40, main_#t~ite39, main_#t~ite38, main_#t~ite43, main_#t~ite42, main_#t~ite41, main_#t~ite46, main_#t~ite45, main_#t~ite44, main_#t~ite47, main_~#t1589~0, main_~#t1590~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call main_~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, main_~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc main_#t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call main_~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, main_~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L725] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$w_buff0_used~0 % 256) then 1 else 0); [L725] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite11=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc main_#t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 main_#t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 main_#t~ite20 := main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite19=2, main_#t~ite20=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := main_#t~ite20; [L772] -1 havoc main_#t~ite20; [L772] -1 havoc main_#t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 main_#t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := main_#t~ite21; [L773] -1 havoc main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 main_#t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite22=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := main_#t~ite22; [L774] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 main_#t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := main_#t~ite23; [L775] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 main_#t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := main_#t~ite24; [L776] -1 havoc main_#t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet25!base + main_#t~nondet25!offset then 0 else 1); [L779] -1 havoc main_#t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet26!base + main_#t~nondet26!offset then 0 else 1); [L780] -1 havoc main_#t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 main_#t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite28=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := main_#t~ite28; [L783] -1 havoc main_#t~ite28; [L783] -1 havoc main_#t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 main_#t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite31=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := main_#t~ite31; [L784] -1 havoc main_#t~ite31; [L784] -1 havoc main_#t~ite30; [L784] -1 havoc main_#t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 main_#t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite34=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := main_#t~ite34; [L785] -1 havoc main_#t~ite34; [L785] -1 havoc main_#t~ite32; [L785] -1 havoc main_#t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 main_#t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite37=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := main_#t~ite37; [L786] -1 havoc main_#t~ite35; [L786] -1 havoc main_#t~ite37; [L786] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 main_#t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := main_#t~ite40; [L787] -1 havoc main_#t~ite39; [L787] -1 havoc main_#t~ite40; [L787] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 main_#t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite43=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := main_#t~ite43; [L788] -1 havoc main_#t~ite42; [L788] -1 havoc main_#t~ite41; [L788] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 main_#t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := main_#t~ite46; [L789] -1 havoc main_#t~ite44; [L789] -1 havoc main_#t~ite46; [L789] -1 havoc main_#t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 main_#t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=2, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := main_#t~ite47; [L791] -1 havoc main_#t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L794] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1589~0!base=6, main_~#t1589~0!offset=0, main_~#t1590~0!base=5, main_~#t1590~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call ~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, ~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc #t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call ~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, ~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc #t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 #t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 #t~ite20 := #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := #t~ite20; [L772] -1 havoc #t~ite20; [L772] -1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 #t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := #t~ite21; [L773] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 #t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := #t~ite22; [L774] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 #t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := #t~ite23; [L775] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 #t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := #t~ite24; [L776] -1 havoc #t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == #t~nondet25!base + #t~nondet25!offset then 0 else 1); [L779] -1 havoc #t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == #t~nondet26!base + #t~nondet26!offset then 0 else 1); [L780] -1 havoc #t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 #t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := #t~ite28; [L783] -1 havoc #t~ite28; [L783] -1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 #t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := #t~ite31; [L784] -1 havoc #t~ite31; [L784] -1 havoc #t~ite30; [L784] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 #t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := #t~ite34; [L785] -1 havoc #t~ite34; [L785] -1 havoc #t~ite32; [L785] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 #t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := #t~ite37; [L786] -1 havoc #t~ite35; [L786] -1 havoc #t~ite37; [L786] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 #t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := #t~ite40; [L787] -1 havoc #t~ite39; [L787] -1 havoc #t~ite40; [L787] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 #t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := #t~ite43; [L788] -1 havoc #t~ite42; [L788] -1 havoc #t~ite41; [L788] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 #t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := #t~ite46; [L789] -1 havoc #t~ite44; [L789] -1 havoc #t~ite46; [L789] -1 havoc #t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 #t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := #t~ite47; [L791] -1 havoc #t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L675] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L676] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L677] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L679] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L680] -1 ~x$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x~0=0] [L681] -1 ~x$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x~0=0] [L682] -1 ~x$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x~0=0] [L683] -1 ~x$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x~0=0] [L684] -1 ~x$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x~0=0] [L685] -1 ~x$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x~0=0] [L686] -1 ~x$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x~0=0] [L687] -1 ~x$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x~0=0] [L688] -1 ~x$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed~0=0, ~x~0=0] [L689] -1 ~x$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x~0=0] [L690] -1 ~x$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0~0=0, ~x~0=0] [L691] -1 ~x$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x~0=0] [L692] -1 ~x$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1~0=0, ~x~0=0] [L693] -1 ~x$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0] [L695] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L696] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L697] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L763] FCALL -1 call ~#t1589~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FCALL -1 call write~int(0, ~#t1589~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L764] -1 havoc #t~nondet17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L765] FCALL -1 call ~#t1590~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FCALL -1 call write~int(1, ~#t1590~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L766] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=0, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L718-L751] 0 ~arg := #in~arg; [L721] 0 ~x$w_buff1~0 := ~x$w_buff0~0; [L722] 0 ~x$w_buff0~0 := 2; [L723] 0 ~x$w_buff1_used~0 := ~x$w_buff0_used~0; [L724] 0 ~x$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=0, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=0] [L726] 0 ~x$r_buff1_thd0~0 := ~x$r_buff0_thd0~0; [L727] 0 ~x$r_buff1_thd1~0 := ~x$r_buff0_thd1~0; [L728] 0 ~x$r_buff1_thd2~0 := ~x$r_buff0_thd2~0; [L729] 0 ~x$r_buff0_thd2~0 := 1; [L732] 0 ~y~0 := 1; [L735] 0 ~__unbuffered_p1_EAX~0 := ~y~0; [L738] 0 ~__unbuffered_p1_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=0, ~y~0=1] [L698-L717] 1 ~arg := #in~arg; [L701] 1 ~y~0 := 2; [L704] 1 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] COND FALSE 1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256) [L707] 1 #t~ite3 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 #t~ite4 := #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite3=1, #t~ite4=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L707] 1 ~x~0 := #t~ite4; [L707] 1 havoc #t~ite4; [L707] 1 havoc #t~ite3; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L708] 1 #t~ite5 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L708] 1 ~x$w_buff0_used~0 := #t~ite5; [L708] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L709] 1 #t~ite6 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L709] 1 ~x$w_buff1_used~0 := #t~ite6; [L709] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] COND FALSE 1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) [L710] 1 #t~ite7 := ~x$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L710] 1 ~x$r_buff0_thd1~0 := #t~ite7; [L710] 1 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] COND FALSE 1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd1~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd1~0 % 256)) [L711] 1 #t~ite8 := ~x$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L711] 1 ~x$r_buff1_thd1~0 := #t~ite8; [L711] 1 havoc #t~ite8; [L714] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L741] 0 #t~ite11 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=1, ~y~0=2] [L741] 0 ~x~0 := #t~ite11; [L741] 0 havoc #t~ite11; [L741] 0 havoc #t~ite10; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] COND TRUE 0 0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256 [L742] 0 #t~ite12 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=1, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L742] 0 ~x$w_buff0_used~0 := #t~ite12; [L742] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L743] 0 #t~ite13 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L743] 0 ~x$w_buff1_used~0 := #t~ite13; [L743] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] COND FALSE 0 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) [L744] 0 #t~ite14 := ~x$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L744] 0 ~x$r_buff0_thd2~0 := #t~ite14; [L744] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] COND FALSE 0 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd2~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd2~0 % 256)) [L745] 0 #t~ite15 := ~x$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L745] 0 ~x$r_buff1_thd2~0 := #t~ite15; [L745] 0 havoc #t~ite15; [L748] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L766] -1 havoc #t~nondet18; [L768] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L770] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] COND FALSE -1 !(0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256) [L772] -1 #t~ite19 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 #t~ite20 := #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L772] -1 ~x~0 := #t~ite20; [L772] -1 havoc #t~ite20; [L772] -1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L773] -1 #t~ite21 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L773] -1 ~x$w_buff0_used~0 := #t~ite21; [L773] -1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L774] -1 #t~ite22 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L774] -1 ~x$w_buff1_used~0 := #t~ite22; [L774] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] COND FALSE -1 !(0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) [L775] -1 #t~ite23 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L775] -1 ~x$r_buff0_thd0~0 := #t~ite23; [L775] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] COND FALSE -1 !((0 != ~x$w_buff0_used~0 % 256 && 0 != ~x$r_buff0_thd0~0 % 256) || (0 != ~x$w_buff1_used~0 % 256 && 0 != ~x$r_buff1_thd0~0 % 256)) [L776] -1 #t~ite24 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x$flush_delayed~0=0, ~x$mem_tmp~0=0, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L776] -1 ~x$r_buff1_thd0~0 := #t~ite24; [L776] -1 havoc #t~ite24; [L779] -1 ~weak$$choice0~0 := (if 0 == #t~nondet25!base + #t~nondet25!offset then 0 else 1); [L779] -1 havoc #t~nondet25; [L780] -1 ~weak$$choice2~0 := (if 0 == #t~nondet26!base + #t~nondet26!offset then 0 else 1); [L780] -1 havoc #t~nondet26; [L781] -1 ~x$flush_delayed~0 := ~weak$$choice2~0; [L782] -1 ~x$mem_tmp~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] COND TRUE -1 (0 == ~x$w_buff0_used~0 % 256 || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$w_buff1_used~0 % 256)) || (0 == ~x$r_buff0_thd0~0 % 256 && 0 == ~x$r_buff1_thd0~0 % 256) [L783] -1 #t~ite28 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L783] -1 ~x~0 := #t~ite28; [L783] -1 havoc #t~ite28; [L783] -1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L784] -1 #t~ite31 := ~x$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L784] -1 ~x$w_buff0~0 := #t~ite31; [L784] -1 havoc #t~ite31; [L784] -1 havoc #t~ite30; [L784] -1 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L785] -1 #t~ite34 := ~x$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L785] -1 ~x$w_buff1~0 := #t~ite34; [L785] -1 havoc #t~ite34; [L785] -1 havoc #t~ite32; [L785] -1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L786] -1 #t~ite37 := ~x$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L786] -1 ~x$w_buff0_used~0 := #t~ite37; [L786] -1 havoc #t~ite35; [L786] -1 havoc #t~ite37; [L786] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L787] -1 #t~ite40 := ~x$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L787] -1 ~x$w_buff1_used~0 := #t~ite40; [L787] -1 havoc #t~ite39; [L787] -1 havoc #t~ite40; [L787] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L788] -1 #t~ite43 := ~x$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L788] -1 ~x$r_buff0_thd0~0 := #t~ite43; [L788] -1 havoc #t~ite42; [L788] -1 havoc #t~ite41; [L788] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L789] -1 #t~ite46 := ~x$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L789] -1 ~x$r_buff1_thd0~0 := #t~ite46; [L789] -1 havoc #t~ite44; [L789] -1 havoc #t~ite46; [L789] -1 havoc #t~ite45; [L790] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((2 == ~x~0 && 2 == ~y~0) && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] COND TRUE -1 0 != ~x$flush_delayed~0 % 256 [L791] -1 #t~ite47 := ~x$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=1, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L791] -1 ~x~0 := #t~ite47; [L791] -1 havoc #t~ite47; [L792] -1 ~x$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x$flush_delayed~0=0, ~x$mem_tmp~0=2, ~x$r_buff0_thd0~0=0, ~x$r_buff0_thd1~0=0, ~x$r_buff0_thd2~0=1, ~x$r_buff1_thd0~0=0, ~x$r_buff1_thd1~0=0, ~x$r_buff1_thd2~0=0, ~x$read_delayed_var~0!base=0, ~x$read_delayed_var~0!offset=0, ~x$read_delayed~0=0, ~x$w_buff0_used~0=0, ~x$w_buff0~0=2, ~x$w_buff1_used~0=0, ~x$w_buff1~0=0, ~x~0=2, ~y~0=2] [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L681] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L682] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L683] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L684] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L685] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L686] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L687] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L688] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L689] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L690] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L691] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L692] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L693] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L695] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L763] -1 pthread_t t1589; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L764] FCALL, FORK -1 pthread_create(&t1589, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] -1 pthread_t t1590; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L766] FCALL, FORK -1 pthread_create(&t1590, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L721] 0 x$w_buff1 = x$w_buff0 [L722] 0 x$w_buff0 = 2 [L723] 0 x$w_buff1_used = x$w_buff0_used [L724] 0 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L726] 0 x$r_buff1_thd0 = x$r_buff0_thd0 [L727] 0 x$r_buff1_thd1 = x$r_buff0_thd1 [L728] 0 x$r_buff1_thd2 = x$r_buff0_thd2 [L729] 0 x$r_buff0_thd2 = (_Bool)1 [L732] 0 y = 1 [L735] 0 __unbuffered_p1_EAX = y [L738] 0 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L701] 1 y = 2 [L704] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L708] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L708] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L709] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L709] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L710] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L710] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L711] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L711] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L742] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L743] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L743] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L744] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L744] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L745] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L745] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L748] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L768] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L773] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L773] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L774] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L774] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L775] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L775] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L776] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L776] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L779] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L780] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L781] -1 x$flush_delayed = weak$$choice2 [L782] -1 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] EXPR -1 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] -1 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L784] EXPR -1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L784] -1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L785] EXPR -1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] -1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L786] EXPR -1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] -1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L787] EXPR -1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] -1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L788] EXPR -1 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] -1 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L789] EXPR -1 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] -1 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L790] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] EXPR -1 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] -1 x = x$flush_delayed ? x$mem_tmp : x [L792] -1 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] ----- [2018-11-23 15:53:23,292 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_85739585-ba12-48cd-bda0-e5e259e55d48/bin-2019/uautomizer/witness.graphml [2018-11-23 15:53:23,293 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 15:53:23,293 INFO L168 Benchmark]: Toolchain (without parser) took 25763.67 ms. Allocated memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: 1.9 GB). Free memory was 956.6 MB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,294 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 15:53:23,295 INFO L168 Benchmark]: CACSL2BoogieTranslator took 508.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -163.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,295 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,295 INFO L168 Benchmark]: Boogie Preprocessor took 34.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,296 INFO L168 Benchmark]: RCFGBuilder took 593.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,296 INFO L168 Benchmark]: TraceAbstraction took 20170.25 ms. Allocated memory was 1.2 GB in the beginning and 2.4 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 936.3 MB in the end (delta: 129.3 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,296 INFO L168 Benchmark]: Witness Printer took 4393.47 ms. Allocated memory was 2.4 GB in the beginning and 2.9 GB in the end (delta: 467.1 MB). Free memory was 936.3 MB in the beginning and 2.6 GB in the end (delta: -1.7 GB). Peak memory consumption was 91.3 MB. Max. memory is 11.5 GB. [2018-11-23 15:53:23,298 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 508.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -163.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 59.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 593.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20170.25 ms. Allocated memory was 1.2 GB in the beginning and 2.4 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 936.3 MB in the end (delta: 129.3 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. * Witness Printer took 4393.47 ms. Allocated memory was 2.4 GB in the beginning and 2.9 GB in the end (delta: 467.1 MB). Free memory was 936.3 MB in the beginning and 2.6 GB in the end (delta: -1.7 GB). Peak memory consumption was 91.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L681] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L682] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L683] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L684] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L685] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L686] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L687] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L688] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L689] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L690] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L691] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L692] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L693] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L695] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L696] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L697] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L763] -1 pthread_t t1589; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L764] FCALL, FORK -1 pthread_create(&t1589, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] -1 pthread_t t1590; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L766] FCALL, FORK -1 pthread_create(&t1590, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L721] 0 x$w_buff1 = x$w_buff0 [L722] 0 x$w_buff0 = 2 [L723] 0 x$w_buff1_used = x$w_buff0_used [L724] 0 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L726] 0 x$r_buff1_thd0 = x$r_buff0_thd0 [L727] 0 x$r_buff1_thd1 = x$r_buff0_thd1 [L728] 0 x$r_buff1_thd2 = x$r_buff0_thd2 [L729] 0 x$r_buff0_thd2 = (_Bool)1 [L732] 0 y = 1 [L735] 0 __unbuffered_p1_EAX = y [L738] 0 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L701] 1 y = 2 [L704] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L707] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L708] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L708] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L709] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L709] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L710] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L710] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L711] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L711] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L742] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L743] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L743] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L744] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L744] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L745] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L745] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L748] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L768] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L772] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L773] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L773] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L774] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L774] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L775] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L775] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L776] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L776] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L779] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L780] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L781] -1 x$flush_delayed = weak$$choice2 [L782] -1 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] EXPR -1 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] -1 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L784] EXPR -1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L784] -1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L785] EXPR -1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] -1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L786] EXPR -1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] -1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L787] EXPR -1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] -1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L788] EXPR -1 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] -1 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L789] EXPR -1 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] -1 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L790] -1 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] EXPR -1 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L791] -1 x = x$flush_delayed ? x$mem_tmp : x [L792] -1 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 180 locations, 3 error locations. UNSAFE Result, 20.0s OverallTime, 26 OverallIterations, 1 TraceHistogramMax, 8.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6080 SDtfs, 5517 SDslu, 13055 SDs, 0 SdLazy, 6535 SolverSat, 359 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 254 GetRequests, 67 SyntacticMatches, 22 SemanticMatches, 165 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=37142occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 80470 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 2098 NumberOfCodeBlocks, 2098 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1978 ConstructedInterpolants, 0 QuantifiedInterpolants, 417831 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...