./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi004_rmo.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi004_rmo.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fcb329b6c3e1844226c37897e0522d1de6ff320a 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-22 23:17:53,128 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-22 23:17:53,129 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-22 23:17:53,136 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-22 23:17:53,137 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-22 23:17:53,137 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-22 23:17:53,138 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-22 23:17:53,139 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-22 23:17:53,140 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-22 23:17:53,141 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-22 23:17:53,142 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-22 23:17:53,142 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-22 23:17:53,142 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-22 23:17:53,143 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-22 23:17:53,144 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-22 23:17:53,144 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-22 23:17:53,145 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-22 23:17:53,146 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-22 23:17:53,147 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-22 23:17:53,148 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-22 23:17:53,149 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-22 23:17:53,150 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-22 23:17:53,152 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-22 23:17:53,152 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-22 23:17:53,152 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-22 23:17:53,153 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-22 23:17:53,154 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-22 23:17:53,154 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-22 23:17:53,155 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-22 23:17:53,155 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-22 23:17:53,156 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-22 23:17:53,156 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-22 23:17:53,156 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-22 23:17:53,156 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-22 23:17:53,157 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-22 23:17:53,157 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-22 23:17:53,157 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-22 23:17:53,165 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-22 23:17:53,165 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-22 23:17:53,166 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-22 23:17:53,166 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-22 23:17:53,166 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-22 23:17:53,166 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * Use SBE=true [2018-11-22 23:17:53,167 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-22 23:17:53,167 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-22 23:17:53,168 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-22 23:17:53,168 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 23:17:53,169 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-22 23:17:53,169 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-22 23:17:53,170 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-22 23:17:53,170 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-22 23:17:53,170 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-22 23:17:53,170 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fcb329b6c3e1844226c37897e0522d1de6ff320a [2018-11-22 23:17:53,195 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-22 23:17:53,205 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-22 23:17:53,207 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-22 23:17:53,209 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-22 23:17:53,209 INFO L276 PluginConnector]: CDTParser initialized [2018-11-22 23:17:53,210 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi004_rmo.oepc_false-unreach-call.i [2018-11-22 23:17:53,255 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/data/c2dcd178a/e31d634a3e1f43a784c72efc3e2b92f8/FLAGd92140938 [2018-11-22 23:17:53,642 INFO L307 CDTParser]: Found 1 translation units. [2018-11-22 23:17:53,642 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/sv-benchmarks/c/pthread-wmm/rfi004_rmo.oepc_false-unreach-call.i [2018-11-22 23:17:53,653 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/data/c2dcd178a/e31d634a3e1f43a784c72efc3e2b92f8/FLAGd92140938 [2018-11-22 23:17:54,016 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/data/c2dcd178a/e31d634a3e1f43a784c72efc3e2b92f8 [2018-11-22 23:17:54,018 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-22 23:17:54,019 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-22 23:17:54,020 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-22 23:17:54,020 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-22 23:17:54,022 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-22 23:17:54,022 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,024 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60164983 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54, skipping insertion in model container [2018-11-22 23:17:54,024 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,030 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-22 23:17:54,061 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-22 23:17:54,297 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 23:17:54,306 INFO L191 MainTranslator]: Completed pre-run [2018-11-22 23:17:54,405 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 23:17:54,455 INFO L195 MainTranslator]: Completed translation [2018-11-22 23:17:54,455 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54 WrapperNode [2018-11-22 23:17:54,456 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-22 23:17:54,456 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-22 23:17:54,456 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-22 23:17:54,457 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-22 23:17:54,464 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,479 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,497 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-22 23:17:54,497 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-22 23:17:54,497 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-22 23:17:54,497 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-22 23:17:54,503 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,504 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,506 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,506 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,512 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,515 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,517 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... [2018-11-22 23:17:54,520 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-22 23:17:54,521 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-22 23:17:54,521 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-22 23:17:54,521 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-22 23:17:54,522 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-22 23:17:54,565 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-22 23:17:54,565 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-22 23:17:54,566 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-22 23:17:54,566 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-22 23:17:54,566 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-22 23:17:54,566 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-22 23:17:54,567 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-22 23:17:54,953 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-22 23:17:54,953 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-22 23:17:54,954 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 11:17:54 BoogieIcfgContainer [2018-11-22 23:17:54,954 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-22 23:17:54,954 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-22 23:17:54,955 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-22 23:17:54,957 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-22 23:17:54,957 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 11:17:54" (1/3) ... [2018-11-22 23:17:54,958 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34339ce1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 11:17:54, skipping insertion in model container [2018-11-22 23:17:54,958 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 11:17:54" (2/3) ... [2018-11-22 23:17:54,958 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34339ce1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 11:17:54, skipping insertion in model container [2018-11-22 23:17:54,959 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 11:17:54" (3/3) ... [2018-11-22 23:17:54,960 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi004_rmo.oepc_false-unreach-call.i [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,986 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,987 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,991 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,992 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,993 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,996 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,997 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,998 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,999 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,999 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,999 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,999 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:54,999 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,000 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,001 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,002 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,002 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,002 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,002 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,002 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,003 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,003 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,003 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,003 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,003 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,004 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,004 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,004 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,004 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet33.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 23:17:55,008 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-22 23:17:55,008 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-22 23:17:55,013 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-22 23:17:55,024 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-22 23:17:55,041 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-22 23:17:55,041 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-22 23:17:55,042 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-22 23:17:55,042 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-22 23:17:55,042 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-22 23:17:55,042 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-22 23:17:55,042 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-22 23:17:55,042 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-22 23:17:55,042 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-22 23:17:55,052 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 132places, 164 transitions [2018-11-22 23:17:56,556 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 27856 states. [2018-11-22 23:17:56,558 INFO L276 IsEmpty]: Start isEmpty. Operand 27856 states. [2018-11-22 23:17:56,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-22 23:17:56,568 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:17:56,569 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:17:56,571 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:17:56,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:17:56,577 INFO L82 PathProgramCache]: Analyzing trace with hash -31372928, now seen corresponding path program 1 times [2018-11-22 23:17:56,579 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:17:56,579 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:17:56,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:56,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:17:56,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:56,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:17:56,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:17:56,762 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:17:56,762 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 23:17:56,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 23:17:56,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 23:17:56,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:17:56,775 INFO L87 Difference]: Start difference. First operand 27856 states. Second operand 4 states. [2018-11-22 23:17:57,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:17:57,267 INFO L93 Difference]: Finished difference Result 47768 states and 183119 transitions. [2018-11-22 23:17:57,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 23:17:57,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-11-22 23:17:57,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:17:57,553 INFO L225 Difference]: With dead ends: 47768 [2018-11-22 23:17:57,553 INFO L226 Difference]: Without dead ends: 34608 [2018-11-22 23:17:57,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:17:57,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34608 states. [2018-11-22 23:17:58,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34608 to 21756. [2018-11-22 23:17:58,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21756 states. [2018-11-22 23:17:58,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21756 states to 21756 states and 83441 transitions. [2018-11-22 23:17:58,457 INFO L78 Accepts]: Start accepts. Automaton has 21756 states and 83441 transitions. Word has length 39 [2018-11-22 23:17:58,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:17:58,457 INFO L480 AbstractCegarLoop]: Abstraction has 21756 states and 83441 transitions. [2018-11-22 23:17:58,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 23:17:58,458 INFO L276 IsEmpty]: Start isEmpty. Operand 21756 states and 83441 transitions. [2018-11-22 23:17:58,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-22 23:17:58,465 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:17:58,467 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:17:58,468 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:17:58,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:17:58,468 INFO L82 PathProgramCache]: Analyzing trace with hash -954263015, now seen corresponding path program 1 times [2018-11-22 23:17:58,468 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:17:58,468 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:17:58,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:58,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:17:58,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:58,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:17:58,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:17:58,540 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:17:58,540 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 23:17:58,542 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 23:17:58,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 23:17:58,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:17:58,542 INFO L87 Difference]: Start difference. First operand 21756 states and 83441 transitions. Second operand 4 states. [2018-11-22 23:17:58,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:17:58,685 INFO L93 Difference]: Finished difference Result 7170 states and 23626 transitions. [2018-11-22 23:17:58,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 23:17:58,686 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-11-22 23:17:58,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:17:58,704 INFO L225 Difference]: With dead ends: 7170 [2018-11-22 23:17:58,704 INFO L226 Difference]: Without dead ends: 6324 [2018-11-22 23:17:58,705 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:17:58,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6324 states. [2018-11-22 23:17:58,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6324 to 6324. [2018-11-22 23:17:58,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6324 states. [2018-11-22 23:17:58,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6324 states to 6324 states and 20698 transitions. [2018-11-22 23:17:58,858 INFO L78 Accepts]: Start accepts. Automaton has 6324 states and 20698 transitions. Word has length 47 [2018-11-22 23:17:58,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:17:58,858 INFO L480 AbstractCegarLoop]: Abstraction has 6324 states and 20698 transitions. [2018-11-22 23:17:58,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 23:17:58,858 INFO L276 IsEmpty]: Start isEmpty. Operand 6324 states and 20698 transitions. [2018-11-22 23:17:58,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-22 23:17:58,860 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:17:58,860 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:17:58,860 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:17:58,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:17:58,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1367871073, now seen corresponding path program 1 times [2018-11-22 23:17:58,861 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:17:58,861 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:17:58,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:58,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:17:58,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:58,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:17:59,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:17:59,079 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:17:59,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:17:59,079 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:17:59,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:17:59,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:17:59,079 INFO L87 Difference]: Start difference. First operand 6324 states and 20698 transitions. Second operand 5 states. [2018-11-22 23:17:59,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:17:59,403 INFO L93 Difference]: Finished difference Result 12020 states and 38784 transitions. [2018-11-22 23:17:59,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:17:59,404 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 48 [2018-11-22 23:17:59,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:17:59,436 INFO L225 Difference]: With dead ends: 12020 [2018-11-22 23:17:59,437 INFO L226 Difference]: Without dead ends: 11945 [2018-11-22 23:17:59,437 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 23:17:59,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11945 states. [2018-11-22 23:17:59,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11945 to 8289. [2018-11-22 23:17:59,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8289 states. [2018-11-22 23:17:59,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8289 states to 8289 states and 26551 transitions. [2018-11-22 23:17:59,607 INFO L78 Accepts]: Start accepts. Automaton has 8289 states and 26551 transitions. Word has length 48 [2018-11-22 23:17:59,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:17:59,608 INFO L480 AbstractCegarLoop]: Abstraction has 8289 states and 26551 transitions. [2018-11-22 23:17:59,609 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:17:59,609 INFO L276 IsEmpty]: Start isEmpty. Operand 8289 states and 26551 transitions. [2018-11-22 23:17:59,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-22 23:17:59,610 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:17:59,610 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:17:59,610 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:17:59,611 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:17:59,611 INFO L82 PathProgramCache]: Analyzing trace with hash -1372813561, now seen corresponding path program 1 times [2018-11-22 23:17:59,611 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:17:59,611 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:17:59,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:59,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:17:59,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:59,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:17:59,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:17:59,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:17:59,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 23:17:59,639 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 23:17:59,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 23:17:59,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 23:17:59,640 INFO L87 Difference]: Start difference. First operand 8289 states and 26551 transitions. Second operand 3 states. [2018-11-22 23:17:59,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:17:59,703 INFO L93 Difference]: Finished difference Result 10985 states and 34706 transitions. [2018-11-22 23:17:59,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 23:17:59,704 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2018-11-22 23:17:59,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:17:59,725 INFO L225 Difference]: With dead ends: 10985 [2018-11-22 23:17:59,725 INFO L226 Difference]: Without dead ends: 10981 [2018-11-22 23:17:59,725 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 23:17:59,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10981 states. [2018-11-22 23:17:59,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10981 to 8507. [2018-11-22 23:17:59,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8507 states. [2018-11-22 23:17:59,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8507 states to 8507 states and 26987 transitions. [2018-11-22 23:17:59,886 INFO L78 Accepts]: Start accepts. Automaton has 8507 states and 26987 transitions. Word has length 50 [2018-11-22 23:17:59,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:17:59,887 INFO L480 AbstractCegarLoop]: Abstraction has 8507 states and 26987 transitions. [2018-11-22 23:17:59,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 23:17:59,887 INFO L276 IsEmpty]: Start isEmpty. Operand 8507 states and 26987 transitions. [2018-11-22 23:17:59,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-22 23:17:59,888 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:17:59,889 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:17:59,889 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:17:59,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:17:59,889 INFO L82 PathProgramCache]: Analyzing trace with hash 1505170194, now seen corresponding path program 1 times [2018-11-22 23:17:59,889 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:17:59,889 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:17:59,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:59,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:17:59,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:17:59,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:17:59,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:17:59,958 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:17:59,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:17:59,959 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:17:59,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:17:59,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:17:59,959 INFO L87 Difference]: Start difference. First operand 8507 states and 26987 transitions. Second operand 6 states. [2018-11-22 23:18:00,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:00,250 INFO L93 Difference]: Finished difference Result 11923 states and 37198 transitions. [2018-11-22 23:18:00,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-22 23:18:00,250 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2018-11-22 23:18:00,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:00,265 INFO L225 Difference]: With dead ends: 11923 [2018-11-22 23:18:00,266 INFO L226 Difference]: Without dead ends: 11826 [2018-11-22 23:18:00,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-11-22 23:18:00,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11826 states. [2018-11-22 23:18:00,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11826 to 9281. [2018-11-22 23:18:00,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9281 states. [2018-11-22 23:18:00,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9281 states to 9281 states and 29431 transitions. [2018-11-22 23:18:00,494 INFO L78 Accepts]: Start accepts. Automaton has 9281 states and 29431 transitions. Word has length 54 [2018-11-22 23:18:00,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:00,495 INFO L480 AbstractCegarLoop]: Abstraction has 9281 states and 29431 transitions. [2018-11-22 23:18:00,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:00,495 INFO L276 IsEmpty]: Start isEmpty. Operand 9281 states and 29431 transitions. [2018-11-22 23:18:00,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-22 23:18:00,499 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:00,500 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:00,500 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:00,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:00,500 INFO L82 PathProgramCache]: Analyzing trace with hash 2067258406, now seen corresponding path program 1 times [2018-11-22 23:18:00,500 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:00,500 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:00,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:00,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:00,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:00,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:00,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:00,571 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:00,571 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 23:18:00,571 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 23:18:00,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 23:18:00,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:18:00,572 INFO L87 Difference]: Start difference. First operand 9281 states and 29431 transitions. Second operand 4 states. [2018-11-22 23:18:00,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:00,667 INFO L93 Difference]: Finished difference Result 10900 states and 34382 transitions. [2018-11-22 23:18:00,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 23:18:00,668 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2018-11-22 23:18:00,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:00,681 INFO L225 Difference]: With dead ends: 10900 [2018-11-22 23:18:00,681 INFO L226 Difference]: Without dead ends: 10900 [2018-11-22 23:18:00,681 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:00,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10900 states. [2018-11-22 23:18:00,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10900 to 9932. [2018-11-22 23:18:00,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9932 states. [2018-11-22 23:18:00,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9932 states to 9932 states and 31408 transitions. [2018-11-22 23:18:00,801 INFO L78 Accepts]: Start accepts. Automaton has 9932 states and 31408 transitions. Word has length 64 [2018-11-22 23:18:00,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:00,801 INFO L480 AbstractCegarLoop]: Abstraction has 9932 states and 31408 transitions. [2018-11-22 23:18:00,801 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 23:18:00,801 INFO L276 IsEmpty]: Start isEmpty. Operand 9932 states and 31408 transitions. [2018-11-22 23:18:00,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-22 23:18:00,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:00,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:00,809 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:00,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:00,809 INFO L82 PathProgramCache]: Analyzing trace with hash -484898555, now seen corresponding path program 1 times [2018-11-22 23:18:00,810 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:00,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:00,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:00,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:00,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:00,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:00,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:00,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:00,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:00,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:00,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:00,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:00,870 INFO L87 Difference]: Start difference. First operand 9932 states and 31408 transitions. Second operand 6 states. [2018-11-22 23:18:01,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:01,229 INFO L93 Difference]: Finished difference Result 21763 states and 67780 transitions. [2018-11-22 23:18:01,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-22 23:18:01,229 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2018-11-22 23:18:01,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:01,256 INFO L225 Difference]: With dead ends: 21763 [2018-11-22 23:18:01,256 INFO L226 Difference]: Without dead ends: 21699 [2018-11-22 23:18:01,257 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-22 23:18:01,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21699 states. [2018-11-22 23:18:01,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21699 to 13157. [2018-11-22 23:18:01,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13157 states. [2018-11-22 23:18:01,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13157 states to 13157 states and 40989 transitions. [2018-11-22 23:18:01,488 INFO L78 Accepts]: Start accepts. Automaton has 13157 states and 40989 transitions. Word has length 64 [2018-11-22 23:18:01,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:01,489 INFO L480 AbstractCegarLoop]: Abstraction has 13157 states and 40989 transitions. [2018-11-22 23:18:01,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:01,489 INFO L276 IsEmpty]: Start isEmpty. Operand 13157 states and 40989 transitions. [2018-11-22 23:18:01,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-22 23:18:01,496 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:01,497 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:01,497 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:01,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:01,497 INFO L82 PathProgramCache]: Analyzing trace with hash 708445986, now seen corresponding path program 1 times [2018-11-22 23:18:01,497 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:01,497 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:01,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:01,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:01,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:01,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:01,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:01,555 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:01,555 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:18:01,556 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:18:01,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:18:01,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:01,556 INFO L87 Difference]: Start difference. First operand 13157 states and 40989 transitions. Second operand 5 states. [2018-11-22 23:18:01,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:01,804 INFO L93 Difference]: Finished difference Result 19275 states and 58649 transitions. [2018-11-22 23:18:01,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 23:18:01,804 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2018-11-22 23:18:01,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:01,831 INFO L225 Difference]: With dead ends: 19275 [2018-11-22 23:18:01,831 INFO L226 Difference]: Without dead ends: 19275 [2018-11-22 23:18:01,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:01,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19275 states. [2018-11-22 23:18:02,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19275 to 14988. [2018-11-22 23:18:02,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14988 states. [2018-11-22 23:18:02,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14988 states to 14988 states and 46076 transitions. [2018-11-22 23:18:02,047 INFO L78 Accepts]: Start accepts. Automaton has 14988 states and 46076 transitions. Word has length 66 [2018-11-22 23:18:02,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:02,048 INFO L480 AbstractCegarLoop]: Abstraction has 14988 states and 46076 transitions. [2018-11-22 23:18:02,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:18:02,048 INFO L276 IsEmpty]: Start isEmpty. Operand 14988 states and 46076 transitions. [2018-11-22 23:18:02,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-22 23:18:02,059 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:02,059 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:02,060 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:02,060 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:02,060 INFO L82 PathProgramCache]: Analyzing trace with hash 497095073, now seen corresponding path program 1 times [2018-11-22 23:18:02,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:02,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:02,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:02,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:02,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:02,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:02,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:02,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:02,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 23:18:02,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 23:18:02,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 23:18:02,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:18:02,124 INFO L87 Difference]: Start difference. First operand 14988 states and 46076 transitions. Second operand 4 states. [2018-11-22 23:18:02,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:02,392 INFO L93 Difference]: Finished difference Result 18810 states and 57063 transitions. [2018-11-22 23:18:02,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 23:18:02,392 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-22 23:18:02,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:02,413 INFO L225 Difference]: With dead ends: 18810 [2018-11-22 23:18:02,413 INFO L226 Difference]: Without dead ends: 18810 [2018-11-22 23:18:02,413 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:18:02,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18810 states. [2018-11-22 23:18:02,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18810 to 15263. [2018-11-22 23:18:02,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15263 states. [2018-11-22 23:18:02,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15263 states to 15263 states and 46864 transitions. [2018-11-22 23:18:02,586 INFO L78 Accepts]: Start accepts. Automaton has 15263 states and 46864 transitions. Word has length 66 [2018-11-22 23:18:02,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:02,586 INFO L480 AbstractCegarLoop]: Abstraction has 15263 states and 46864 transitions. [2018-11-22 23:18:02,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 23:18:02,587 INFO L276 IsEmpty]: Start isEmpty. Operand 15263 states and 46864 transitions. [2018-11-22 23:18:02,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-22 23:18:02,594 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:02,594 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:02,594 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:02,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:02,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1580114270, now seen corresponding path program 1 times [2018-11-22 23:18:02,594 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:02,595 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:02,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:02,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:02,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:02,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:02,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:02,649 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:02,649 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 23:18:02,649 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 23:18:02,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 23:18:02,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 23:18:02,649 INFO L87 Difference]: Start difference. First operand 15263 states and 46864 transitions. Second operand 3 states. [2018-11-22 23:18:02,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:02,817 INFO L93 Difference]: Finished difference Result 15699 states and 48054 transitions. [2018-11-22 23:18:02,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 23:18:02,818 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2018-11-22 23:18:02,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:02,836 INFO L225 Difference]: With dead ends: 15699 [2018-11-22 23:18:02,836 INFO L226 Difference]: Without dead ends: 15699 [2018-11-22 23:18:02,836 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 23:18:02,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15699 states. [2018-11-22 23:18:02,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15699 to 15481. [2018-11-22 23:18:02,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15481 states. [2018-11-22 23:18:03,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15481 states to 15481 states and 47432 transitions. [2018-11-22 23:18:03,002 INFO L78 Accepts]: Start accepts. Automaton has 15481 states and 47432 transitions. Word has length 66 [2018-11-22 23:18:03,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:03,002 INFO L480 AbstractCegarLoop]: Abstraction has 15481 states and 47432 transitions. [2018-11-22 23:18:03,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 23:18:03,002 INFO L276 IsEmpty]: Start isEmpty. Operand 15481 states and 47432 transitions. [2018-11-22 23:18:03,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:03,011 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:03,011 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:03,011 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:03,011 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:03,011 INFO L82 PathProgramCache]: Analyzing trace with hash -1496622296, now seen corresponding path program 1 times [2018-11-22 23:18:03,012 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:03,012 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:03,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:03,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:03,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:03,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:03,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:03,112 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:03,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:03,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:03,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:03,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:03,113 INFO L87 Difference]: Start difference. First operand 15481 states and 47432 transitions. Second operand 6 states. [2018-11-22 23:18:03,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:03,604 INFO L93 Difference]: Finished difference Result 18701 states and 56367 transitions. [2018-11-22 23:18:03,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:18:03,604 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2018-11-22 23:18:03,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:03,624 INFO L225 Difference]: With dead ends: 18701 [2018-11-22 23:18:03,624 INFO L226 Difference]: Without dead ends: 18701 [2018-11-22 23:18:03,625 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:03,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18701 states. [2018-11-22 23:18:03,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18701 to 17377. [2018-11-22 23:18:03,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17377 states. [2018-11-22 23:18:03,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17377 states to 17377 states and 52698 transitions. [2018-11-22 23:18:03,811 INFO L78 Accepts]: Start accepts. Automaton has 17377 states and 52698 transitions. Word has length 68 [2018-11-22 23:18:03,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:03,811 INFO L480 AbstractCegarLoop]: Abstraction has 17377 states and 52698 transitions. [2018-11-22 23:18:03,811 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:03,811 INFO L276 IsEmpty]: Start isEmpty. Operand 17377 states and 52698 transitions. [2018-11-22 23:18:03,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:03,821 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:03,821 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:03,821 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:03,821 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:03,822 INFO L82 PathProgramCache]: Analyzing trace with hash 721135657, now seen corresponding path program 1 times [2018-11-22 23:18:03,822 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:03,822 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:03,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:03,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:03,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:03,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:03,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:03,930 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:03,930 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:03,930 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:03,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:03,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:03,931 INFO L87 Difference]: Start difference. First operand 17377 states and 52698 transitions. Second operand 6 states. [2018-11-22 23:18:04,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:04,249 INFO L93 Difference]: Finished difference Result 19150 states and 57148 transitions. [2018-11-22 23:18:04,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 23:18:04,250 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2018-11-22 23:18:04,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:04,270 INFO L225 Difference]: With dead ends: 19150 [2018-11-22 23:18:04,270 INFO L226 Difference]: Without dead ends: 19150 [2018-11-22 23:18:04,271 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-22 23:18:04,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19150 states. [2018-11-22 23:18:04,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19150 to 17509. [2018-11-22 23:18:04,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2018-11-22 23:18:04,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 52637 transitions. [2018-11-22 23:18:04,458 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 52637 transitions. Word has length 68 [2018-11-22 23:18:04,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:04,458 INFO L480 AbstractCegarLoop]: Abstraction has 17509 states and 52637 transitions. [2018-11-22 23:18:04,459 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:04,459 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 52637 transitions. [2018-11-22 23:18:04,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:04,468 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:04,468 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:04,469 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:04,469 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:04,469 INFO L82 PathProgramCache]: Analyzing trace with hash 932486570, now seen corresponding path program 1 times [2018-11-22 23:18:04,469 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:04,469 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:04,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:04,470 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:04,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:04,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:04,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:04,529 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:04,529 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:18:04,530 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:18:04,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:18:04,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:04,530 INFO L87 Difference]: Start difference. First operand 17509 states and 52637 transitions. Second operand 5 states. [2018-11-22 23:18:04,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:04,751 INFO L93 Difference]: Finished difference Result 21589 states and 64352 transitions. [2018-11-22 23:18:04,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:18:04,751 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2018-11-22 23:18:04,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:04,775 INFO L225 Difference]: With dead ends: 21589 [2018-11-22 23:18:04,775 INFO L226 Difference]: Without dead ends: 21589 [2018-11-22 23:18:04,775 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:04,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21589 states. [2018-11-22 23:18:04,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21589 to 18595. [2018-11-22 23:18:04,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18595 states. [2018-11-22 23:18:04,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18595 states to 18595 states and 55396 transitions. [2018-11-22 23:18:04,979 INFO L78 Accepts]: Start accepts. Automaton has 18595 states and 55396 transitions. Word has length 68 [2018-11-22 23:18:04,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:04,979 INFO L480 AbstractCegarLoop]: Abstraction has 18595 states and 55396 transitions. [2018-11-22 23:18:04,979 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:18:04,979 INFO L276 IsEmpty]: Start isEmpty. Operand 18595 states and 55396 transitions. [2018-11-22 23:18:04,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:04,990 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:04,990 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:04,990 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:04,990 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:04,990 INFO L82 PathProgramCache]: Analyzing trace with hash 421952393, now seen corresponding path program 1 times [2018-11-22 23:18:04,990 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:04,990 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:04,991 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:04,991 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:04,991 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:04,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:05,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:05,059 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:05,059 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:18:05,059 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:18:05,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:18:05,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:05,060 INFO L87 Difference]: Start difference. First operand 18595 states and 55396 transitions. Second operand 5 states. [2018-11-22 23:18:05,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:05,341 INFO L93 Difference]: Finished difference Result 27216 states and 80202 transitions. [2018-11-22 23:18:05,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 23:18:05,341 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2018-11-22 23:18:05,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:05,373 INFO L225 Difference]: With dead ends: 27216 [2018-11-22 23:18:05,373 INFO L226 Difference]: Without dead ends: 27216 [2018-11-22 23:18:05,373 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 23:18:05,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27216 states. [2018-11-22 23:18:05,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27216 to 21398. [2018-11-22 23:18:05,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21398 states. [2018-11-22 23:18:05,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21398 states to 21398 states and 63361 transitions. [2018-11-22 23:18:05,633 INFO L78 Accepts]: Start accepts. Automaton has 21398 states and 63361 transitions. Word has length 68 [2018-11-22 23:18:05,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:05,633 INFO L480 AbstractCegarLoop]: Abstraction has 21398 states and 63361 transitions. [2018-11-22 23:18:05,633 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:18:05,633 INFO L276 IsEmpty]: Start isEmpty. Operand 21398 states and 63361 transitions. [2018-11-22 23:18:05,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:05,645 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:05,645 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:05,645 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:05,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:05,646 INFO L82 PathProgramCache]: Analyzing trace with hash -1385502070, now seen corresponding path program 1 times [2018-11-22 23:18:05,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:05,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:05,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:05,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:05,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:05,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:05,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:05,717 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:05,717 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:05,717 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:05,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:05,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:05,718 INFO L87 Difference]: Start difference. First operand 21398 states and 63361 transitions. Second operand 6 states. [2018-11-22 23:18:06,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:06,189 INFO L93 Difference]: Finished difference Result 35018 states and 103808 transitions. [2018-11-22 23:18:06,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 23:18:06,190 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2018-11-22 23:18:06,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:06,243 INFO L225 Difference]: With dead ends: 35018 [2018-11-22 23:18:06,243 INFO L226 Difference]: Without dead ends: 35018 [2018-11-22 23:18:06,244 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-22 23:18:06,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35018 states. [2018-11-22 23:18:06,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35018 to 27706. [2018-11-22 23:18:06,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27706 states. [2018-11-22 23:18:06,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27706 states to 27706 states and 83160 transitions. [2018-11-22 23:18:06,740 INFO L78 Accepts]: Start accepts. Automaton has 27706 states and 83160 transitions. Word has length 68 [2018-11-22 23:18:06,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:06,741 INFO L480 AbstractCegarLoop]: Abstraction has 27706 states and 83160 transitions. [2018-11-22 23:18:06,741 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:06,741 INFO L276 IsEmpty]: Start isEmpty. Operand 27706 states and 83160 transitions. [2018-11-22 23:18:06,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:06,755 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:06,755 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:06,755 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:06,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:06,755 INFO L82 PathProgramCache]: Analyzing trace with hash -497998389, now seen corresponding path program 1 times [2018-11-22 23:18:06,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:06,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:06,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:06,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:06,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:06,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:06,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:06,792 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:06,792 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 23:18:06,793 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 23:18:06,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 23:18:06,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 23:18:06,793 INFO L87 Difference]: Start difference. First operand 27706 states and 83160 transitions. Second operand 4 states. [2018-11-22 23:18:07,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:07,076 INFO L93 Difference]: Finished difference Result 30486 states and 90397 transitions. [2018-11-22 23:18:07,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 23:18:07,077 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2018-11-22 23:18:07,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:07,113 INFO L225 Difference]: With dead ends: 30486 [2018-11-22 23:18:07,113 INFO L226 Difference]: Without dead ends: 29906 [2018-11-22 23:18:07,113 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:07,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29906 states. [2018-11-22 23:18:07,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29906 to 27610. [2018-11-22 23:18:07,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27610 states. [2018-11-22 23:18:07,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27610 states to 27610 states and 82079 transitions. [2018-11-22 23:18:07,434 INFO L78 Accepts]: Start accepts. Automaton has 27610 states and 82079 transitions. Word has length 68 [2018-11-22 23:18:07,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:07,434 INFO L480 AbstractCegarLoop]: Abstraction has 27610 states and 82079 transitions. [2018-11-22 23:18:07,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 23:18:07,434 INFO L276 IsEmpty]: Start isEmpty. Operand 27610 states and 82079 transitions. [2018-11-22 23:18:07,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:07,447 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:07,448 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:07,448 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:07,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:07,448 INFO L82 PathProgramCache]: Analyzing trace with hash 1112513867, now seen corresponding path program 1 times [2018-11-22 23:18:07,448 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:07,448 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:07,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:07,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:07,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:07,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:07,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:07,541 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:07,541 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-22 23:18:07,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-22 23:18:07,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-22 23:18:07,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-22 23:18:07,542 INFO L87 Difference]: Start difference. First operand 27610 states and 82079 transitions. Second operand 9 states. [2018-11-22 23:18:07,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:07,919 INFO L93 Difference]: Finished difference Result 34850 states and 102928 transitions. [2018-11-22 23:18:07,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-22 23:18:07,919 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 68 [2018-11-22 23:18:07,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:07,959 INFO L225 Difference]: With dead ends: 34850 [2018-11-22 23:18:07,959 INFO L226 Difference]: Without dead ends: 34850 [2018-11-22 23:18:07,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-22 23:18:07,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34850 states. [2018-11-22 23:18:08,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34850 to 29288. [2018-11-22 23:18:08,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29288 states. [2018-11-22 23:18:08,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29288 states to 29288 states and 87100 transitions. [2018-11-22 23:18:08,291 INFO L78 Accepts]: Start accepts. Automaton has 29288 states and 87100 transitions. Word has length 68 [2018-11-22 23:18:08,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:08,291 INFO L480 AbstractCegarLoop]: Abstraction has 29288 states and 87100 transitions. [2018-11-22 23:18:08,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-22 23:18:08,291 INFO L276 IsEmpty]: Start isEmpty. Operand 29288 states and 87100 transitions. [2018-11-22 23:18:08,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-22 23:18:08,305 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:08,305 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:08,305 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:08,305 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:08,305 INFO L82 PathProgramCache]: Analyzing trace with hash 2000017548, now seen corresponding path program 1 times [2018-11-22 23:18:08,306 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:08,306 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:08,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:08,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:08,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:08,350 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:08,350 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:18:08,350 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:18:08,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:18:08,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:08,352 INFO L87 Difference]: Start difference. First operand 29288 states and 87100 transitions. Second operand 5 states. [2018-11-22 23:18:08,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:08,396 INFO L93 Difference]: Finished difference Result 7664 states and 18502 transitions. [2018-11-22 23:18:08,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 23:18:08,397 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2018-11-22 23:18:08,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:08,404 INFO L225 Difference]: With dead ends: 7664 [2018-11-22 23:18:08,404 INFO L226 Difference]: Without dead ends: 5913 [2018-11-22 23:18:08,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:08,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5913 states. [2018-11-22 23:18:08,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5913 to 4971. [2018-11-22 23:18:08,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4971 states. [2018-11-22 23:18:08,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4971 states to 4971 states and 11771 transitions. [2018-11-22 23:18:08,463 INFO L78 Accepts]: Start accepts. Automaton has 4971 states and 11771 transitions. Word has length 68 [2018-11-22 23:18:08,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:08,463 INFO L480 AbstractCegarLoop]: Abstraction has 4971 states and 11771 transitions. [2018-11-22 23:18:08,463 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:18:08,464 INFO L276 IsEmpty]: Start isEmpty. Operand 4971 states and 11771 transitions. [2018-11-22 23:18:08,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-22 23:18:08,469 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:08,469 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:08,470 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:08,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:08,470 INFO L82 PathProgramCache]: Analyzing trace with hash -427244149, now seen corresponding path program 1 times [2018-11-22 23:18:08,470 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:08,470 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:08,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:08,589 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:08,589 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:08,590 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:08,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:08,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:08,590 INFO L87 Difference]: Start difference. First operand 4971 states and 11771 transitions. Second operand 6 states. [2018-11-22 23:18:08,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:08,766 INFO L93 Difference]: Finished difference Result 6778 states and 15982 transitions. [2018-11-22 23:18:08,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:18:08,767 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2018-11-22 23:18:08,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:08,771 INFO L225 Difference]: With dead ends: 6778 [2018-11-22 23:18:08,771 INFO L226 Difference]: Without dead ends: 6746 [2018-11-22 23:18:08,772 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:08,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6746 states. [2018-11-22 23:18:08,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6746 to 5276. [2018-11-22 23:18:08,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5276 states. [2018-11-22 23:18:08,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5276 states to 5276 states and 12536 transitions. [2018-11-22 23:18:08,815 INFO L78 Accepts]: Start accepts. Automaton has 5276 states and 12536 transitions. Word has length 83 [2018-11-22 23:18:08,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:08,816 INFO L480 AbstractCegarLoop]: Abstraction has 5276 states and 12536 transitions. [2018-11-22 23:18:08,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:08,816 INFO L276 IsEmpty]: Start isEmpty. Operand 5276 states and 12536 transitions. [2018-11-22 23:18:08,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-22 23:18:08,819 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:08,819 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:08,819 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:08,820 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:08,820 INFO L82 PathProgramCache]: Analyzing trace with hash 2070771788, now seen corresponding path program 1 times [2018-11-22 23:18:08,820 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:08,820 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:08,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:08,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:08,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:08,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:08,901 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:08,901 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 23:18:08,901 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 23:18:08,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 23:18:08,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:08,902 INFO L87 Difference]: Start difference. First operand 5276 states and 12536 transitions. Second operand 7 states. [2018-11-22 23:18:09,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:09,164 INFO L93 Difference]: Finished difference Result 8217 states and 19889 transitions. [2018-11-22 23:18:09,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-22 23:18:09,165 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 83 [2018-11-22 23:18:09,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:09,173 INFO L225 Difference]: With dead ends: 8217 [2018-11-22 23:18:09,173 INFO L226 Difference]: Without dead ends: 8217 [2018-11-22 23:18:09,173 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-11-22 23:18:09,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8217 states. [2018-11-22 23:18:09,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8217 to 5921. [2018-11-22 23:18:09,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5921 states. [2018-11-22 23:18:09,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5921 states to 5921 states and 14180 transitions. [2018-11-22 23:18:09,234 INFO L78 Accepts]: Start accepts. Automaton has 5921 states and 14180 transitions. Word has length 83 [2018-11-22 23:18:09,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:09,234 INFO L480 AbstractCegarLoop]: Abstraction has 5921 states and 14180 transitions. [2018-11-22 23:18:09,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 23:18:09,234 INFO L276 IsEmpty]: Start isEmpty. Operand 5921 states and 14180 transitions. [2018-11-22 23:18:09,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-22 23:18:09,238 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:09,239 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:09,239 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:09,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:09,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1336691827, now seen corresponding path program 1 times [2018-11-22 23:18:09,239 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:09,239 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:09,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,240 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:09,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:09,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:09,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:09,312 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:09,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:09,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:09,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:09,312 INFO L87 Difference]: Start difference. First operand 5921 states and 14180 transitions. Second operand 6 states. [2018-11-22 23:18:09,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:09,547 INFO L93 Difference]: Finished difference Result 6595 states and 15795 transitions. [2018-11-22 23:18:09,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 23:18:09,548 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2018-11-22 23:18:09,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:09,554 INFO L225 Difference]: With dead ends: 6595 [2018-11-22 23:18:09,554 INFO L226 Difference]: Without dead ends: 6595 [2018-11-22 23:18:09,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-22 23:18:09,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6595 states. [2018-11-22 23:18:09,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6595 to 5382. [2018-11-22 23:18:09,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5382 states. [2018-11-22 23:18:09,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5382 states to 5382 states and 12786 transitions. [2018-11-22 23:18:09,605 INFO L78 Accepts]: Start accepts. Automaton has 5382 states and 12786 transitions. Word has length 83 [2018-11-22 23:18:09,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:09,605 INFO L480 AbstractCegarLoop]: Abstraction has 5382 states and 12786 transitions. [2018-11-22 23:18:09,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:09,605 INFO L276 IsEmpty]: Start isEmpty. Operand 5382 states and 12786 transitions. [2018-11-22 23:18:09,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-22 23:18:09,610 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:09,610 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:09,611 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:09,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:09,612 INFO L82 PathProgramCache]: Analyzing trace with hash -858977808, now seen corresponding path program 1 times [2018-11-22 23:18:09,612 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:09,612 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:09,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:09,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:09,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:09,663 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:09,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:09,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:09,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:09,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:09,664 INFO L87 Difference]: Start difference. First operand 5382 states and 12786 transitions. Second operand 6 states. [2018-11-22 23:18:09,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:09,799 INFO L93 Difference]: Finished difference Result 6387 states and 15122 transitions. [2018-11-22 23:18:09,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 23:18:09,799 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2018-11-22 23:18:09,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:09,804 INFO L225 Difference]: With dead ends: 6387 [2018-11-22 23:18:09,804 INFO L226 Difference]: Without dead ends: 6387 [2018-11-22 23:18:09,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:09,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6387 states. [2018-11-22 23:18:09,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6387 to 5243. [2018-11-22 23:18:09,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5243 states. [2018-11-22 23:18:09,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5243 states to 5243 states and 12432 transitions. [2018-11-22 23:18:09,847 INFO L78 Accepts]: Start accepts. Automaton has 5243 states and 12432 transitions. Word has length 83 [2018-11-22 23:18:09,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:09,848 INFO L480 AbstractCegarLoop]: Abstraction has 5243 states and 12432 transitions. [2018-11-22 23:18:09,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:09,848 INFO L276 IsEmpty]: Start isEmpty. Operand 5243 states and 12432 transitions. [2018-11-22 23:18:09,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-22 23:18:09,852 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:09,852 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:09,852 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:09,852 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:09,852 INFO L82 PathProgramCache]: Analyzing trace with hash 510429518, now seen corresponding path program 1 times [2018-11-22 23:18:09,852 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:09,852 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:09,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:09,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:09,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:09,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:09,927 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:09,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:09,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:09,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:09,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:09,927 INFO L87 Difference]: Start difference. First operand 5243 states and 12432 transitions. Second operand 6 states. [2018-11-22 23:18:10,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:10,005 INFO L93 Difference]: Finished difference Result 4891 states and 11280 transitions. [2018-11-22 23:18:10,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:18:10,006 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 83 [2018-11-22 23:18:10,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:10,010 INFO L225 Difference]: With dead ends: 4891 [2018-11-22 23:18:10,010 INFO L226 Difference]: Without dead ends: 4891 [2018-11-22 23:18:10,010 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-22 23:18:10,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4891 states. [2018-11-22 23:18:10,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4891 to 2915. [2018-11-22 23:18:10,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2915 states. [2018-11-22 23:18:10,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2915 states to 2915 states and 6735 transitions. [2018-11-22 23:18:10,037 INFO L78 Accepts]: Start accepts. Automaton has 2915 states and 6735 transitions. Word has length 83 [2018-11-22 23:18:10,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:10,038 INFO L480 AbstractCegarLoop]: Abstraction has 2915 states and 6735 transitions. [2018-11-22 23:18:10,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:10,038 INFO L276 IsEmpty]: Start isEmpty. Operand 2915 states and 6735 transitions. [2018-11-22 23:18:10,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:10,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:10,040 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:10,041 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:10,041 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:10,041 INFO L82 PathProgramCache]: Analyzing trace with hash 1696141667, now seen corresponding path program 1 times [2018-11-22 23:18:10,041 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:10,041 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:10,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:10,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:10,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:10,108 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:10,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 23:18:10,108 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 23:18:10,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 23:18:10,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:10,108 INFO L87 Difference]: Start difference. First operand 2915 states and 6735 transitions. Second operand 6 states. [2018-11-22 23:18:10,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:10,209 INFO L93 Difference]: Finished difference Result 3309 states and 7523 transitions. [2018-11-22 23:18:10,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 23:18:10,210 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2018-11-22 23:18:10,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:10,212 INFO L225 Difference]: With dead ends: 3309 [2018-11-22 23:18:10,212 INFO L226 Difference]: Without dead ends: 3233 [2018-11-22 23:18:10,212 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:10,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3233 states. [2018-11-22 23:18:10,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3233 to 2655. [2018-11-22 23:18:10,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2655 states. [2018-11-22 23:18:10,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2655 states to 2655 states and 6061 transitions. [2018-11-22 23:18:10,233 INFO L78 Accepts]: Start accepts. Automaton has 2655 states and 6061 transitions. Word has length 85 [2018-11-22 23:18:10,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:10,233 INFO L480 AbstractCegarLoop]: Abstraction has 2655 states and 6061 transitions. [2018-11-22 23:18:10,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 23:18:10,233 INFO L276 IsEmpty]: Start isEmpty. Operand 2655 states and 6061 transitions. [2018-11-22 23:18:10,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:10,235 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:10,235 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:10,236 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:10,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:10,236 INFO L82 PathProgramCache]: Analyzing trace with hash 1441405122, now seen corresponding path program 1 times [2018-11-22 23:18:10,236 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:10,236 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:10,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:10,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:10,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:10,318 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:10,318 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 23:18:10,318 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 23:18:10,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 23:18:10,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-22 23:18:10,318 INFO L87 Difference]: Start difference. First operand 2655 states and 6061 transitions. Second operand 7 states. [2018-11-22 23:18:10,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:10,450 INFO L93 Difference]: Finished difference Result 3147 states and 7166 transitions. [2018-11-22 23:18:10,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 23:18:10,451 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 85 [2018-11-22 23:18:10,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:10,453 INFO L225 Difference]: With dead ends: 3147 [2018-11-22 23:18:10,453 INFO L226 Difference]: Without dead ends: 3147 [2018-11-22 23:18:10,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-11-22 23:18:10,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3147 states. [2018-11-22 23:18:10,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3147 to 2736. [2018-11-22 23:18:10,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2736 states. [2018-11-22 23:18:10,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2736 states to 2736 states and 6211 transitions. [2018-11-22 23:18:10,475 INFO L78 Accepts]: Start accepts. Automaton has 2736 states and 6211 transitions. Word has length 85 [2018-11-22 23:18:10,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:10,475 INFO L480 AbstractCegarLoop]: Abstraction has 2736 states and 6211 transitions. [2018-11-22 23:18:10,475 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 23:18:10,475 INFO L276 IsEmpty]: Start isEmpty. Operand 2736 states and 6211 transitions. [2018-11-22 23:18:10,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:10,478 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:10,478 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:10,478 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:10,478 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:10,478 INFO L82 PathProgramCache]: Analyzing trace with hash -1966058493, now seen corresponding path program 1 times [2018-11-22 23:18:10,478 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:10,479 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:10,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:10,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:10,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:10,550 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:10,550 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-22 23:18:10,551 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-22 23:18:10,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-22 23:18:10,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-22 23:18:10,551 INFO L87 Difference]: Start difference. First operand 2736 states and 6211 transitions. Second operand 9 states. [2018-11-22 23:18:10,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:10,689 INFO L93 Difference]: Finished difference Result 6987 states and 16014 transitions. [2018-11-22 23:18:10,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-22 23:18:10,689 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 85 [2018-11-22 23:18:10,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:10,691 INFO L225 Difference]: With dead ends: 6987 [2018-11-22 23:18:10,691 INFO L226 Difference]: Without dead ends: 2099 [2018-11-22 23:18:10,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-11-22 23:18:10,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2099 states. [2018-11-22 23:18:10,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2099 to 2099. [2018-11-22 23:18:10,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2099 states. [2018-11-22 23:18:10,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2099 states to 2099 states and 4798 transitions. [2018-11-22 23:18:10,706 INFO L78 Accepts]: Start accepts. Automaton has 2099 states and 4798 transitions. Word has length 85 [2018-11-22 23:18:10,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:10,706 INFO L480 AbstractCegarLoop]: Abstraction has 2099 states and 4798 transitions. [2018-11-22 23:18:10,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-22 23:18:10,706 INFO L276 IsEmpty]: Start isEmpty. Operand 2099 states and 4798 transitions. [2018-11-22 23:18:10,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:10,708 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:10,708 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:10,708 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:10,708 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:10,708 INFO L82 PathProgramCache]: Analyzing trace with hash 1464778360, now seen corresponding path program 2 times [2018-11-22 23:18:10,708 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:10,709 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:10,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 23:18:10,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:10,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:10,768 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:10,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 23:18:10,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 23:18:10,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 23:18:10,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 23:18:10,769 INFO L87 Difference]: Start difference. First operand 2099 states and 4798 transitions. Second operand 5 states. [2018-11-22 23:18:10,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:10,789 INFO L93 Difference]: Finished difference Result 2099 states and 4782 transitions. [2018-11-22 23:18:10,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 23:18:10,790 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 85 [2018-11-22 23:18:10,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:10,791 INFO L225 Difference]: With dead ends: 2099 [2018-11-22 23:18:10,792 INFO L226 Difference]: Without dead ends: 2099 [2018-11-22 23:18:10,792 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-22 23:18:10,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2099 states. [2018-11-22 23:18:10,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2099 to 1693. [2018-11-22 23:18:10,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1693 states. [2018-11-22 23:18:10,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1693 states to 1693 states and 3855 transitions. [2018-11-22 23:18:10,805 INFO L78 Accepts]: Start accepts. Automaton has 1693 states and 3855 transitions. Word has length 85 [2018-11-22 23:18:10,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:10,806 INFO L480 AbstractCegarLoop]: Abstraction has 1693 states and 3855 transitions. [2018-11-22 23:18:10,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 23:18:10,806 INFO L276 IsEmpty]: Start isEmpty. Operand 1693 states and 3855 transitions. [2018-11-22 23:18:10,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:10,807 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:10,807 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:10,808 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:10,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:10,808 INFO L82 PathProgramCache]: Analyzing trace with hash -1942685255, now seen corresponding path program 2 times [2018-11-22 23:18:10,808 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:10,808 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:10,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,809 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 23:18:10,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:10,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 23:18:10,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 23:18:10,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 23:18:10,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-22 23:18:10,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-22 23:18:10,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-22 23:18:10,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-22 23:18:10,907 INFO L87 Difference]: Start difference. First operand 1693 states and 3855 transitions. Second operand 11 states. [2018-11-22 23:18:11,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 23:18:11,435 INFO L93 Difference]: Finished difference Result 3268 states and 7492 transitions. [2018-11-22 23:18:11,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-22 23:18:11,435 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 85 [2018-11-22 23:18:11,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 23:18:11,437 INFO L225 Difference]: With dead ends: 3268 [2018-11-22 23:18:11,437 INFO L226 Difference]: Without dead ends: 1920 [2018-11-22 23:18:11,437 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=310, Unknown=0, NotChecked=0, Total=380 [2018-11-22 23:18:11,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1920 states. [2018-11-22 23:18:11,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1920 to 1726. [2018-11-22 23:18:11,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1726 states. [2018-11-22 23:18:11,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1726 states and 3878 transitions. [2018-11-22 23:18:11,449 INFO L78 Accepts]: Start accepts. Automaton has 1726 states and 3878 transitions. Word has length 85 [2018-11-22 23:18:11,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 23:18:11,449 INFO L480 AbstractCegarLoop]: Abstraction has 1726 states and 3878 transitions. [2018-11-22 23:18:11,449 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-22 23:18:11,449 INFO L276 IsEmpty]: Start isEmpty. Operand 1726 states and 3878 transitions. [2018-11-22 23:18:11,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-22 23:18:11,450 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 23:18:11,450 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 23:18:11,450 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 23:18:11,450 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 23:18:11,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1542877223, now seen corresponding path program 3 times [2018-11-22 23:18:11,450 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 23:18:11,450 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 23:18:11,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:11,451 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 23:18:11,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 23:18:11,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 23:18:11,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 23:18:11,488 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [423] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [317] L-1-->L672: Formula: (= |v_#valid_5| (store |v_#valid_6| 0 0)) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [395] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_5 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [439] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [310] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [366] L678-->L679: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [471] L679-->L680: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [404] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [464] L682-->L684: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [326] L684-->L685: Formula: (= v_~y~0_11 0) InVars {} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [438] L685-->L686: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [370] L686-->L687: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [322] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_11 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [428] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [364] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_14 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [470] L690-->L691: Formula: (= v_~y$r_buff1_thd0~0_8 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [403] L691-->L692: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [332] L692-->L693: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [462] L693-->L694: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [393] L694-->L695: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [325] L695-->L696: Formula: (= v_~y$w_buff0~0_10 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [437] L696-->L697: Formula: (= v_~y$w_buff0_used~0_53 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [367] L697-->L698: Formula: (= v_~y$w_buff1~0_9 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_9} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [321] L698-->L700: Formula: (= v_~y$w_buff1_used~0_31 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_31} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [362] L700-->L701: Formula: (= v_~z~0_2 0) InVars {} OutVars{~z~0=v_~z~0_2} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [469] L701-->L702: Formula: (= v_~weak$$choice0~0_2 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [402] L702-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [463] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [461] L-1-2-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_3|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_3|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_3|, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_1|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_3|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1659~0.offset, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet34, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1660~0.offset, ULTIMATE.start_main_~#t1660~0.base, ULTIMATE.start_main_#t~nondet35, ULTIMATE.start_main_~#t1659~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [316] L778-->L778-1: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1659~0.base_4|)) (= 0 (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1659~0.base_4|)) (= (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1659~0.base_4| 1) |v_#valid_7|) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1659~0.base_4| 4)) (= |v_ULTIMATE.start_main_~#t1659~0.offset_4| 0)) InVars {#length=|v_#length_2|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_4|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1659~0.offset, #valid, ULTIMATE.start_main_~#t1659~0.base, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [466] L778-1-->L779: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1659~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1659~0.base_5|) |v_ULTIMATE.start_main_~#t1659~0.offset_5| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_5|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_5|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [568] L779-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [422] L779-1-->L780: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet34] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [346] L780-->L780-1: Formula: (and (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1660~0.base_4| 1) |v_#valid_9|) (= |v_ULTIMATE.start_main_~#t1660~0.offset_4| 0) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1660~0.base_4|)) (not (= 0 |v_ULTIMATE.start_main_~#t1660~0.base_4|)) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1660~0.base_4| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_4|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1660~0.offset, ULTIMATE.start_main_~#t1660~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [351] L780-1-->L781: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1660~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1660~0.base_5|) |v_ULTIMATE.start_main_~#t1660~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_5|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_5|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [569] L781-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [541] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~y$w_buff1_used~0_19 v_~y$w_buff0_used~0_36) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_19 256))))) 1 0))) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_19} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [543] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [546] L5-3-->L756: Formula: (and (= v_~y$r_buff0_thd2~0_6 1) (= v_~z~0_1 1) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~__unbuffered_p1_EAX~0_1 v_~z~0_1) (= v_~y$r_buff1_thd2~0_4 v_~y$r_buff0_thd2~0_7) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~z~0=v_~z~0_1, ~x~0=v_~x~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd2~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [547] L756-->L756-5: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_37 256))) (= |v_Thread1_P1_#t~ite28_1| v_~y$w_buff0~0_9) (not (= 0 (mod v_~y$r_buff0_thd2~0_8 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [474] P0ENTRY-->L715: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [475] L715-->L715-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [549] L756-5-->L757: Formula: (= v_~y~0_8 |v_Thread1_P1_#t~ite28_2|) InVars {Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_2|} OutVars{Thread1_P1_#t~ite27=|v_Thread1_P1_#t~ite27_1|, ~y~0=v_~y~0_8, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite27, ~y~0, Thread1_P1_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [552] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite29_1| 0) (not (= (mod v_~y$w_buff0_used~0_39 256) 0)) (not (= 0 (mod v_~y$r_buff0_thd2~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [555] L757-2-->L758: Formula: (= v_~y$w_buff0_used~0_41 |v_Thread1_P1_#t~ite29_3|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 [477] L715-5-->L716: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [480] L716-->L716-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [483] L716-8-->L717: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [486] L717-->L717-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [491] L717-8-->L718: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [557] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd2~0_13 256))) (= |v_Thread1_P1_#t~ite30_2| v_~y$w_buff1_used~0_23) (or (= (mod v_~y$w_buff1_used~0_23 256) 0) (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_23} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_23} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite30|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [558] L758-2-->L759: Formula: (= v_~y$w_buff1_used~0_24 |v_Thread1_P1_#t~ite30_3|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} OutVars{Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [560] L759-->L759-2: Formula: (and (= |v_Thread1_P1_#t~ite31_2| v_~y$r_buff0_thd2~0_2) (or (= 0 (mod v_~y$w_buff0_used~0_32 256)) (= (mod v_~y$r_buff0_thd2~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_32, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_32, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread1_P1_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite31|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [561] L759-2-->L760: Formula: (= v_~y$r_buff0_thd2~0_3 |v_Thread1_P1_#t~ite31_3|) InVars {Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_3|} OutVars{Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [563] L760-->L760-2: Formula: (and (or (= (mod v_~y$r_buff1_thd2~0_2 256) 0) (= (mod v_~y$w_buff1_used~0_18 256) 0)) (= |v_Thread1_P1_#t~ite32_2| v_~y$r_buff1_thd2~0_2) (or (= 0 (mod v_~y$w_buff0_used~0_34 256)) (= 0 (mod v_~y$r_buff0_thd2~0_5 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_34, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_34, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite32] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite32|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [564] L760-2-->L765: Formula: (and (= v_~y$r_buff1_thd2~0_3 |v_Thread1_P1_#t~ite32_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread1_P1_#t~ite32, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [495] L718-->L718-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [500] L718-8-->L719: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [504] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [509] L719-8-->L720: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [513] L720-->L720-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [518] L720-8-->L721: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [522] L721-->L721-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [527] L721-8-->L723: Formula: (and (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|) (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_3)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [531] L723-->L723-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [536] L723-2-->L731: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [458] L781-1-->L785: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet35, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [383] L785-->L787: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [425] L787-->L787-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_55 256)) (= (mod v_~y$r_buff0_thd0~0_13 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_55, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_55, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [427] L787-2-->L787-4: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_25 256)) (= 0 (mod v_~y$r_buff1_thd0~0_2 256))) (= |v_ULTIMATE.start_main_#t~ite36_1| v_~y~0_9)) InVars {~y~0=v_~y~0_9, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ~y~0=v_~y~0_9, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [431] L787-4-->L787-5: Formula: (= |v_ULTIMATE.start_main_#t~ite37_1| |v_ULTIMATE.start_main_#t~ite36_2|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite37] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [412] L787-5-->L788: Formula: (= v_~y~0_10 |v_ULTIMATE.start_main_#t~ite37_3|) InVars {ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_3|} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_2|, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [357] L788-->L788-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite38_2| v_~y$w_buff0_used~0_45) (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= 0 (mod v_~y$w_buff0_used~0_45 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [361] L788-2-->L789: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite38_4|) InVars {ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [315] L789-->L789-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_4 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (or (= (mod v_~y$r_buff0_thd0~0_5 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_2| v_~y$w_buff1_used~0_27)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [467] L789-2-->L790: Formula: (= v_~y$w_buff1_used~0_28 |v_ULTIMATE.start_main_#t~ite39_4|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|} OutVars{ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [419] L790-->L790-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite40_2| v_~y$r_buff0_thd0~0_7) (or (= 0 (mod v_~y$w_buff0_used~0_50 256)) (= 0 (mod v_~y$r_buff0_thd0~0_7 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [399] L790-2-->L791: Formula: (= v_~y$r_buff0_thd0~0_8 |v_ULTIMATE.start_main_#t~ite40_4|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [345] L791-->L791-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_30 256)) (= 0 (mod v_~y$r_buff1_thd0~0_6 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_10 256)) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite41_2| v_~y$r_buff1_thd0~0_6)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [354] L791-2-->L796: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 0))) 1 0) 0) 0 1)) (= v_~y$r_buff1_thd0~0_7 |v_ULTIMATE.start_main_#t~ite41_4|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_3|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [380] L796-->L796-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [384] L796-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [434] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [453] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [449] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~z~0 := 1;~__unbuffered_p1_EAX~0 := ~z~0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite28 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y~0 := #t~ite28;havoc #t~ite28;havoc #t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite29;havoc #t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite9;havoc #t~ite7;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite10;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite30 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite30|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite30;havoc #t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite31 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite31;havoc #t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite32 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite32;havoc #t~ite32;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite15;havoc #t~ite14;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite20;havoc #t~ite19;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite23;havoc #t~ite24;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet35;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite36 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 main_#t~ite37 := main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y~0 := main_#t~ite37;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite38 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite38;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite39 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite39;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite40;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite41;havoc main_#t~ite41;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~z~0 := 1;~__unbuffered_p1_EAX~0 := ~z~0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite28 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y~0 := #t~ite28;havoc #t~ite28;havoc #t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite29;havoc #t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite9;havoc #t~ite7;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite10;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite30 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite30|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite30;havoc #t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite31 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite31;havoc #t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite32 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite32;havoc #t~ite32;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite15;havoc #t~ite14;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite20;havoc #t~ite19;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite23;havoc #t~ite24;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet35;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite36 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 main_#t~ite37 := main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y~0 := main_#t~ite37;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite38 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite38;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite39 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite39;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite40;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite41;havoc main_#t~ite41;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L757] 0 #t~ite29 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 assume 0 != ~y$flush_delayed~0 % 256; [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L757] 0 #t~ite29 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 assume 0 != ~y$flush_delayed~0 % 256; [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0, main_~#t1660~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, main_~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, main_~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0, main_~#t1660~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, main_~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, main_~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, ~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, ~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc #t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 #t~ite37 := #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := #t~ite37; [L787] -1 havoc #t~ite37; [L787] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite38; [L788] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite39; [L789] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite40; [L790] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite41; [L791] -1 havoc #t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, ~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, ~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc #t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 #t~ite37 := #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := #t~ite37; [L787] -1 havoc #t~ite37; [L787] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite38; [L788] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite39; [L789] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite40; [L790] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite41; [L791] -1 havoc #t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1659; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1659, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1660; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1660, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L736] 0 y$w_buff1 = y$w_buff0 [L737] 0 y$w_buff0 = 1 [L738] 0 y$w_buff1_used = y$w_buff0_used [L739] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L742] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L743] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L744] 0 y$r_buff0_thd2 = (_Bool)1 [L747] 0 z = 1 [L750] 0 __unbuffered_p1_EAX = z [L753] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L706] 1 x = 1 [L711] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L712] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L713] 1 y$flush_delayed = weak$$choice2 [L714] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L715] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L715] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L716] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L716] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L717] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L760] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L719] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L720] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L721] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L721] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L722] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 1 y = y$flush_delayed ? y$mem_tmp : y [L724] 1 y$flush_delayed = (_Bool)0 [L729] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-22 23:18:12,986 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-22 23:18:12,987 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.11 11:18:12 BasicIcfg [2018-11-22 23:18:12,987 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-22 23:18:13,004 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-22 23:18:13,004 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-22 23:18:13,004 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-22 23:18:13,005 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 11:17:54" (3/4) ... [2018-11-22 23:18:13,007 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [423] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [317] L-1-->L672: Formula: (= |v_#valid_5| (store |v_#valid_6| 0 0)) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [395] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_5 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [439] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [310] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [366] L678-->L679: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [471] L679-->L680: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [404] L680-->L682: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [464] L682-->L684: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [326] L684-->L685: Formula: (= v_~y~0_11 0) InVars {} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [438] L685-->L686: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [370] L686-->L687: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [322] L687-->L688: Formula: (= v_~y$r_buff0_thd0~0_11 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [428] L688-->L689: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [364] L689-->L690: Formula: (= v_~y$r_buff0_thd2~0_14 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [470] L690-->L691: Formula: (= v_~y$r_buff1_thd0~0_8 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [403] L691-->L692: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [332] L692-->L693: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [462] L693-->L694: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [393] L694-->L695: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [325] L695-->L696: Formula: (= v_~y$w_buff0~0_10 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [437] L696-->L697: Formula: (= v_~y$w_buff0_used~0_53 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [367] L697-->L698: Formula: (= v_~y$w_buff1~0_9 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_9} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [321] L698-->L700: Formula: (= v_~y$w_buff1_used~0_31 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_31} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [362] L700-->L701: Formula: (= v_~z~0_2 0) InVars {} OutVars{~z~0=v_~z~0_2} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [469] L701-->L702: Formula: (= v_~weak$$choice0~0_2 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [402] L702-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [463] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [461] L-1-2-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_3|, ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_3|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_3|, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_1|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_3|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_5|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1659~0.offset, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet34, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1660~0.offset, ULTIMATE.start_main_~#t1660~0.base, ULTIMATE.start_main_#t~nondet35, ULTIMATE.start_main_~#t1659~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [316] L778-->L778-1: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1659~0.base_4|)) (= 0 (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1659~0.base_4|)) (= (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1659~0.base_4| 1) |v_#valid_7|) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1659~0.base_4| 4)) (= |v_ULTIMATE.start_main_~#t1659~0.offset_4| 0)) InVars {#length=|v_#length_2|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_4|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1659~0.offset, #valid, ULTIMATE.start_main_~#t1659~0.base, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [466] L778-1-->L779: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1659~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1659~0.base_5|) |v_ULTIMATE.start_main_~#t1659~0.offset_5| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_5|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_5|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1659~0.base=|v_ULTIMATE.start_main_~#t1659~0.base_5|, ULTIMATE.start_main_~#t1659~0.offset=|v_ULTIMATE.start_main_~#t1659~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [568] L779-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [422] L779-1-->L780: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet34=|v_ULTIMATE.start_main_#t~nondet34_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet34] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [346] L780-->L780-1: Formula: (and (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1660~0.base_4| 1) |v_#valid_9|) (= |v_ULTIMATE.start_main_~#t1660~0.offset_4| 0) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1660~0.base_4|)) (not (= 0 |v_ULTIMATE.start_main_~#t1660~0.base_4|)) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1660~0.base_4| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_4|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1660~0.offset, ULTIMATE.start_main_~#t1660~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [351] L780-1-->L781: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1660~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1660~0.base_5|) |v_ULTIMATE.start_main_~#t1660~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_5|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1660~0.offset=|v_ULTIMATE.start_main_~#t1660~0.offset_5|, ULTIMATE.start_main_~#t1660~0.base=|v_ULTIMATE.start_main_~#t1660~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [569] L781-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [541] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~y$w_buff1_used~0_19 v_~y$w_buff0_used~0_36) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_19 256))))) 1 0))) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_19} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [543] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [546] L5-3-->L756: Formula: (and (= v_~y$r_buff0_thd2~0_6 1) (= v_~z~0_1 1) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~__unbuffered_p1_EAX~0_1 v_~z~0_1) (= v_~y$r_buff1_thd2~0_4 v_~y$r_buff0_thd2~0_7) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~z~0=v_~z~0_1, ~x~0=v_~x~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd2~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [547] L756-->L756-5: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_37 256))) (= |v_Thread1_P1_#t~ite28_1| v_~y$w_buff0~0_9) (not (= 0 (mod v_~y$r_buff0_thd2~0_8 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [474] P0ENTRY-->L715: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [475] L715-->L715-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [549] L756-5-->L757: Formula: (= v_~y~0_8 |v_Thread1_P1_#t~ite28_2|) InVars {Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_2|} OutVars{Thread1_P1_#t~ite27=|v_Thread1_P1_#t~ite27_1|, ~y~0=v_~y~0_8, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite27, ~y~0, Thread1_P1_#t~ite28] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [552] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite29_1| 0) (not (= (mod v_~y$w_buff0_used~0_39 256) 0)) (not (= 0 (mod v_~y$r_buff0_thd2~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 [555] L757-2-->L758: Formula: (= v_~y$w_buff0_used~0_41 |v_Thread1_P1_#t~ite29_3|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 [477] L715-5-->L716: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [480] L716-->L716-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [483] L716-8-->L717: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [486] L717-->L717-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [491] L717-8-->L718: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [557] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd2~0_13 256))) (= |v_Thread1_P1_#t~ite30_2| v_~y$w_buff1_used~0_23) (or (= (mod v_~y$w_buff1_used~0_23 256) 0) (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_23} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_23} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite30|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [558] L758-2-->L759: Formula: (= v_~y$w_buff1_used~0_24 |v_Thread1_P1_#t~ite30_3|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} OutVars{Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [560] L759-->L759-2: Formula: (and (= |v_Thread1_P1_#t~ite31_2| v_~y$r_buff0_thd2~0_2) (or (= 0 (mod v_~y$w_buff0_used~0_32 256)) (= (mod v_~y$r_buff0_thd2~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_32, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_32, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread1_P1_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite31|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [561] L759-2-->L760: Formula: (= v_~y$r_buff0_thd2~0_3 |v_Thread1_P1_#t~ite31_3|) InVars {Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_3|} OutVars{Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [563] L760-->L760-2: Formula: (and (or (= (mod v_~y$r_buff1_thd2~0_2 256) 0) (= (mod v_~y$w_buff1_used~0_18 256) 0)) (= |v_Thread1_P1_#t~ite32_2| v_~y$r_buff1_thd2~0_2) (or (= 0 (mod v_~y$w_buff0_used~0_34 256)) (= 0 (mod v_~y$r_buff0_thd2~0_5 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_34, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_34, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite32] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite32|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 [564] L760-2-->L765: Formula: (and (= v_~y$r_buff1_thd2~0_3 |v_Thread1_P1_#t~ite32_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread1_P1_#t~ite32, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [495] L718-->L718-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [500] L718-8-->L719: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [504] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [509] L719-8-->L720: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [513] L720-->L720-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [518] L720-8-->L721: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [522] L721-->L721-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [527] L721-8-->L723: Formula: (and (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|) (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_3)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [531] L723-->L723-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [536] L723-2-->L731: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [458] L781-1-->L785: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet35=|v_ULTIMATE.start_main_#t~nondet35_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet35, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [383] L785-->L787: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [425] L787-->L787-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_55 256)) (= (mod v_~y$r_buff0_thd0~0_13 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_55, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_55, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [427] L787-2-->L787-4: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_25 256)) (= 0 (mod v_~y$r_buff1_thd0~0_2 256))) (= |v_ULTIMATE.start_main_#t~ite36_1| v_~y~0_9)) InVars {~y~0=v_~y~0_9, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ~y~0=v_~y~0_9, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [431] L787-4-->L787-5: Formula: (= |v_ULTIMATE.start_main_#t~ite37_1| |v_ULTIMATE.start_main_#t~ite36_2|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite37] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [412] L787-5-->L788: Formula: (= v_~y~0_10 |v_ULTIMATE.start_main_#t~ite37_3|) InVars {ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_3|} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_2|, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [357] L788-->L788-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite38_2| v_~y$w_buff0_used~0_45) (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= 0 (mod v_~y$w_buff0_used~0_45 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [361] L788-2-->L789: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite38_4|) InVars {ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [315] L789-->L789-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_4 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (or (= (mod v_~y$r_buff0_thd0~0_5 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_2| v_~y$w_buff1_used~0_27)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [467] L789-2-->L790: Formula: (= v_~y$w_buff1_used~0_28 |v_ULTIMATE.start_main_#t~ite39_4|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|} OutVars{ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [419] L790-->L790-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite40_2| v_~y$r_buff0_thd0~0_7) (or (= 0 (mod v_~y$w_buff0_used~0_50 256)) (= 0 (mod v_~y$r_buff0_thd0~0_7 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [399] L790-2-->L791: Formula: (= v_~y$r_buff0_thd0~0_8 |v_ULTIMATE.start_main_#t~ite40_4|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [345] L791-->L791-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_30 256)) (= 0 (mod v_~y$r_buff1_thd0~0_6 256))) (or (= 0 (mod v_~y$r_buff0_thd0~0_10 256)) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite41_2| v_~y$r_buff1_thd0~0_6)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [354] L791-2-->L796: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 0))) 1 0) 0) 0 1)) (= v_~y$r_buff1_thd0~0_7 |v_ULTIMATE.start_main_#t~ite41_4|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_3|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [380] L796-->L796-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [384] L796-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [434] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [453] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 [449] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~z~0 := 1;~__unbuffered_p1_EAX~0 := ~z~0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite28 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y~0 := #t~ite28;havoc #t~ite28;havoc #t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite29;havoc #t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite9;havoc #t~ite7;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite10;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite30 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite30|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite30;havoc #t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite31 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite31;havoc #t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite32 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite32;havoc #t~ite32;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite15;havoc #t~ite14;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite20;havoc #t~ite19;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite23;havoc #t~ite24;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet35;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite36 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 main_#t~ite37 := main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y~0 := main_#t~ite37;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite38 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite38;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite39 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite39;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite40;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite41;havoc main_#t~ite41;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); srcloc: L780 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); srcloc: L780-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~z~0 := 1;~__unbuffered_p1_EAX~0 := ~z~0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite28 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y~0 := #t~ite28;havoc #t~ite28;havoc #t~ite27; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite29;havoc #t~ite29; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite5;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite9;havoc #t~ite7;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite11;havoc #t~ite10;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite30 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite30|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite30;havoc #t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite31 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite31;havoc #t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite32 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite32;havoc #t~ite32;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite15;havoc #t~ite14;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite16;havoc #t~ite18;havoc #t~ite17; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite20;havoc #t~ite19;havoc #t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite22;havoc #t~ite23;havoc #t~ite24;~__unbuffered_p0_EAX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet35;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite36 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 main_#t~ite37 := main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_#t~ite37|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y~0 := main_#t~ite37;havoc main_#t~ite37;havoc main_#t~ite36; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite38 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite38|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite38;havoc main_#t~ite38; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite39 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite39;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite40|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite40;havoc main_#t~ite40; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite41|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite41;havoc main_#t~ite41;~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1659~0.base|=7, |ULTIMATE.start_main_~#t1659~0.offset|=0, |ULTIMATE.start_main_~#t1660~0.base|=5, |ULTIMATE.start_main_~#t1660~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L757] 0 #t~ite29 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 assume 0 != ~y$flush_delayed~0 % 256; [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0.base, main_~#t1659~0.offset, main_~#t1660~0.base, main_~#t1660~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t1659~0.base, main_~#t1659~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(0, main_~#t1659~0.base, main_~#t1659~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] -1 call main_~#t1660~0.base, main_~#t1660~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] -1 call write~int(1, main_~#t1660~0.base, main_~#t1660~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L757] 0 #t~ite29 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 assume 0 != ~weak$$choice2~0 % 256; [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 assume 0 != ~y$flush_delayed~0 % 256; [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0.base=7, main_~#t1659~0.offset=0, main_~#t1660~0.base=5, main_~#t1660~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0, main_~#t1660~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, main_~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, main_~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet34, main_#t~nondet35, main_#t~ite37, main_#t~ite36, main_#t~ite38, main_#t~ite39, main_#t~ite40, main_#t~ite41, main_~#t1659~0, main_~#t1660~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, main_~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc main_#t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call main_~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, main_~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L740] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L740] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite30=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc main_#t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 main_#t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 main_#t~ite37 := main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_#t~ite37=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := main_#t~ite37; [L787] -1 havoc main_#t~ite37; [L787] -1 havoc main_#t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite38=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := main_#t~ite38; [L788] -1 havoc main_#t~ite38; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := main_#t~ite39; [L789] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 main_#t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite40=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := main_#t~ite40; [L790] -1 havoc main_#t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 main_#t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite41=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := main_#t~ite41; [L791] -1 havoc main_#t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L796] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1659~0!base=7, main_~#t1659~0!offset=0, main_~#t1660~0!base=5, main_~#t1660~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, ~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, ~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc #t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 #t~ite37 := #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := #t~ite37; [L787] -1 havoc #t~ite37; [L787] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite38; [L788] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite39; [L789] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite40; [L790] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite41; [L791] -1 havoc #t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L679] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L680] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L682] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L684] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L685] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L686] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L687] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L688] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L690] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L691] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L693] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L694] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L695] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L696] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L697] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L698] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t1659~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(0, ~#t1659~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 havoc #t~nondet34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L780] FCALL -1 call ~#t1660~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FCALL -1 call write~int(1, ~#t1660~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L781] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L733-L766] 0 ~arg := #in~arg; [L736] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L737] 0 ~y$w_buff0~0 := 1; [L738] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L739] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L741] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L742] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L743] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L744] 0 ~y$r_buff0_thd2~0 := 1; [L747] 0 ~z~0 := 1; [L750] 0 ~__unbuffered_p1_EAX~0 := ~z~0; [L753] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 0 #t~ite28 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L703-L732] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L711] 1 ~weak$$choice0~0 := #t~nondet3; [L711] 1 havoc #t~nondet3; [L712] 1 ~weak$$choice2~0 := #t~nondet4; [L712] 1 havoc #t~nondet4; [L713] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L714] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L715] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L715] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L756] 0 ~y~0 := #t~ite28; [L756] 0 havoc #t~ite28; [L756] 0 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L757] 0 #t~ite29 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L757] 0 ~y$w_buff0_used~0 := #t~ite29; [L757] 0 havoc #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=1] [L715] 1 ~y~0 := #t~ite6; [L715] 1 havoc #t~ite5; [L715] 1 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L716] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L716] 1 ~y$w_buff0~0 := #t~ite9; [L716] 1 havoc #t~ite9; [L716] 1 havoc #t~ite7; [L716] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L717] 1 ~y$w_buff1~0 := #t~ite12; [L717] 1 havoc #t~ite11; [L717] 1 havoc #t~ite10; [L717] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L758] 0 #t~ite30 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L758] 0 ~y$w_buff1_used~0 := #t~ite30; [L758] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L759] 0 #t~ite31 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L759] 0 ~y$r_buff0_thd2~0 := #t~ite31; [L759] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L760] 0 #t~ite32 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L760] 0 ~y$r_buff1_thd2~0 := #t~ite32; [L760] 0 havoc #t~ite32; [L763] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L718] 1 ~y$w_buff0_used~0 := #t~ite15; [L718] 1 havoc #t~ite15; [L718] 1 havoc #t~ite14; [L718] 1 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L719] 1 ~y$w_buff1_used~0 := #t~ite18; [L719] 1 havoc #t~ite16; [L719] 1 havoc #t~ite18; [L719] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L720] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L720] 1 havoc #t~ite20; [L720] 1 havoc #t~ite19; [L720] 1 havoc #t~ite21; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L721] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L721] 1 havoc #t~ite22; [L721] 1 havoc #t~ite23; [L721] 1 havoc #t~ite24; [L722] 1 ~__unbuffered_p0_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L723] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L723] 1 ~y~0 := #t~ite25; [L723] 1 havoc #t~ite25; [L724] 1 ~y$flush_delayed~0 := 0; [L729] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L781] -1 havoc #t~nondet35; [L783] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L785] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L787] -1 #t~ite36 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 #t~ite37 := #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L787] -1 ~y~0 := #t~ite37; [L787] -1 havoc #t~ite37; [L787] -1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite38 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L788] -1 ~y$w_buff0_used~0 := #t~ite38; [L788] -1 havoc #t~ite38; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite39 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L789] -1 ~y$w_buff1_used~0 := #t~ite39; [L789] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L790] -1 #t~ite40 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L790] -1 ~y$r_buff0_thd0~0 := #t~ite40; [L790] -1 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L791] -1 #t~ite41 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L791] -1 ~y$r_buff1_thd0~0 := #t~ite41; [L791] -1 havoc #t~ite41; [L794] -1 ~main$tmp_guard1~0 := (if 0 == (if !((0 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=6, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1659; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1659, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1660; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1660, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L736] 0 y$w_buff1 = y$w_buff0 [L737] 0 y$w_buff0 = 1 [L738] 0 y$w_buff1_used = y$w_buff0_used [L739] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L742] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L743] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L744] 0 y$r_buff0_thd2 = (_Bool)1 [L747] 0 z = 1 [L750] 0 __unbuffered_p1_EAX = z [L753] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L706] 1 x = 1 [L711] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L712] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L713] 1 y$flush_delayed = weak$$choice2 [L714] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L715] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L715] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L716] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L716] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L717] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L760] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L719] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L720] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L721] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L721] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L722] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 1 y = y$flush_delayed ? y$mem_tmp : y [L724] 1 y$flush_delayed = (_Bool)0 [L729] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-22 23:18:16,511 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_248a0278-aac4-447c-8981-e37c1727720f/bin-2019/uautomizer/witness.graphml [2018-11-22 23:18:16,511 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-22 23:18:16,512 INFO L168 Benchmark]: Toolchain (without parser) took 22493.57 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.7 GB). Free memory was 955.8 MB in the beginning and 1.3 GB in the end (delta: -304.0 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,513 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 23:18:16,514 INFO L168 Benchmark]: CACSL2BoogieTranslator took 436.31 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.4 MB). Free memory was 955.8 MB in the beginning and 1.1 GB in the end (delta: -170.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,514 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,514 INFO L168 Benchmark]: Boogie Preprocessor took 23.30 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,514 INFO L168 Benchmark]: RCFGBuilder took 433.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,515 INFO L168 Benchmark]: TraceAbstraction took 18049.09 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -287.5 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,515 INFO L168 Benchmark]: Witness Printer took 3507.69 ms. Allocated memory is still 2.7 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 104.5 MB). Peak memory consumption was 104.5 MB. Max. memory is 11.5 GB. [2018-11-22 23:18:16,517 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 436.31 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.4 MB). Free memory was 955.8 MB in the beginning and 1.1 GB in the end (delta: -170.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.30 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 433.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18049.09 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -287.5 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 3507.69 ms. Allocated memory is still 2.7 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 104.5 MB). Peak memory consumption was 104.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L679] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L680] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L682] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L684] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L685] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L686] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L687] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L688] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L689] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L690] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L691] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L692] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L693] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L694] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L695] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L696] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L697] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L698] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L700] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t1659; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t1659, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t1660; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t1660, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L736] 0 y$w_buff1 = y$w_buff0 [L737] 0 y$w_buff0 = 1 [L738] 0 y$w_buff1_used = y$w_buff0_used [L739] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L742] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L743] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L744] 0 y$r_buff0_thd2 = (_Bool)1 [L747] 0 z = 1 [L750] 0 __unbuffered_p1_EAX = z [L753] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L706] 1 x = 1 [L711] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L712] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L713] 1 y$flush_delayed = weak$$choice2 [L714] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L715] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L715] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L716] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L716] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L717] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L717] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L760] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L760] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L763] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L718] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L719] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L719] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L720] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L720] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L721] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L721] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L722] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L723] 1 y = y$flush_delayed ? y$mem_tmp : y [L724] 1 y$flush_delayed = (_Bool)0 [L729] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L788] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L789] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L790] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 200 locations, 3 error locations. UNSAFE Result, 17.9s OverallTime, 29 OverallIterations, 1 TraceHistogramMax, 7.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7549 SDtfs, 8499 SDslu, 17217 SDs, 0 SdLazy, 6350 SolverSat, 344 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 263 GetRequests, 68 SyntacticMatches, 19 SemanticMatches, 176 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=29288occurred in iteration=17, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 4.8s AutomataMinimizationTime, 28 MinimizatonAttempts, 76666 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 2033 NumberOfCodeBlocks, 2033 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1920 ConstructedInterpolants, 0 QuantifiedInterpolants, 362381 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...